Hardware Design: SIE
Sign in or create your account | Project List | Help
Hardware Design: SIE Git Source Tree
Root/
| 1 | VHDL_DIR = ../logic |
| 2 | TOOLS_DIR = ../bin |
| 3 | LIB_DIR = ../lib |
| 4 | TARGET = bootldr |
| 5 | CROSS = mips-elf |
| 6 | GCC = $(CROSS)-gcc |
| 7 | AS = $(CROSS)-as |
| 8 | LD = $(CROSS)-ld |
| 9 | DUMP = $(CROSS)-objdump |
| 10 | OBJCOPY = $(CROSS)-objcopy |
| 11 | INC_PATH = ../include |
| 12 | CFLAGS = -O2 -I$(INC_PATH) -Wall -c -s |
| 13 | ILDFLAGS = -Ttext 0 -eentry -Map $@.map -s -N |
| 14 | LDFLAGS = -Ttext 0x10000000 -eentry -Map $@.map -s -N |
| 15 | |
| 16 | #Internal RAM 0x00 |
| 17 | #External RAM 0x10000000 |
| 18 | |
| 19 | vpath %.c $(LIB_DIR) |
| 20 | vpath %.S $(LIB_DIR) |
| 21 | |
| 22 | .c.o: |
| 23 | $(GCC) $(CFLAGS) $< |
| 24 | .S.o: |
| 25 | $(AS) -o $@ $< |
| 26 | |
| 27 | all: $(TARGET) |
| 28 | |
| 29 | clean: |
| 30 | -rm -rf *.o *.txt *.map *.lst *.bin opcodes_iram opcodes_ram test bootldr |
| 31 | |
| 32 | $(TARGET): crt0.o $(TARGET).o no_os.o ddr_init.o |
| 33 | $(LD) $(ILDFLAGS) -o $@ $^ |
| 34 | $(OBJCOPY) -I elf32-big -O binary $@ $@.bin |
| 35 | |
| 36 | vhdl_mem: $(TARGET) |
| 37 | $(TOOLS_DIR)/ramimage $(VHDL_DIR)/ram_xilinx.vhd $^.bin $(VHDL_DIR)/ram_image.vhd |
| 38 | |
| 39 | upload: $(TARGET) |
| 40 | sudo cat $^.bin > /dev/ttyUSB0 |
| 41 | |
| 42 | run: $(TARGET) |
| 43 | $(TOOLS_DIR)/mlite $^.bin |
| 44 |
Branches:
master
