Hardware Design: SIE

Hardware Design: SIE Git Source Tree

1	vlib work
2	vlog -incr "../build/project.v" "../plasma_TB.v" "glbl.v"
3	vsim -t 1ps -L simprims_ver -L unisims_ver -L xilinxcorelib_ver plasma_TB_v glbl
4	view wave
5	do wave1.do
6	#add wave *
7	view structure
8	view signals
9	run 16us
10

Branches:
master