Hardware Design: SIE

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Root/sie_fs/usr/local/share/urjtag/xilinx/xcr3032xl-vq44/xcr3032xl-vq44

1	#
2	# $Id: xcr3032xl-vq44 607 2004-08-17 22:43:44Z telka $
3	#
4	# JTAG declarations for XCR3032XL-VQ44
5	# Copyright (C) 2004 RightHand Technologies, Inc.
6	#
7	# This program is free software; you can redistribute it and/or
8	# modify it under the terms of the GNU General Public License
9	# as published by the Free Software Foundation; either version 2
10	# of the License, or (at your option) any later version.
11	#
12	# This program is distributed in the hope that it will be useful,
13	# but WITHOUT ANY WARRANTY; without even the implied warranty of
14	# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15	# GNU General Public License for more details.
16	#
17	# You should have received a copy of the GNU General Public License
18	# along with this program; if not, write to the Free Software
19	# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
20	# 02111-1307, USA.
21	#
22	# Written by Andrew Dyer <adyer@righthandtech.com>, 2004
23	#
24	# Documentation:
25	# [1] Xilinx Inc., "CoolRunner XPLA3 Preliminary Product Specification"
26	# DS012 (v1.7) June 23, 2003
27	# [2] Xilinx Inc., "BSDL file for device XCR3032, package VQ44
28	# Revision: 1.2", 2002-01-03
29	# [3] Xilinx Inc., "XCR3032XL 32 Macrocell CPLD Preliminary Product Specification"
30	# DS023 (v1.8) August 15, 2003
31	#
32	signal tck
33	signal tdi
34	signal tdo
35	signal tms
36	signal CLK0_IN0
37	signal CLK1_IN1
38	signal CLK2_IN2
39	signal CLK3_IN3
40	signal A0
41	signal A1
42	signal A2
43	signal A4
44	signal A5
45	signal A6
46	signal A7
47	signal A9
48	signal A10
49	signal A11
50	signal A12
51	signal A13
52	signal A14
53	signal A15
54	signal B0
55	signal B1
56	signal B2
57	signal B4
58	signal B5
59	signal B6
60	signal B7
61	signal B9
62	signal B10
63	signal B11
64	signal B12
65	signal B13
66	signal B14
67	signal B15
68	signal VDDE1
69	signal VDDE2
70	signal VDDI1
71	signal VDDI2
72	signal GND1
73	signal GND2
74	signal GND3
75
76	register BSR 132
77	register BR 1
78	register DIR 32
79
80	instruction length 5
81
82	instruction BYPASS 11111 BR
83	instruction SAMPLE/PRELOAD 00010 BSR
84	instruction EXTEST 00000 BSR
85	instruction IDCODE 00001 DIR
86
87	bit 131 O 1 *
88	bit 130 I 1 A0
89	bit 129 O 1 A0 128 0 Z
90	bit 128 C 1 *
91	bit 127 O 1 *
92	bit 126 I 1 A1
93	bit 125 O 1 A1 124 0 Z
94	bit 124 C 1 *
95	bit 123 O 1 *
96	bit 122 I 1 A2
97	bit 121 O 1 A2 120 0 Z
98	bit 120 C 1 *
99	bit 119 O 1 *
100	bit 118 O 1 *
101	bit 117 O 1 *
102	bit 116 O 1 *
103	bit 115 O 1 *
104	bit 114 I 1 A4
105	bit 113 O 1 A4 112 0 Z
106	bit 112 C 1 *
107	bit 111 O 1 *
108	bit 110 I 1 A5
109	bit 109 O 1 A5 108 0 Z
110	bit 108 C 1 *
111	bit 107 O 1 *
112	bit 106 I 1 A6
113	bit 105 O 1 A6 104 0 Z
114	bit 104 C 1 *
115	bit 103 O 1 *
116	bit 102 I 1 A7
117	bit 101 O 1 A7 100 0 Z
118	bit 100 C 1 *
119	bit 99 O 1 *
120	bit 98 O 1 *
121	bit 97 O 1 *
122	bit 96 O 1 *
123	bit 95 O 1 *
124	bit 94 I 1 A9
125	bit 93 O 1 A9 92 0 Z
126	bit 92 C 1 *
127	bit 91 O 1 *
128	bit 90 I 1 A10
129	bit 89 O 1 A10 88 0 Z
130	bit 88 C 1 *
131	bit 87 O 1 *
132	bit 86 I 1 A11
133	bit 85 O 1 A11 84 0 Z
134	bit 84 C 1 *
135	bit 83 O 1 *
136	bit 82 I 1 A12
137	bit 81 O 1 A12 80 0 Z
138	bit 80 C 1 *
139	bit 79 O 1 *
140	bit 78 I 1 A13
141	bit 77 O 1 A13 76 0 Z
142	bit 76 C 1 *
143	bit 75 O 1 *
144	bit 74 I 1 A14
145	bit 73 O 1 A14 72 0 Z
146	bit 72 C 1 *
147	bit 71 O 1 *
148	bit 70 I 1 A15
149	bit 69 O 1 A15 68 0 Z
150	bit 68 C 1 *
151	bit 67 O 1 *
152	bit 66 I 1 B0
153	bit 65 O 1 B0 64 0 Z
154	bit 64 C 1 *
155	bit 63 O 1 *
156	bit 62 I 1 B1
157	bit 61 O 1 B1 60 0 Z
158	bit 60 C 1 *
159	bit 59 O 1 *
160	bit 58 I 1 B2
161	bit 57 O 1 B2 56 0 Z
162	bit 56 C 1 *
163	bit 55 O 1 *
164	bit 54 O 1 *
165	bit 53 O 1 *
166	bit 52 O 1 *
167	bit 51 O 1 *
168	bit 50 I 1 B4
169	bit 49 O 1 B4 48 0 Z
170	bit 48 C 1 *
171	bit 47 O 1 *
172	bit 46 I 1 B5
173	bit 45 O 1 B5 44 0 Z
174	bit 44 C 1 *
175	bit 43 O 1 *
176	bit 42 I 1 B6
177	bit 41 O 1 B6 40 0 Z
178	bit 40 C 1 *
179	bit 39 O 1 *
180	bit 38 I 1 B7
181	bit 37 O 1 B7 36 0 Z
182	bit 36 C 1 *
183	bit 35 O 1 *
184	bit 34 O 1 *
185	bit 33 O 1 *
186	bit 32 O 1 *
187	bit 31 O 1 *
188	bit 30 I 1 B9
189	bit 29 O 1 B9 28 0 Z
190	bit 28 C 1 *
191	bit 27 O 1 *
192	bit 26 I 1 B10
193	bit 25 O 1 B10 24 0 Z
194	bit 24 C 1 *
195	bit 23 O 1 *
196	bit 22 I 1 B11
197	bit 21 O 1 B11 20 0 Z
198	bit 20 C 1 *
199	bit 19 O 1 *
200	bit 18 I 1 B12
201	bit 17 O 1 B12 16 0 Z
202	bit 16 C 1 *
203	bit 15 O 1 *
204	bit 14 I 1 B13
205	bit 13 O 1 B13 12 0 Z
206	bit 12 C 1 *
207	bit 11 O 1 *
208	bit 10 I 1 B14
209	bit 9 O 1 B14 8 0 Z
210	bit 8 C 1 *
211	bit 7 O 1 *
212	bit 6 I 1 B15
213	bit 5 O 1 B15 4 0 Z
214	bit 4 C 1 *
215	bit 3 I 1 CLK0_IN0
216	bit 2 I 1 CLK1_IN1
217	bit 1 I 1 CLK2_IN2
218	bit 0 I 1 CLK3_IN3
219

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