| package/mac80211/patches/500-pending_work.patch |
| 1 | --- a/drivers/net/wireless/ath/ath9k/Kconfig |
| 2 | @@ -32,6 +32,13 @@ config ATH9K_DEBUGFS |
| 3 | |
| 4 | Also required for changing debug message flags at run time. |
| 5 | |
| 6 | +config ATH9K_PKTLOG |
| 7 | + bool "ath9k packet logging support" |
| 8 | + depends on ATH9K_DEBUGFS |
| 9 | + ---help--- |
| 10 | + Say Y to dump frame information during tx/rx, rate information |
| 11 | + and ani state. |
| 12 | + |
| 13 | config ATH9K_HTC |
| 14 | tristate "Atheros HTC based wireless cards support" |
| 15 | depends on USB && MAC80211 |
| 16 | @@ -53,3 +60,4 @@ config ATH9K_HTC_DEBUGFS |
| 17 | depends on ATH9K_HTC && DEBUG_FS |
| 18 | ---help--- |
| 19 | Say Y, if you need access to ath9k_htc's statistics. |
| 20 | + |
| 21 | --- a/drivers/net/wireless/ath/ath9k/Makefile |
| 22 | @@ -10,6 +10,7 @@ ath9k-y += beacon.o \ |
| 23 | ath9k-$(CONFIG_PCI) += pci.o |
| 24 | ath9k-$(CONFIG_ATHEROS_AR71XX) += ahb.o |
| 25 | ath9k-$(CONFIG_ATH9K_DEBUGFS) += debug.o |
| 26 | +ath9k-$(CONFIG_ATH9K_PKTLOG) += pktlog.o |
| 27 | |
| 28 | obj-$(CONFIG_ATH9K) += ath9k.o |
| 29 | |
| 30 | --- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c |
| 31 | @@ -215,7 +215,8 @@ static void ar9002_hw_fill_txdesc(struct |
| 32 | } |
| 33 | |
| 34 | static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds, |
| 35 | - struct ath_tx_status *ts) |
| 36 | + struct ath_tx_status *ts, |
| 37 | + void *txs_desc) |
| 38 | { |
| 39 | struct ar5416_desc *ads = AR5416DESC(ds); |
| 40 | |
| 41 | --- /dev/null |
| 42 | @@ -0,0 +1,1784 @@ |
| 43 | +/* |
| 44 | + * Copyright (c) 2010 Atheros Communications Inc. |
| 45 | + * |
| 46 | + * Permission to use, copy, modify, and/or distribute this software for any |
| 47 | + * purpose with or without fee is hereby granted, provided that the above |
| 48 | + * copyright notice and this permission notice appear in all copies. |
| 49 | + * |
| 50 | + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 51 | + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 52 | + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 53 | + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 54 | + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 55 | + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 56 | + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 57 | + */ |
| 58 | + |
| 59 | +#ifndef INITVALS_9003_2P0_H |
| 60 | +#define INITVALS_9003_2P0_H |
| 61 | + |
| 62 | +/* AR9003 2.0 */ |
| 63 | + |
| 64 | +static const u32 ar9300_2p0_radio_postamble[][5] = { |
| 65 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 66 | + {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31}, |
| 67 | + {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800}, |
| 68 | + {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20}, |
| 69 | + {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 70 | + {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 71 | + {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 72 | + {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 73 | + {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 74 | + {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 75 | +}; |
| 76 | + |
| 77 | +static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p0[][5] = { |
| 78 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 79 | + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 80 | + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 81 | + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, |
| 82 | + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, |
| 83 | + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, |
| 84 | + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, |
| 85 | + {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, |
| 86 | + {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402}, |
| 87 | + {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404}, |
| 88 | + {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, |
| 89 | + {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, |
| 90 | + {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, |
| 91 | + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, |
| 92 | + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, |
| 93 | + {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, |
| 94 | + {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, |
| 95 | + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, |
| 96 | + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, |
| 97 | + {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, |
| 98 | + {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, |
| 99 | + {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83}, |
| 100 | + {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84}, |
| 101 | + {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3}, |
| 102 | + {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5}, |
| 103 | + {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9}, |
| 104 | + {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb}, |
| 105 | + {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 106 | + {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 107 | + {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 108 | + {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 109 | + {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 110 | + {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 111 | + {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 112 | + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 113 | + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, |
| 114 | + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, |
| 115 | + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, |
| 116 | + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, |
| 117 | + {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, |
| 118 | + {0x0000a598, 0x21820220, 0x21820220, 0x16800402, 0x16800402}, |
| 119 | + {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404}, |
| 120 | + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, |
| 121 | + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, |
| 122 | + {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, |
| 123 | + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, |
| 124 | + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, |
| 125 | + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, |
| 126 | + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, |
| 127 | + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, |
| 128 | + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, |
| 129 | + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, |
| 130 | + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, |
| 131 | + {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x47801a83, 0x47801a83}, |
| 132 | + {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4a801c84, 0x4a801c84}, |
| 133 | + {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4e801ce3, 0x4e801ce3}, |
| 134 | + {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x52801ce5, 0x52801ce5}, |
| 135 | + {0x0000a5dc, 0x7086308c, 0x7086308c, 0x56801ce9, 0x56801ce9}, |
| 136 | + {0x0000a5e0, 0x738a308a, 0x738a308a, 0x5a801ceb, 0x5a801ceb}, |
| 137 | + {0x0000a5e4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 138 | + {0x0000a5e8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 139 | + {0x0000a5ec, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 140 | + {0x0000a5f0, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 141 | + {0x0000a5f4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 142 | + {0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 143 | + {0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 144 | + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 145 | + {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 146 | + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 147 | + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 148 | + {0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 149 | + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 150 | + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 151 | + {0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 152 | + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 153 | +}; |
| 154 | + |
| 155 | +static const u32 ar9300Modes_fast_clock_2p0[][3] = { |
| 156 | + /* Addr 5G_HT20 5G_HT40 */ |
| 157 | + {0x00001030, 0x00000268, 0x000004d0}, |
| 158 | + {0x00001070, 0x0000018c, 0x00000318}, |
| 159 | + {0x000010b0, 0x00000fd0, 0x00001fa0}, |
| 160 | + {0x00008014, 0x044c044c, 0x08980898}, |
| 161 | + {0x0000801c, 0x148ec02b, 0x148ec057}, |
| 162 | + {0x00008318, 0x000044c0, 0x00008980}, |
| 163 | + {0x00009e00, 0x03721821, 0x03721821}, |
| 164 | + {0x0000a230, 0x0000000b, 0x00000016}, |
| 165 | + {0x0000a254, 0x00000898, 0x00001130}, |
| 166 | +}; |
| 167 | + |
| 168 | +static const u32 ar9300_2p0_radio_core[][2] = { |
| 169 | + /* Addr allmodes */ |
| 170 | + {0x00016000, 0x36db6db6}, |
| 171 | + {0x00016004, 0x6db6db40}, |
| 172 | + {0x00016008, 0x73f00000}, |
| 173 | + {0x0001600c, 0x00000000}, |
| 174 | + {0x00016040, 0x7f80fff8}, |
| 175 | + {0x0001604c, 0x76d005b5}, |
| 176 | + {0x00016050, 0x556cf031}, |
| 177 | + {0x00016054, 0x13449440}, |
| 178 | + {0x00016058, 0x0c51c92c}, |
| 179 | + {0x0001605c, 0x3db7fffc}, |
| 180 | + {0x00016060, 0xfffffffc}, |
| 181 | + {0x00016064, 0x000f0278}, |
| 182 | + {0x0001606c, 0x6db60000}, |
| 183 | + {0x00016080, 0x00000000}, |
| 184 | + {0x00016084, 0x0e48048c}, |
| 185 | + {0x00016088, 0x54214514}, |
| 186 | + {0x0001608c, 0x119f481e}, |
| 187 | + {0x00016090, 0x24926490}, |
| 188 | + {0x00016098, 0xd2888888}, |
| 189 | + {0x000160a0, 0x0a108ffe}, |
| 190 | + {0x000160a4, 0x812fc370}, |
| 191 | + {0x000160a8, 0x423c8000}, |
| 192 | + {0x000160b4, 0x92480080}, |
| 193 | + {0x000160c0, 0x00adb6d0}, |
| 194 | + {0x000160c4, 0x6db6db60}, |
| 195 | + {0x000160c8, 0x6db6db6c}, |
| 196 | + {0x000160cc, 0x01e6c000}, |
| 197 | + {0x00016100, 0x3fffbe01}, |
| 198 | + {0x00016104, 0xfff80000}, |
| 199 | + {0x00016108, 0x00080010}, |
| 200 | + {0x00016144, 0x02084080}, |
| 201 | + {0x00016148, 0x00000000}, |
| 202 | + {0x00016280, 0x058a0001}, |
| 203 | + {0x00016284, 0x3d840208}, |
| 204 | + {0x00016288, 0x05a20408}, |
| 205 | + {0x0001628c, 0x00038c07}, |
| 206 | + {0x00016290, 0x40000004}, |
| 207 | + {0x00016294, 0x458aa14f}, |
| 208 | + {0x00016380, 0x00000000}, |
| 209 | + {0x00016384, 0x00000000}, |
| 210 | + {0x00016388, 0x00800700}, |
| 211 | + {0x0001638c, 0x00800700}, |
| 212 | + {0x00016390, 0x00800700}, |
| 213 | + {0x00016394, 0x00000000}, |
| 214 | + {0x00016398, 0x00000000}, |
| 215 | + {0x0001639c, 0x00000000}, |
| 216 | + {0x000163a0, 0x00000001}, |
| 217 | + {0x000163a4, 0x00000001}, |
| 218 | + {0x000163a8, 0x00000000}, |
| 219 | + {0x000163ac, 0x00000000}, |
| 220 | + {0x000163b0, 0x00000000}, |
| 221 | + {0x000163b4, 0x00000000}, |
| 222 | + {0x000163b8, 0x00000000}, |
| 223 | + {0x000163bc, 0x00000000}, |
| 224 | + {0x000163c0, 0x000000a0}, |
| 225 | + {0x000163c4, 0x000c0000}, |
| 226 | + {0x000163c8, 0x14021402}, |
| 227 | + {0x000163cc, 0x00001402}, |
| 228 | + {0x000163d0, 0x00000000}, |
| 229 | + {0x000163d4, 0x00000000}, |
| 230 | + {0x00016400, 0x36db6db6}, |
| 231 | + {0x00016404, 0x6db6db40}, |
| 232 | + {0x00016408, 0x73f00000}, |
| 233 | + {0x0001640c, 0x00000000}, |
| 234 | + {0x00016440, 0x7f80fff8}, |
| 235 | + {0x0001644c, 0x76d005b5}, |
| 236 | + {0x00016450, 0x556cf031}, |
| 237 | + {0x00016454, 0x13449440}, |
| 238 | + {0x00016458, 0x0c51c92c}, |
| 239 | + {0x0001645c, 0x3db7fffc}, |
| 240 | + {0x00016460, 0xfffffffc}, |
| 241 | + {0x00016464, 0x000f0278}, |
| 242 | + {0x0001646c, 0x6db60000}, |
| 243 | + {0x00016500, 0x3fffbe01}, |
| 244 | + {0x00016504, 0xfff80000}, |
| 245 | + {0x00016508, 0x00080010}, |
| 246 | + {0x00016544, 0x02084080}, |
| 247 | + {0x00016548, 0x00000000}, |
| 248 | + {0x00016780, 0x00000000}, |
| 249 | + {0x00016784, 0x00000000}, |
| 250 | + {0x00016788, 0x00800700}, |
| 251 | + {0x0001678c, 0x00800700}, |
| 252 | + {0x00016790, 0x00800700}, |
| 253 | + {0x00016794, 0x00000000}, |
| 254 | + {0x00016798, 0x00000000}, |
| 255 | + {0x0001679c, 0x00000000}, |
| 256 | + {0x000167a0, 0x00000001}, |
| 257 | + {0x000167a4, 0x00000001}, |
| 258 | + {0x000167a8, 0x00000000}, |
| 259 | + {0x000167ac, 0x00000000}, |
| 260 | + {0x000167b0, 0x00000000}, |
| 261 | + {0x000167b4, 0x00000000}, |
| 262 | + {0x000167b8, 0x00000000}, |
| 263 | + {0x000167bc, 0x00000000}, |
| 264 | + {0x000167c0, 0x000000a0}, |
| 265 | + {0x000167c4, 0x000c0000}, |
| 266 | + {0x000167c8, 0x14021402}, |
| 267 | + {0x000167cc, 0x00001402}, |
| 268 | + {0x000167d0, 0x00000000}, |
| 269 | + {0x000167d4, 0x00000000}, |
| 270 | + {0x00016800, 0x36db6db6}, |
| 271 | + {0x00016804, 0x6db6db40}, |
| 272 | + {0x00016808, 0x73f00000}, |
| 273 | + {0x0001680c, 0x00000000}, |
| 274 | + {0x00016840, 0x7f80fff8}, |
| 275 | + {0x0001684c, 0x76d005b5}, |
| 276 | + {0x00016850, 0x556cf031}, |
| 277 | + {0x00016854, 0x13449440}, |
| 278 | + {0x00016858, 0x0c51c92c}, |
| 279 | + {0x0001685c, 0x3db7fffc}, |
| 280 | + {0x00016860, 0xfffffffc}, |
| 281 | + {0x00016864, 0x000f0278}, |
| 282 | + {0x0001686c, 0x6db60000}, |
| 283 | + {0x00016900, 0x3fffbe01}, |
| 284 | + {0x00016904, 0xfff80000}, |
| 285 | + {0x00016908, 0x00080010}, |
| 286 | + {0x00016944, 0x02084080}, |
| 287 | + {0x00016948, 0x00000000}, |
| 288 | + {0x00016b80, 0x00000000}, |
| 289 | + {0x00016b84, 0x00000000}, |
| 290 | + {0x00016b88, 0x00800700}, |
| 291 | + {0x00016b8c, 0x00800700}, |
| 292 | + {0x00016b90, 0x00800700}, |
| 293 | + {0x00016b94, 0x00000000}, |
| 294 | + {0x00016b98, 0x00000000}, |
| 295 | + {0x00016b9c, 0x00000000}, |
| 296 | + {0x00016ba0, 0x00000001}, |
| 297 | + {0x00016ba4, 0x00000001}, |
| 298 | + {0x00016ba8, 0x00000000}, |
| 299 | + {0x00016bac, 0x00000000}, |
| 300 | + {0x00016bb0, 0x00000000}, |
| 301 | + {0x00016bb4, 0x00000000}, |
| 302 | + {0x00016bb8, 0x00000000}, |
| 303 | + {0x00016bbc, 0x00000000}, |
| 304 | + {0x00016bc0, 0x000000a0}, |
| 305 | + {0x00016bc4, 0x000c0000}, |
| 306 | + {0x00016bc8, 0x14021402}, |
| 307 | + {0x00016bcc, 0x00001402}, |
| 308 | + {0x00016bd0, 0x00000000}, |
| 309 | + {0x00016bd4, 0x00000000}, |
| 310 | +}; |
| 311 | + |
| 312 | +static const u32 ar9300Common_rx_gain_table_merlin_2p0[][2] = { |
| 313 | + /* Addr allmodes */ |
| 314 | + {0x0000a000, 0x02000101}, |
| 315 | + {0x0000a004, 0x02000102}, |
| 316 | + {0x0000a008, 0x02000103}, |
| 317 | + {0x0000a00c, 0x02000104}, |
| 318 | + {0x0000a010, 0x02000200}, |
| 319 | + {0x0000a014, 0x02000201}, |
| 320 | + {0x0000a018, 0x02000202}, |
| 321 | + {0x0000a01c, 0x02000203}, |
| 322 | + {0x0000a020, 0x02000204}, |
| 323 | + {0x0000a024, 0x02000205}, |
| 324 | + {0x0000a028, 0x02000208}, |
| 325 | + {0x0000a02c, 0x02000302}, |
| 326 | + {0x0000a030, 0x02000303}, |
| 327 | + {0x0000a034, 0x02000304}, |
| 328 | + {0x0000a038, 0x02000400}, |
| 329 | + {0x0000a03c, 0x02010300}, |
| 330 | + {0x0000a040, 0x02010301}, |
| 331 | + {0x0000a044, 0x02010302}, |
| 332 | + {0x0000a048, 0x02000500}, |
| 333 | + {0x0000a04c, 0x02010400}, |
| 334 | + {0x0000a050, 0x02020300}, |
| 335 | + {0x0000a054, 0x02020301}, |
| 336 | + {0x0000a058, 0x02020302}, |
| 337 | + {0x0000a05c, 0x02020303}, |
| 338 | + {0x0000a060, 0x02020400}, |
| 339 | + {0x0000a064, 0x02030300}, |
| 340 | + {0x0000a068, 0x02030301}, |
| 341 | + {0x0000a06c, 0x02030302}, |
| 342 | + {0x0000a070, 0x02030303}, |
| 343 | + {0x0000a074, 0x02030400}, |
| 344 | + {0x0000a078, 0x02040300}, |
| 345 | + {0x0000a07c, 0x02040301}, |
| 346 | + {0x0000a080, 0x02040302}, |
| 347 | + {0x0000a084, 0x02040303}, |
| 348 | + {0x0000a088, 0x02030500}, |
| 349 | + {0x0000a08c, 0x02040400}, |
| 350 | + {0x0000a090, 0x02050203}, |
| 351 | + {0x0000a094, 0x02050204}, |
| 352 | + {0x0000a098, 0x02050205}, |
| 353 | + {0x0000a09c, 0x02040500}, |
| 354 | + {0x0000a0a0, 0x02050301}, |
| 355 | + {0x0000a0a4, 0x02050302}, |
| 356 | + {0x0000a0a8, 0x02050303}, |
| 357 | + {0x0000a0ac, 0x02050400}, |
| 358 | + {0x0000a0b0, 0x02050401}, |
| 359 | + {0x0000a0b4, 0x02050402}, |
| 360 | + {0x0000a0b8, 0x02050403}, |
| 361 | + {0x0000a0bc, 0x02050500}, |
| 362 | + {0x0000a0c0, 0x02050501}, |
| 363 | + {0x0000a0c4, 0x02050502}, |
| 364 | + {0x0000a0c8, 0x02050503}, |
| 365 | + {0x0000a0cc, 0x02050504}, |
| 366 | + {0x0000a0d0, 0x02050600}, |
| 367 | + {0x0000a0d4, 0x02050601}, |
| 368 | + {0x0000a0d8, 0x02050602}, |
| 369 | + {0x0000a0dc, 0x02050603}, |
| 370 | + {0x0000a0e0, 0x02050604}, |
| 371 | + {0x0000a0e4, 0x02050700}, |
| 372 | + {0x0000a0e8, 0x02050701}, |
| 373 | + {0x0000a0ec, 0x02050702}, |
| 374 | + {0x0000a0f0, 0x02050703}, |
| 375 | + {0x0000a0f4, 0x02050704}, |
| 376 | + {0x0000a0f8, 0x02050705}, |
| 377 | + {0x0000a0fc, 0x02050708}, |
| 378 | + {0x0000a100, 0x02050709}, |
| 379 | + {0x0000a104, 0x0205070a}, |
| 380 | + {0x0000a108, 0x0205070b}, |
| 381 | + {0x0000a10c, 0x0205070c}, |
| 382 | + {0x0000a110, 0x0205070d}, |
| 383 | + {0x0000a114, 0x02050710}, |
| 384 | + {0x0000a118, 0x02050711}, |
| 385 | + {0x0000a11c, 0x02050712}, |
| 386 | + {0x0000a120, 0x02050713}, |
| 387 | + {0x0000a124, 0x02050714}, |
| 388 | + {0x0000a128, 0x02050715}, |
| 389 | + {0x0000a12c, 0x02050730}, |
| 390 | + {0x0000a130, 0x02050731}, |
| 391 | + {0x0000a134, 0x02050732}, |
| 392 | + {0x0000a138, 0x02050733}, |
| 393 | + {0x0000a13c, 0x02050734}, |
| 394 | + {0x0000a140, 0x02050735}, |
| 395 | + {0x0000a144, 0x02050750}, |
| 396 | + {0x0000a148, 0x02050751}, |
| 397 | + {0x0000a14c, 0x02050752}, |
| 398 | + {0x0000a150, 0x02050753}, |
| 399 | + {0x0000a154, 0x02050754}, |
| 400 | + {0x0000a158, 0x02050755}, |
| 401 | + {0x0000a15c, 0x02050770}, |
| 402 | + {0x0000a160, 0x02050771}, |
| 403 | + {0x0000a164, 0x02050772}, |
| 404 | + {0x0000a168, 0x02050773}, |
| 405 | + {0x0000a16c, 0x02050774}, |
| 406 | + {0x0000a170, 0x02050775}, |
| 407 | + {0x0000a174, 0x00000776}, |
| 408 | + {0x0000a178, 0x00000776}, |
| 409 | + {0x0000a17c, 0x00000776}, |
| 410 | + {0x0000a180, 0x00000776}, |
| 411 | + {0x0000a184, 0x00000776}, |
| 412 | + {0x0000a188, 0x00000776}, |
| 413 | + {0x0000a18c, 0x00000776}, |
| 414 | + {0x0000a190, 0x00000776}, |
| 415 | + {0x0000a194, 0x00000776}, |
| 416 | + {0x0000a198, 0x00000776}, |
| 417 | + {0x0000a19c, 0x00000776}, |
| 418 | + {0x0000a1a0, 0x00000776}, |
| 419 | + {0x0000a1a4, 0x00000776}, |
| 420 | + {0x0000a1a8, 0x00000776}, |
| 421 | + {0x0000a1ac, 0x00000776}, |
| 422 | + {0x0000a1b0, 0x00000776}, |
| 423 | + {0x0000a1b4, 0x00000776}, |
| 424 | + {0x0000a1b8, 0x00000776}, |
| 425 | + {0x0000a1bc, 0x00000776}, |
| 426 | + {0x0000a1c0, 0x00000776}, |
| 427 | + {0x0000a1c4, 0x00000776}, |
| 428 | + {0x0000a1c8, 0x00000776}, |
| 429 | + {0x0000a1cc, 0x00000776}, |
| 430 | + {0x0000a1d0, 0x00000776}, |
| 431 | + {0x0000a1d4, 0x00000776}, |
| 432 | + {0x0000a1d8, 0x00000776}, |
| 433 | + {0x0000a1dc, 0x00000776}, |
| 434 | + {0x0000a1e0, 0x00000776}, |
| 435 | + {0x0000a1e4, 0x00000776}, |
| 436 | + {0x0000a1e8, 0x00000776}, |
| 437 | + {0x0000a1ec, 0x00000776}, |
| 438 | + {0x0000a1f0, 0x00000776}, |
| 439 | + {0x0000a1f4, 0x00000776}, |
| 440 | + {0x0000a1f8, 0x00000776}, |
| 441 | + {0x0000a1fc, 0x00000776}, |
| 442 | + {0x0000b000, 0x02000101}, |
| 443 | + {0x0000b004, 0x02000102}, |
| 444 | + {0x0000b008, 0x02000103}, |
| 445 | + {0x0000b00c, 0x02000104}, |
| 446 | + {0x0000b010, 0x02000200}, |
| 447 | + {0x0000b014, 0x02000201}, |
| 448 | + {0x0000b018, 0x02000202}, |
| 449 | + {0x0000b01c, 0x02000203}, |
| 450 | + {0x0000b020, 0x02000204}, |
| 451 | + {0x0000b024, 0x02000205}, |
| 452 | + {0x0000b028, 0x02000208}, |
| 453 | + {0x0000b02c, 0x02000302}, |
| 454 | + {0x0000b030, 0x02000303}, |
| 455 | + {0x0000b034, 0x02000304}, |
| 456 | + {0x0000b038, 0x02000400}, |
| 457 | + {0x0000b03c, 0x02010300}, |
| 458 | + {0x0000b040, 0x02010301}, |
| 459 | + {0x0000b044, 0x02010302}, |
| 460 | + {0x0000b048, 0x02000500}, |
| 461 | + {0x0000b04c, 0x02010400}, |
| 462 | + {0x0000b050, 0x02020300}, |
| 463 | + {0x0000b054, 0x02020301}, |
| 464 | + {0x0000b058, 0x02020302}, |
| 465 | + {0x0000b05c, 0x02020303}, |
| 466 | + {0x0000b060, 0x02020400}, |
| 467 | + {0x0000b064, 0x02030300}, |
| 468 | + {0x0000b068, 0x02030301}, |
| 469 | + {0x0000b06c, 0x02030302}, |
| 470 | + {0x0000b070, 0x02030303}, |
| 471 | + {0x0000b074, 0x02030400}, |
| 472 | + {0x0000b078, 0x02040300}, |
| 473 | + {0x0000b07c, 0x02040301}, |
| 474 | + {0x0000b080, 0x02040302}, |
| 475 | + {0x0000b084, 0x02040303}, |
| 476 | + {0x0000b088, 0x02030500}, |
| 477 | + {0x0000b08c, 0x02040400}, |
| 478 | + {0x0000b090, 0x02050203}, |
| 479 | + {0x0000b094, 0x02050204}, |
| 480 | + {0x0000b098, 0x02050205}, |
| 481 | + {0x0000b09c, 0x02040500}, |
| 482 | + {0x0000b0a0, 0x02050301}, |
| 483 | + {0x0000b0a4, 0x02050302}, |
| 484 | + {0x0000b0a8, 0x02050303}, |
| 485 | + {0x0000b0ac, 0x02050400}, |
| 486 | + {0x0000b0b0, 0x02050401}, |
| 487 | + {0x0000b0b4, 0x02050402}, |
| 488 | + {0x0000b0b8, 0x02050403}, |
| 489 | + {0x0000b0bc, 0x02050500}, |
| 490 | + {0x0000b0c0, 0x02050501}, |
| 491 | + {0x0000b0c4, 0x02050502}, |
| 492 | + {0x0000b0c8, 0x02050503}, |
| 493 | + {0x0000b0cc, 0x02050504}, |
| 494 | + {0x0000b0d0, 0x02050600}, |
| 495 | + {0x0000b0d4, 0x02050601}, |
| 496 | + {0x0000b0d8, 0x02050602}, |
| 497 | + {0x0000b0dc, 0x02050603}, |
| 498 | + {0x0000b0e0, 0x02050604}, |
| 499 | + {0x0000b0e4, 0x02050700}, |
| 500 | + {0x0000b0e8, 0x02050701}, |
| 501 | + {0x0000b0ec, 0x02050702}, |
| 502 | + {0x0000b0f0, 0x02050703}, |
| 503 | + {0x0000b0f4, 0x02050704}, |
| 504 | + {0x0000b0f8, 0x02050705}, |
| 505 | + {0x0000b0fc, 0x02050708}, |
| 506 | + {0x0000b100, 0x02050709}, |
| 507 | + {0x0000b104, 0x0205070a}, |
| 508 | + {0x0000b108, 0x0205070b}, |
| 509 | + {0x0000b10c, 0x0205070c}, |
| 510 | + {0x0000b110, 0x0205070d}, |
| 511 | + {0x0000b114, 0x02050710}, |
| 512 | + {0x0000b118, 0x02050711}, |
| 513 | + {0x0000b11c, 0x02050712}, |
| 514 | + {0x0000b120, 0x02050713}, |
| 515 | + {0x0000b124, 0x02050714}, |
| 516 | + {0x0000b128, 0x02050715}, |
| 517 | + {0x0000b12c, 0x02050730}, |
| 518 | + {0x0000b130, 0x02050731}, |
| 519 | + {0x0000b134, 0x02050732}, |
| 520 | + {0x0000b138, 0x02050733}, |
| 521 | + {0x0000b13c, 0x02050734}, |
| 522 | + {0x0000b140, 0x02050735}, |
| 523 | + {0x0000b144, 0x02050750}, |
| 524 | + {0x0000b148, 0x02050751}, |
| 525 | + {0x0000b14c, 0x02050752}, |
| 526 | + {0x0000b150, 0x02050753}, |
| 527 | + {0x0000b154, 0x02050754}, |
| 528 | + {0x0000b158, 0x02050755}, |
| 529 | + {0x0000b15c, 0x02050770}, |
| 530 | + {0x0000b160, 0x02050771}, |
| 531 | + {0x0000b164, 0x02050772}, |
| 532 | + {0x0000b168, 0x02050773}, |
| 533 | + {0x0000b16c, 0x02050774}, |
| 534 | + {0x0000b170, 0x02050775}, |
| 535 | + {0x0000b174, 0x00000776}, |
| 536 | + {0x0000b178, 0x00000776}, |
| 537 | + {0x0000b17c, 0x00000776}, |
| 538 | + {0x0000b180, 0x00000776}, |
| 539 | + {0x0000b184, 0x00000776}, |
| 540 | + {0x0000b188, 0x00000776}, |
| 541 | + {0x0000b18c, 0x00000776}, |
| 542 | + {0x0000b190, 0x00000776}, |
| 543 | + {0x0000b194, 0x00000776}, |
| 544 | + {0x0000b198, 0x00000776}, |
| 545 | + {0x0000b19c, 0x00000776}, |
| 546 | + {0x0000b1a0, 0x00000776}, |
| 547 | + {0x0000b1a4, 0x00000776}, |
| 548 | + {0x0000b1a8, 0x00000776}, |
| 549 | + {0x0000b1ac, 0x00000776}, |
| 550 | + {0x0000b1b0, 0x00000776}, |
| 551 | + {0x0000b1b4, 0x00000776}, |
| 552 | + {0x0000b1b8, 0x00000776}, |
| 553 | + {0x0000b1bc, 0x00000776}, |
| 554 | + {0x0000b1c0, 0x00000776}, |
| 555 | + {0x0000b1c4, 0x00000776}, |
| 556 | + {0x0000b1c8, 0x00000776}, |
| 557 | + {0x0000b1cc, 0x00000776}, |
| 558 | + {0x0000b1d0, 0x00000776}, |
| 559 | + {0x0000b1d4, 0x00000776}, |
| 560 | + {0x0000b1d8, 0x00000776}, |
| 561 | + {0x0000b1dc, 0x00000776}, |
| 562 | + {0x0000b1e0, 0x00000776}, |
| 563 | + {0x0000b1e4, 0x00000776}, |
| 564 | + {0x0000b1e8, 0x00000776}, |
| 565 | + {0x0000b1ec, 0x00000776}, |
| 566 | + {0x0000b1f0, 0x00000776}, |
| 567 | + {0x0000b1f4, 0x00000776}, |
| 568 | + {0x0000b1f8, 0x00000776}, |
| 569 | + {0x0000b1fc, 0x00000776}, |
| 570 | +}; |
| 571 | + |
| 572 | +static const u32 ar9300_2p0_mac_postamble[][5] = { |
| 573 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 574 | + {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160}, |
| 575 | + {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c}, |
| 576 | + {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38}, |
| 577 | + {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00}, |
| 578 | + {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b}, |
| 579 | + {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810}, |
| 580 | + {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a}, |
| 581 | + {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440}, |
| 582 | +}; |
| 583 | + |
| 584 | +static const u32 ar9300_2p0_soc_postamble[][5] = { |
| 585 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 586 | + {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023}, |
| 587 | +}; |
| 588 | + |
| 589 | +static const u32 ar9200_merlin_2p0_radio_core[][2] = { |
| 590 | + /* Addr allmodes */ |
| 591 | + {0x00007800, 0x00040000}, |
| 592 | + {0x00007804, 0xdb005012}, |
| 593 | + {0x00007808, 0x04924914}, |
| 594 | + {0x0000780c, 0x21084210}, |
| 595 | + {0x00007810, 0x6d801300}, |
| 596 | + {0x00007814, 0x0019beff}, |
| 597 | + {0x00007818, 0x07e41000}, |
| 598 | + {0x0000781c, 0x00392000}, |
| 599 | + {0x00007820, 0x92592480}, |
| 600 | + {0x00007824, 0x00040000}, |
| 601 | + {0x00007828, 0xdb005012}, |
| 602 | + {0x0000782c, 0x04924914}, |
| 603 | + {0x00007830, 0x21084210}, |
| 604 | + {0x00007834, 0x6d801300}, |
| 605 | + {0x00007838, 0x0019beff}, |
| 606 | + {0x0000783c, 0x07e40000}, |
| 607 | + {0x00007840, 0x00392000}, |
| 608 | + {0x00007844, 0x92592480}, |
| 609 | + {0x00007848, 0x00100000}, |
| 610 | + {0x0000784c, 0x773f0567}, |
| 611 | + {0x00007850, 0x54214514}, |
| 612 | + {0x00007854, 0x12035828}, |
| 613 | + {0x00007858, 0x92592692}, |
| 614 | + {0x0000785c, 0x00000000}, |
| 615 | + {0x00007860, 0x56400000}, |
| 616 | + {0x00007864, 0x0a8e370e}, |
| 617 | + {0x00007868, 0xc0102850}, |
| 618 | + {0x0000786c, 0x812d4000}, |
| 619 | + {0x00007870, 0x807ec400}, |
| 620 | + {0x00007874, 0x001b6db0}, |
| 621 | + {0x00007878, 0x00376b63}, |
| 622 | + {0x0000787c, 0x06db6db6}, |
| 623 | + {0x00007880, 0x006d8000}, |
| 624 | + {0x00007884, 0xffeffffe}, |
| 625 | + {0x00007888, 0xffeffffe}, |
| 626 | + {0x0000788c, 0x00010000}, |
| 627 | + {0x00007890, 0x02060aeb}, |
| 628 | + {0x00007894, 0x5a108000}, |
| 629 | +}; |
| 630 | + |
| 631 | +static const u32 ar9300_2p0_baseband_postamble[][5] = { |
| 632 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 633 | + {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011}, |
| 634 | + {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e}, |
| 635 | + {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, |
| 636 | + {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881}, |
| 637 | + {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, |
| 638 | + {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, |
| 639 | + {0x00009c00, 0x00000044, 0x000000c4, 0x000000c4, 0x00000044}, |
| 640 | + {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0}, |
| 641 | + {0x00009e04, 0x00802020, 0x00802020, 0x00802020, 0x00802020}, |
| 642 | + {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, |
| 643 | + {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, |
| 644 | + {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e}, |
| 645 | + {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 646 | + {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, |
| 647 | + {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, |
| 648 | + {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, |
| 649 | + {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, |
| 650 | + {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, |
| 651 | + {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, |
| 652 | + {0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0}, |
| 653 | + {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, |
| 654 | + {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, |
| 655 | + {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018}, |
| 656 | + {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108}, |
| 657 | + {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898}, |
| 658 | + {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002}, |
| 659 | + {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, |
| 660 | + {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501}, |
| 661 | + {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, |
| 662 | + {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b}, |
| 663 | + {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 664 | + {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, |
| 665 | + {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, |
| 666 | + {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, |
| 667 | + {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071982}, |
| 668 | + {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a}, |
| 669 | + {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 670 | + {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 671 | + {0x0000ae04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 672 | + {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 673 | + {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 674 | + {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, |
| 675 | + {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 676 | + {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 677 | + {0x0000be04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 678 | + {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 679 | + {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 680 | + {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, |
| 681 | + {0x0000c284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 682 | +}; |
| 683 | + |
| 684 | +static const u32 ar9300_2p0_baseband_core[][2] = { |
| 685 | + /* Addr allmodes */ |
| 686 | + {0x00009800, 0xafe68e30}, |
| 687 | + {0x00009804, 0xfd14e000}, |
| 688 | + {0x00009808, 0x9c0a9f6b}, |
| 689 | + {0x0000980c, 0x04900000}, |
| 690 | + {0x00009814, 0x9280c00a}, |
| 691 | + {0x00009818, 0x00000000}, |
| 692 | + {0x0000981c, 0x00020028}, |
| 693 | + {0x00009834, 0x5f3ca3de}, |
| 694 | + {0x00009838, 0x0108ecff}, |
| 695 | + {0x0000983c, 0x14750600}, |
| 696 | + {0x00009880, 0x201fff00}, |
| 697 | + {0x00009884, 0x00001042}, |
| 698 | + {0x000098a4, 0x00200400}, |
| 699 | + {0x000098b0, 0x52440bbe}, |
| 700 | + {0x000098d0, 0x004b6a8e}, |
| 701 | + {0x000098d4, 0x00000820}, |
| 702 | + {0x000098dc, 0x00000000}, |
| 703 | + {0x000098f0, 0x00000000}, |
| 704 | + {0x000098f4, 0x00000000}, |
| 705 | + {0x00009c04, 0xff55ff55}, |
| 706 | + {0x00009c08, 0x0320ff55}, |
| 707 | + {0x00009c0c, 0x00000000}, |
| 708 | + {0x00009c10, 0x00000000}, |
| 709 | + {0x00009c14, 0x00046384}, |
| 710 | + {0x00009c18, 0x05b6b440}, |
| 711 | + {0x00009c1c, 0x00b6b440}, |
| 712 | + {0x00009d00, 0xc080a333}, |
| 713 | + {0x00009d04, 0x40206c10}, |
| 714 | + {0x00009d08, 0x009c4060}, |
| 715 | + {0x00009d0c, 0x9883800a}, |
| 716 | + {0x00009d10, 0x01834061}, |
| 717 | + {0x00009d14, 0x00c0040b}, |
| 718 | + {0x00009d18, 0x00000000}, |
| 719 | + {0x00009e08, 0x0038230c}, |
| 720 | + {0x00009e24, 0x990bb515}, |
| 721 | + {0x00009e28, 0x0c6f0000}, |
| 722 | + {0x00009e30, 0x06336f77}, |
| 723 | + {0x00009e34, 0x6af6532f}, |
| 724 | + {0x00009e38, 0x0cc80c00}, |
| 725 | + {0x00009e3c, 0xcf946222}, |
| 726 | + {0x00009e40, 0x0d261820}, |
| 727 | + {0x00009e4c, 0x00001004}, |
| 728 | + {0x00009e50, 0x00ff03f1}, |
| 729 | + {0x00009e54, 0x00000000}, |
| 730 | + {0x00009fc0, 0x803e4788}, |
| 731 | + {0x00009fc4, 0x0001efb5}, |
| 732 | + {0x00009fcc, 0x40000014}, |
| 733 | + {0x00009fd0, 0x01193b93}, |
| 734 | + {0x0000a20c, 0x00000000}, |
| 735 | + {0x0000a220, 0x00000000}, |
| 736 | + {0x0000a224, 0x00000000}, |
| 737 | + {0x0000a228, 0x10002310}, |
| 738 | + {0x0000a22c, 0x01036a1e}, |
| 739 | + {0x0000a234, 0x10000fff}, |
| 740 | + {0x0000a23c, 0x00000000}, |
| 741 | + {0x0000a244, 0x0c000000}, |
| 742 | + {0x0000a2a0, 0x00000001}, |
| 743 | + {0x0000a2c0, 0x00000001}, |
| 744 | + {0x0000a2c8, 0x00000000}, |
| 745 | + {0x0000a2cc, 0x18c43433}, |
| 746 | + {0x0000a2d4, 0x00000000}, |
| 747 | + {0x0000a2dc, 0x00000000}, |
| 748 | + {0x0000a2e0, 0x00000000}, |
| 749 | + {0x0000a2e4, 0x00000000}, |
| 750 | + {0x0000a2e8, 0x00000000}, |
| 751 | + {0x0000a2ec, 0x00000000}, |
| 752 | + {0x0000a2f0, 0x00000000}, |
| 753 | + {0x0000a2f4, 0x00000000}, |
| 754 | + {0x0000a2f8, 0x00000000}, |
| 755 | + {0x0000a344, 0x00000000}, |
| 756 | + {0x0000a34c, 0x00000000}, |
| 757 | + {0x0000a350, 0x0000a000}, |
| 758 | + {0x0000a364, 0x00000000}, |
| 759 | + {0x0000a370, 0x00000000}, |
| 760 | + {0x0000a390, 0x00000001}, |
| 761 | + {0x0000a394, 0x00000444}, |
| 762 | + {0x0000a398, 0x001f0e0f}, |
| 763 | + {0x0000a39c, 0x0075393f}, |
| 764 | + {0x0000a3a0, 0xb79f6427}, |
| 765 | + {0x0000a3a4, 0x00000000}, |
| 766 | + {0x0000a3a8, 0xaaaaaaaa}, |
| 767 | + {0x0000a3ac, 0x3c466478}, |
| 768 | + {0x0000a3c0, 0x20202020}, |
| 769 | + {0x0000a3c4, 0x22222220}, |
| 770 | + {0x0000a3c8, 0x20200020}, |
| 771 | + {0x0000a3cc, 0x20202020}, |
| 772 | + {0x0000a3d0, 0x20202020}, |
| 773 | + {0x0000a3d4, 0x20202020}, |
| 774 | + {0x0000a3d8, 0x20202020}, |
| 775 | + {0x0000a3dc, 0x20202020}, |
| 776 | + {0x0000a3e0, 0x20202020}, |
| 777 | + {0x0000a3e4, 0x20202020}, |
| 778 | + {0x0000a3e8, 0x20202020}, |
| 779 | + {0x0000a3ec, 0x20202020}, |
| 780 | + {0x0000a3f0, 0x00000000}, |
| 781 | + {0x0000a3f4, 0x00000246}, |
| 782 | + {0x0000a3f8, 0x0cdbd380}, |
| 783 | + {0x0000a3fc, 0x000f0f01}, |
| 784 | + {0x0000a400, 0x8fa91f01}, |
| 785 | + {0x0000a404, 0x00000000}, |
| 786 | + {0x0000a408, 0x0e79e5c6}, |
| 787 | + {0x0000a40c, 0x00820820}, |
| 788 | + {0x0000a414, 0x1ce739ce}, |
| 789 | + {0x0000a418, 0x2d001dce}, |
| 790 | + {0x0000a41c, 0x1ce739ce}, |
| 791 | + {0x0000a420, 0x000001ce}, |
| 792 | + {0x0000a424, 0x1ce739ce}, |
| 793 | + {0x0000a428, 0x000001ce}, |
| 794 | + {0x0000a42c, 0x1ce739ce}, |
| 795 | + {0x0000a430, 0x1ce739ce}, |
| 796 | + {0x0000a434, 0x00000000}, |
| 797 | + {0x0000a438, 0x00001801}, |
| 798 | + {0x0000a43c, 0x00000000}, |
| 799 | + {0x0000a440, 0x00000000}, |
| 800 | + {0x0000a444, 0x00000000}, |
| 801 | + {0x0000a448, 0x04000080}, |
| 802 | + {0x0000a44c, 0x00000001}, |
| 803 | + {0x0000a450, 0x00010000}, |
| 804 | + {0x0000a458, 0x00000000}, |
| 805 | + {0x0000a600, 0x00000000}, |
| 806 | + {0x0000a604, 0x00000000}, |
| 807 | + {0x0000a608, 0x00000000}, |
| 808 | + {0x0000a60c, 0x00000000}, |
| 809 | + {0x0000a610, 0x00000000}, |
| 810 | + {0x0000a614, 0x00000000}, |
| 811 | + {0x0000a618, 0x00000000}, |
| 812 | + {0x0000a61c, 0x00000000}, |
| 813 | + {0x0000a620, 0x00000000}, |
| 814 | + {0x0000a624, 0x00000000}, |
| 815 | + {0x0000a628, 0x00000000}, |
| 816 | + {0x0000a62c, 0x00000000}, |
| 817 | + {0x0000a630, 0x00000000}, |
| 818 | + {0x0000a634, 0x00000000}, |
| 819 | + {0x0000a638, 0x00000000}, |
| 820 | + {0x0000a63c, 0x00000000}, |
| 821 | + {0x0000a640, 0x00000000}, |
| 822 | + {0x0000a644, 0x3fad9d74}, |
| 823 | + {0x0000a648, 0x0048060a}, |
| 824 | + {0x0000a64c, 0x00000637}, |
| 825 | + {0x0000a670, 0x03020100}, |
| 826 | + {0x0000a674, 0x09080504}, |
| 827 | + {0x0000a678, 0x0d0c0b0a}, |
| 828 | + {0x0000a67c, 0x13121110}, |
| 829 | + {0x0000a680, 0x31301514}, |
| 830 | + {0x0000a684, 0x35343332}, |
| 831 | + {0x0000a688, 0x00000036}, |
| 832 | + {0x0000a690, 0x00000838}, |
| 833 | + {0x0000a7c0, 0x00000000}, |
| 834 | + {0x0000a7c4, 0xfffffffc}, |
| 835 | + {0x0000a7c8, 0x00000000}, |
| 836 | + {0x0000a7cc, 0x00000000}, |
| 837 | + {0x0000a7d0, 0x00000000}, |
| 838 | + {0x0000a7d4, 0x00000004}, |
| 839 | + {0x0000a7dc, 0x00000001}, |
| 840 | + {0x0000a8d0, 0x004b6a8e}, |
| 841 | + {0x0000a8d4, 0x00000820}, |
| 842 | + {0x0000a8dc, 0x00000000}, |
| 843 | + {0x0000a8f0, 0x00000000}, |
| 844 | + {0x0000a8f4, 0x00000000}, |
| 845 | + {0x0000b2d0, 0x00000080}, |
| 846 | + {0x0000b2d4, 0x00000000}, |
| 847 | + {0x0000b2dc, 0x00000000}, |
| 848 | + {0x0000b2e0, 0x00000000}, |
| 849 | + {0x0000b2e4, 0x00000000}, |
| 850 | + {0x0000b2e8, 0x00000000}, |
| 851 | + {0x0000b2ec, 0x00000000}, |
| 852 | + {0x0000b2f0, 0x00000000}, |
| 853 | + {0x0000b2f4, 0x00000000}, |
| 854 | + {0x0000b2f8, 0x00000000}, |
| 855 | + {0x0000b408, 0x0e79e5c0}, |
| 856 | + {0x0000b40c, 0x00820820}, |
| 857 | + {0x0000b420, 0x00000000}, |
| 858 | + {0x0000b8d0, 0x004b6a8e}, |
| 859 | + {0x0000b8d4, 0x00000820}, |
| 860 | + {0x0000b8dc, 0x00000000}, |
| 861 | + {0x0000b8f0, 0x00000000}, |
| 862 | + {0x0000b8f4, 0x00000000}, |
| 863 | + {0x0000c2d0, 0x00000080}, |
| 864 | + {0x0000c2d4, 0x00000000}, |
| 865 | + {0x0000c2dc, 0x00000000}, |
| 866 | + {0x0000c2e0, 0x00000000}, |
| 867 | + {0x0000c2e4, 0x00000000}, |
| 868 | + {0x0000c2e8, 0x00000000}, |
| 869 | + {0x0000c2ec, 0x00000000}, |
| 870 | + {0x0000c2f0, 0x00000000}, |
| 871 | + {0x0000c2f4, 0x00000000}, |
| 872 | + {0x0000c2f8, 0x00000000}, |
| 873 | + {0x0000c408, 0x0e79e5c0}, |
| 874 | + {0x0000c40c, 0x00820820}, |
| 875 | + {0x0000c420, 0x00000000}, |
| 876 | +}; |
| 877 | + |
| 878 | +static const u32 ar9300Modes_high_power_tx_gain_table_2p0[][5] = { |
| 879 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 880 | + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 881 | + {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, |
| 882 | + {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002}, |
| 883 | + {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, |
| 884 | + {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, |
| 885 | + {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, |
| 886 | + {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, |
| 887 | + {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, |
| 888 | + {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, |
| 889 | + {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, |
| 890 | + {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, |
| 891 | + {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, |
| 892 | + {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, |
| 893 | + {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20}, |
| 894 | + {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22}, |
| 895 | + {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24}, |
| 896 | + {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640}, |
| 897 | + {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660}, |
| 898 | + {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861}, |
| 899 | + {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81}, |
| 900 | + {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, |
| 901 | + {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84}, |
| 902 | + {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3}, |
| 903 | + {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5}, |
| 904 | + {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9}, |
| 905 | + {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb}, |
| 906 | + {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 907 | + {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 908 | + {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 909 | + {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 910 | + {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 911 | + {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 912 | + {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 913 | + {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, |
| 914 | + {0x0000a584, 0x06802223, 0x06802223, 0x04800002, 0x04800002}, |
| 915 | + {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, |
| 916 | + {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, |
| 917 | + {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, |
| 918 | + {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, |
| 919 | + {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, |
| 920 | + {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, |
| 921 | + {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, |
| 922 | + {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, |
| 923 | + {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, |
| 924 | + {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, |
| 925 | + {0x0000a5b0, 0x34825643, 0x34825643, 0x2a800e20, 0x2a800e20}, |
| 926 | + {0x0000a5b4, 0x38825a44, 0x38825a44, 0x2e800e22, 0x2e800e22}, |
| 927 | + {0x0000a5b8, 0x3b825e45, 0x3b825e45, 0x31800e24, 0x31800e24}, |
| 928 | + {0x0000a5bc, 0x41825e4a, 0x41825e4a, 0x34801640, 0x34801640}, |
| 929 | + {0x0000a5c0, 0x48825e6c, 0x48825e6c, 0x38801660, 0x38801660}, |
| 930 | + {0x0000a5c4, 0x4e825e8e, 0x4e825e8e, 0x3b801861, 0x3b801861}, |
| 931 | + {0x0000a5c8, 0x53825eb2, 0x53825eb2, 0x3e801a81, 0x3e801a81}, |
| 932 | + {0x0000a5cc, 0x59825eb5, 0x59825eb5, 0x42801a83, 0x42801a83}, |
| 933 | + {0x0000a5d0, 0x5f825ef6, 0x5f825ef6, 0x44801c84, 0x44801c84}, |
| 934 | + {0x0000a5d4, 0x62825f56, 0x62825f56, 0x48801ce3, 0x48801ce3}, |
| 935 | + {0x0000a5d8, 0x66827f56, 0x66827f56, 0x4c801ce5, 0x4c801ce5}, |
| 936 | + {0x0000a5dc, 0x6a829f56, 0x6a829f56, 0x50801ce9, 0x50801ce9}, |
| 937 | + {0x0000a5e0, 0x70849f56, 0x70849f56, 0x54801ceb, 0x54801ceb}, |
| 938 | + {0x0000a5e4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 939 | + {0x0000a5e8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 940 | + {0x0000a5ec, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 941 | + {0x0000a5f0, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 942 | + {0x0000a5f4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 943 | + {0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 944 | + {0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 945 | + {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 946 | + {0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 947 | + {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 948 | + {0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 949 | + {0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 950 | + {0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 951 | + {0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 952 | + {0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 953 | + {0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 954 | +}; |
| 955 | + |
| 956 | +static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p0[][5] = { |
| 957 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 958 | + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 959 | + {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, |
| 960 | + {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002}, |
| 961 | + {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, |
| 962 | + {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, |
| 963 | + {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, |
| 964 | + {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, |
| 965 | + {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, |
| 966 | + {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, |
| 967 | + {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, |
| 968 | + {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, |
| 969 | + {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, |
| 970 | + {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, |
| 971 | + {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20}, |
| 972 | + {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22}, |
| 973 | + {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24}, |
| 974 | + {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640}, |
| 975 | + {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660}, |
| 976 | + {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861}, |
| 977 | + {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81}, |
| 978 | + {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, |
| 979 | + {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84}, |
| 980 | + {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3}, |
| 981 | + {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5}, |
| 982 | + {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9}, |
| 983 | + {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb}, |
| 984 | + {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 985 | + {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 986 | + {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 987 | + {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 988 | + {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 989 | + {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 990 | + {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 991 | + {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, |
| 992 | + {0x0000a584, 0x06802223, 0x06802223, 0x04800002, 0x04800002}, |
| 993 | + {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, |
| 994 | + {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, |
| 995 | + {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, |
| 996 | + {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, |
| 997 | + {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, |
| 998 | + {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, |
| 999 | + {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, |
| 1000 | + {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, |
| 1001 | + {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, |
| 1002 | + {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, |
| 1003 | + {0x0000a5b0, 0x34825643, 0x34825643, 0x2a800e20, 0x2a800e20}, |
| 1004 | + {0x0000a5b4, 0x38825a44, 0x38825a44, 0x2e800e22, 0x2e800e22}, |
| 1005 | + {0x0000a5b8, 0x3b825e45, 0x3b825e45, 0x31800e24, 0x31800e24}, |
| 1006 | + {0x0000a5bc, 0x41825e4a, 0x41825e4a, 0x34801640, 0x34801640}, |
| 1007 | + {0x0000a5c0, 0x48825e6c, 0x48825e6c, 0x38801660, 0x38801660}, |
| 1008 | + {0x0000a5c4, 0x4e825e8e, 0x4e825e8e, 0x3b801861, 0x3b801861}, |
| 1009 | + {0x0000a5c8, 0x53825eb2, 0x53825eb2, 0x3e801a81, 0x3e801a81}, |
| 1010 | + {0x0000a5cc, 0x59825eb5, 0x59825eb5, 0x42801a83, 0x42801a83}, |
| 1011 | + {0x0000a5d0, 0x5f825ef6, 0x5f825ef6, 0x44801c84, 0x44801c84}, |
| 1012 | + {0x0000a5d4, 0x62825f56, 0x62825f56, 0x48801ce3, 0x48801ce3}, |
| 1013 | + {0x0000a5d8, 0x66827f56, 0x66827f56, 0x4c801ce5, 0x4c801ce5}, |
| 1014 | + {0x0000a5dc, 0x6a829f56, 0x6a829f56, 0x50801ce9, 0x50801ce9}, |
| 1015 | + {0x0000a5e0, 0x70849f56, 0x70849f56, 0x54801ceb, 0x54801ceb}, |
| 1016 | + {0x0000a5e4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 1017 | + {0x0000a5e8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 1018 | + {0x0000a5ec, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 1019 | + {0x0000a5f0, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 1020 | + {0x0000a5f4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 1021 | + {0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 1022 | + {0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 1023 | + {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 1024 | + {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 1025 | + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1026 | + {0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 1027 | + {0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 1028 | + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1029 | + {0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 1030 | + {0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 1031 | + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1032 | +}; |
| 1033 | + |
| 1034 | +static const u32 ar9300Common_rx_gain_table_2p0[][2] = { |
| 1035 | + /* Addr allmodes */ |
| 1036 | + {0x0000a000, 0x00010000}, |
| 1037 | + {0x0000a004, 0x00030002}, |
| 1038 | + {0x0000a008, 0x00050004}, |
| 1039 | + {0x0000a00c, 0x00810080}, |
| 1040 | + {0x0000a010, 0x00830082}, |
| 1041 | + {0x0000a014, 0x01810180}, |
| 1042 | + {0x0000a018, 0x01830182}, |
| 1043 | + {0x0000a01c, 0x01850184}, |
| 1044 | + {0x0000a020, 0x01890188}, |
| 1045 | + {0x0000a024, 0x018b018a}, |
| 1046 | + {0x0000a028, 0x018d018c}, |
| 1047 | + {0x0000a02c, 0x01910190}, |
| 1048 | + {0x0000a030, 0x01930192}, |
| 1049 | + {0x0000a034, 0x01950194}, |
| 1050 | + {0x0000a038, 0x038a0196}, |
| 1051 | + {0x0000a03c, 0x038c038b}, |
| 1052 | + {0x0000a040, 0x0390038d}, |
| 1053 | + {0x0000a044, 0x03920391}, |
| 1054 | + {0x0000a048, 0x03940393}, |
| 1055 | + {0x0000a04c, 0x03960395}, |
| 1056 | + {0x0000a050, 0x00000000}, |
| 1057 | + {0x0000a054, 0x00000000}, |
| 1058 | + {0x0000a058, 0x00000000}, |
| 1059 | + {0x0000a05c, 0x00000000}, |
| 1060 | + {0x0000a060, 0x00000000}, |
| 1061 | + {0x0000a064, 0x00000000}, |
| 1062 | + {0x0000a068, 0x00000000}, |
| 1063 | + {0x0000a06c, 0x00000000}, |
| 1064 | + {0x0000a070, 0x00000000}, |
| 1065 | + {0x0000a074, 0x00000000}, |
| 1066 | + {0x0000a078, 0x00000000}, |
| 1067 | + {0x0000a07c, 0x00000000}, |
| 1068 | + {0x0000a080, 0x22222229}, |
| 1069 | + {0x0000a084, 0x1d1d1d1d}, |
| 1070 | + {0x0000a088, 0x1d1d1d1d}, |
| 1071 | + {0x0000a08c, 0x1d1d1d1d}, |
| 1072 | + {0x0000a090, 0x171d1d1d}, |
| 1073 | + {0x0000a094, 0x11111717}, |
| 1074 | + {0x0000a098, 0x00030311}, |
| 1075 | + {0x0000a09c, 0x00000000}, |
| 1076 | + {0x0000a0a0, 0x00000000}, |
| 1077 | + {0x0000a0a4, 0x00000000}, |
| 1078 | + {0x0000a0a8, 0x00000000}, |
| 1079 | + {0x0000a0ac, 0x00000000}, |
| 1080 | + {0x0000a0b0, 0x00000000}, |
| 1081 | + {0x0000a0b4, 0x00000000}, |
| 1082 | + {0x0000a0b8, 0x00000000}, |
| 1083 | + {0x0000a0bc, 0x00000000}, |
| 1084 | + {0x0000a0c0, 0x001f0000}, |
| 1085 | + {0x0000a0c4, 0x01000101}, |
| 1086 | + {0x0000a0c8, 0x011e011f}, |
| 1087 | + {0x0000a0cc, 0x011c011d}, |
| 1088 | + {0x0000a0d0, 0x02030204}, |
| 1089 | + {0x0000a0d4, 0x02010202}, |
| 1090 | + {0x0000a0d8, 0x021f0200}, |
| 1091 | + {0x0000a0dc, 0x0302021e}, |
| 1092 | + {0x0000a0e0, 0x03000301}, |
| 1093 | + {0x0000a0e4, 0x031e031f}, |
| 1094 | + {0x0000a0e8, 0x0402031d}, |
| 1095 | + {0x0000a0ec, 0x04000401}, |
| 1096 | + {0x0000a0f0, 0x041e041f}, |
| 1097 | + {0x0000a0f4, 0x0502041d}, |
| 1098 | + {0x0000a0f8, 0x05000501}, |
| 1099 | + {0x0000a0fc, 0x051e051f}, |
| 1100 | + {0x0000a100, 0x06010602}, |
| 1101 | + {0x0000a104, 0x061f0600}, |
| 1102 | + {0x0000a108, 0x061d061e}, |
| 1103 | + {0x0000a10c, 0x07020703}, |
| 1104 | + {0x0000a110, 0x07000701}, |
| 1105 | + {0x0000a114, 0x00000000}, |
| 1106 | + {0x0000a118, 0x00000000}, |
| 1107 | + {0x0000a11c, 0x00000000}, |
| 1108 | + {0x0000a120, 0x00000000}, |
| 1109 | + {0x0000a124, 0x00000000}, |
| 1110 | + {0x0000a128, 0x00000000}, |
| 1111 | + {0x0000a12c, 0x00000000}, |
| 1112 | + {0x0000a130, 0x00000000}, |
| 1113 | + {0x0000a134, 0x00000000}, |
| 1114 | + {0x0000a138, 0x00000000}, |
| 1115 | + {0x0000a13c, 0x00000000}, |
| 1116 | + {0x0000a140, 0x001f0000}, |
| 1117 | + {0x0000a144, 0x01000101}, |
| 1118 | + {0x0000a148, 0x011e011f}, |
| 1119 | + {0x0000a14c, 0x011c011d}, |
| 1120 | + {0x0000a150, 0x02030204}, |
| 1121 | + {0x0000a154, 0x02010202}, |
| 1122 | + {0x0000a158, 0x021f0200}, |
| 1123 | + {0x0000a15c, 0x0302021e}, |
| 1124 | + {0x0000a160, 0x03000301}, |
| 1125 | + {0x0000a164, 0x031e031f}, |
| 1126 | + {0x0000a168, 0x0402031d}, |
| 1127 | + {0x0000a16c, 0x04000401}, |
| 1128 | + {0x0000a170, 0x041e041f}, |
| 1129 | + {0x0000a174, 0x0502041d}, |
| 1130 | + {0x0000a178, 0x05000501}, |
| 1131 | + {0x0000a17c, 0x051e051f}, |
| 1132 | + {0x0000a180, 0x06010602}, |
| 1133 | + {0x0000a184, 0x061f0600}, |
| 1134 | + {0x0000a188, 0x061d061e}, |
| 1135 | + {0x0000a18c, 0x07020703}, |
| 1136 | + {0x0000a190, 0x07000701}, |
| 1137 | + {0x0000a194, 0x00000000}, |
| 1138 | + {0x0000a198, 0x00000000}, |
| 1139 | + {0x0000a19c, 0x00000000}, |
| 1140 | + {0x0000a1a0, 0x00000000}, |
| 1141 | + {0x0000a1a4, 0x00000000}, |
| 1142 | + {0x0000a1a8, 0x00000000}, |
| 1143 | + {0x0000a1ac, 0x00000000}, |
| 1144 | + {0x0000a1b0, 0x00000000}, |
| 1145 | + {0x0000a1b4, 0x00000000}, |
| 1146 | + {0x0000a1b8, 0x00000000}, |
| 1147 | + {0x0000a1bc, 0x00000000}, |
| 1148 | + {0x0000a1c0, 0x00000000}, |
| 1149 | + {0x0000a1c4, 0x00000000}, |
| 1150 | + {0x0000a1c8, 0x00000000}, |
| 1151 | + {0x0000a1cc, 0x00000000}, |
| 1152 | + {0x0000a1d0, 0x00000000}, |
| 1153 | + {0x0000a1d4, 0x00000000}, |
| 1154 | + {0x0000a1d8, 0x00000000}, |
| 1155 | + {0x0000a1dc, 0x00000000}, |
| 1156 | + {0x0000a1e0, 0x00000000}, |
| 1157 | + {0x0000a1e4, 0x00000000}, |
| 1158 | + {0x0000a1e8, 0x00000000}, |
| 1159 | + {0x0000a1ec, 0x00000000}, |
| 1160 | + {0x0000a1f0, 0x00000396}, |
| 1161 | + {0x0000a1f4, 0x00000396}, |
| 1162 | + {0x0000a1f8, 0x00000396}, |
| 1163 | + {0x0000a1fc, 0x00000196}, |
| 1164 | + {0x0000b000, 0x00010000}, |
| 1165 | + {0x0000b004, 0x00030002}, |
| 1166 | + {0x0000b008, 0x00050004}, |
| 1167 | + {0x0000b00c, 0x00810080}, |
| 1168 | + {0x0000b010, 0x00830082}, |
| 1169 | + {0x0000b014, 0x01810180}, |
| 1170 | + {0x0000b018, 0x01830182}, |
| 1171 | + {0x0000b01c, 0x01850184}, |
| 1172 | + {0x0000b020, 0x02810280}, |
| 1173 | + {0x0000b024, 0x02830282}, |
| 1174 | + {0x0000b028, 0x02850284}, |
| 1175 | + {0x0000b02c, 0x02890288}, |
| 1176 | + {0x0000b030, 0x028b028a}, |
| 1177 | + {0x0000b034, 0x0388028c}, |
| 1178 | + {0x0000b038, 0x038a0389}, |
| 1179 | + {0x0000b03c, 0x038c038b}, |
| 1180 | + {0x0000b040, 0x0390038d}, |
| 1181 | + {0x0000b044, 0x03920391}, |
| 1182 | + {0x0000b048, 0x03940393}, |
| 1183 | + {0x0000b04c, 0x03960395}, |
| 1184 | + {0x0000b050, 0x00000000}, |
| 1185 | + {0x0000b054, 0x00000000}, |
| 1186 | + {0x0000b058, 0x00000000}, |
| 1187 | + {0x0000b05c, 0x00000000}, |
| 1188 | + {0x0000b060, 0x00000000}, |
| 1189 | + {0x0000b064, 0x00000000}, |
| 1190 | + {0x0000b068, 0x00000000}, |
| 1191 | + {0x0000b06c, 0x00000000}, |
| 1192 | + {0x0000b070, 0x00000000}, |
| 1193 | + {0x0000b074, 0x00000000}, |
| 1194 | + {0x0000b078, 0x00000000}, |
| 1195 | + {0x0000b07c, 0x00000000}, |
| 1196 | + {0x0000b080, 0x32323232}, |
| 1197 | + {0x0000b084, 0x2f2f3232}, |
| 1198 | + {0x0000b088, 0x23282a2d}, |
| 1199 | + {0x0000b08c, 0x1c1e2123}, |
| 1200 | + {0x0000b090, 0x14171919}, |
| 1201 | + {0x0000b094, 0x0e0e1214}, |
| 1202 | + {0x0000b098, 0x03050707}, |
| 1203 | + {0x0000b09c, 0x00030303}, |
| 1204 | + {0x0000b0a0, 0x00000000}, |
| 1205 | + {0x0000b0a4, 0x00000000}, |
| 1206 | + {0x0000b0a8, 0x00000000}, |
| 1207 | + {0x0000b0ac, 0x00000000}, |
| 1208 | + {0x0000b0b0, 0x00000000}, |
| 1209 | + {0x0000b0b4, 0x00000000}, |
| 1210 | + {0x0000b0b8, 0x00000000}, |
| 1211 | + {0x0000b0bc, 0x00000000}, |
| 1212 | + {0x0000b0c0, 0x003f0020}, |
| 1213 | + {0x0000b0c4, 0x00400041}, |
| 1214 | + {0x0000b0c8, 0x0140005f}, |
| 1215 | + {0x0000b0cc, 0x0160015f}, |
| 1216 | + {0x0000b0d0, 0x017e017f}, |
| 1217 | + {0x0000b0d4, 0x02410242}, |
| 1218 | + {0x0000b0d8, 0x025f0240}, |
| 1219 | + {0x0000b0dc, 0x027f0260}, |
| 1220 | + {0x0000b0e0, 0x0341027e}, |
| 1221 | + {0x0000b0e4, 0x035f0340}, |
| 1222 | + {0x0000b0e8, 0x037f0360}, |
| 1223 | + {0x0000b0ec, 0x04400441}, |
| 1224 | + {0x0000b0f0, 0x0460045f}, |
| 1225 | + {0x0000b0f4, 0x0541047f}, |
| 1226 | + {0x0000b0f8, 0x055f0540}, |
| 1227 | + {0x0000b0fc, 0x057f0560}, |
| 1228 | + {0x0000b100, 0x06400641}, |
| 1229 | + {0x0000b104, 0x0660065f}, |
| 1230 | + {0x0000b108, 0x067e067f}, |
| 1231 | + {0x0000b10c, 0x07410742}, |
| 1232 | + {0x0000b110, 0x075f0740}, |
| 1233 | + {0x0000b114, 0x077f0760}, |
| 1234 | + {0x0000b118, 0x07800781}, |
| 1235 | + {0x0000b11c, 0x07a0079f}, |
| 1236 | + {0x0000b120, 0x07c107bf}, |
| 1237 | + {0x0000b124, 0x000007c0}, |
| 1238 | + {0x0000b128, 0x00000000}, |
| 1239 | + {0x0000b12c, 0x00000000}, |
| 1240 | + {0x0000b130, 0x00000000}, |
| 1241 | + {0x0000b134, 0x00000000}, |
| 1242 | + {0x0000b138, 0x00000000}, |
| 1243 | + {0x0000b13c, 0x00000000}, |
| 1244 | + {0x0000b140, 0x003f0020}, |
| 1245 | + {0x0000b144, 0x00400041}, |
| 1246 | + {0x0000b148, 0x0140005f}, |
| 1247 | + {0x0000b14c, 0x0160015f}, |
| 1248 | + {0x0000b150, 0x017e017f}, |
| 1249 | + {0x0000b154, 0x02410242}, |
| 1250 | + {0x0000b158, 0x025f0240}, |
| 1251 | + {0x0000b15c, 0x027f0260}, |
| 1252 | + {0x0000b160, 0x0341027e}, |
| 1253 | + {0x0000b164, 0x035f0340}, |
| 1254 | + {0x0000b168, 0x037f0360}, |
| 1255 | + {0x0000b16c, 0x04400441}, |
| 1256 | + {0x0000b170, 0x0460045f}, |
| 1257 | + {0x0000b174, 0x0541047f}, |
| 1258 | + {0x0000b178, 0x055f0540}, |
| 1259 | + {0x0000b17c, 0x057f0560}, |
| 1260 | + {0x0000b180, 0x06400641}, |
| 1261 | + {0x0000b184, 0x0660065f}, |
| 1262 | + {0x0000b188, 0x067e067f}, |
| 1263 | + {0x0000b18c, 0x07410742}, |
| 1264 | + {0x0000b190, 0x075f0740}, |
| 1265 | + {0x0000b194, 0x077f0760}, |
| 1266 | + {0x0000b198, 0x07800781}, |
| 1267 | + {0x0000b19c, 0x07a0079f}, |
| 1268 | + {0x0000b1a0, 0x07c107bf}, |
| 1269 | + {0x0000b1a4, 0x000007c0}, |
| 1270 | + {0x0000b1a8, 0x00000000}, |
| 1271 | + {0x0000b1ac, 0x00000000}, |
| 1272 | + {0x0000b1b0, 0x00000000}, |
| 1273 | + {0x0000b1b4, 0x00000000}, |
| 1274 | + {0x0000b1b8, 0x00000000}, |
| 1275 | + {0x0000b1bc, 0x00000000}, |
| 1276 | + {0x0000b1c0, 0x00000000}, |
| 1277 | + {0x0000b1c4, 0x00000000}, |
| 1278 | + {0x0000b1c8, 0x00000000}, |
| 1279 | + {0x0000b1cc, 0x00000000}, |
| 1280 | + {0x0000b1d0, 0x00000000}, |
| 1281 | + {0x0000b1d4, 0x00000000}, |
| 1282 | + {0x0000b1d8, 0x00000000}, |
| 1283 | + {0x0000b1dc, 0x00000000}, |
| 1284 | + {0x0000b1e0, 0x00000000}, |
| 1285 | + {0x0000b1e4, 0x00000000}, |
| 1286 | + {0x0000b1e8, 0x00000000}, |
| 1287 | + {0x0000b1ec, 0x00000000}, |
| 1288 | + {0x0000b1f0, 0x00000396}, |
| 1289 | + {0x0000b1f4, 0x00000396}, |
| 1290 | + {0x0000b1f8, 0x00000396}, |
| 1291 | + {0x0000b1fc, 0x00000196}, |
| 1292 | +}; |
| 1293 | + |
| 1294 | +static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p0[][5] = { |
| 1295 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 1296 | + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 1297 | + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 1298 | + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, |
| 1299 | + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, |
| 1300 | + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, |
| 1301 | + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, |
| 1302 | + {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, |
| 1303 | + {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402}, |
| 1304 | + {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404}, |
| 1305 | + {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, |
| 1306 | + {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, |
| 1307 | + {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, |
| 1308 | + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, |
| 1309 | + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, |
| 1310 | + {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, |
| 1311 | + {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, |
| 1312 | + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, |
| 1313 | + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, |
| 1314 | + {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, |
| 1315 | + {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, |
| 1316 | + {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83}, |
| 1317 | + {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84}, |
| 1318 | + {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3}, |
| 1319 | + {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5}, |
| 1320 | + {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9}, |
| 1321 | + {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb}, |
| 1322 | + {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 1323 | + {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 1324 | + {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 1325 | + {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 1326 | + {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 1327 | + {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 1328 | + {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 1329 | + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 1330 | + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, |
| 1331 | + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, |
| 1332 | + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, |
| 1333 | + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, |
| 1334 | + {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, |
| 1335 | + {0x0000a598, 0x21820220, 0x21820220, 0x16800402, 0x16800402}, |
| 1336 | + {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404}, |
| 1337 | + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, |
| 1338 | + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, |
| 1339 | + {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, |
| 1340 | + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, |
| 1341 | + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, |
| 1342 | + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, |
| 1343 | + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, |
| 1344 | + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, |
| 1345 | + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, |
| 1346 | + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, |
| 1347 | + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, |
| 1348 | + {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x47801a83, 0x47801a83}, |
| 1349 | + {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4a801c84, 0x4a801c84}, |
| 1350 | + {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4e801ce3, 0x4e801ce3}, |
| 1351 | + {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x52801ce5, 0x52801ce5}, |
| 1352 | + {0x0000a5dc, 0x7086308c, 0x7086308c, 0x56801ce9, 0x56801ce9}, |
| 1353 | + {0x0000a5e0, 0x738a308a, 0x738a308a, 0x5a801ceb, 0x5a801ceb}, |
| 1354 | + {0x0000a5e4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 1355 | + {0x0000a5e8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 1356 | + {0x0000a5ec, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 1357 | + {0x0000a5f0, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 1358 | + {0x0000a5f4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 1359 | + {0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 1360 | + {0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 1361 | + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 1362 | + {0x00016048, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, |
| 1363 | + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1364 | + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 1365 | + {0x00016448, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, |
| 1366 | + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1367 | + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 1368 | + {0x00016848, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, |
| 1369 | + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1370 | +}; |
| 1371 | + |
| 1372 | +static const u32 ar9300_2p0_mac_core[][2] = { |
| 1373 | + /* Addr allmodes */ |
| 1374 | + {0x00000008, 0x00000000}, |
| 1375 | + {0x00000030, 0x00020085}, |
| 1376 | + {0x00000034, 0x00000005}, |
| 1377 | + {0x00000040, 0x00000000}, |
| 1378 | + {0x00000044, 0x00000000}, |
| 1379 | + {0x00000048, 0x00000008}, |
| 1380 | + {0x0000004c, 0x00000010}, |
| 1381 | + {0x00000050, 0x00000000}, |
| 1382 | + {0x00001040, 0x002ffc0f}, |
| 1383 | + {0x00001044, 0x002ffc0f}, |
| 1384 | + {0x00001048, 0x002ffc0f}, |
| 1385 | + {0x0000104c, 0x002ffc0f}, |
| 1386 | + {0x00001050, 0x002ffc0f}, |
| 1387 | + {0x00001054, 0x002ffc0f}, |
| 1388 | + {0x00001058, 0x002ffc0f}, |
| 1389 | + {0x0000105c, 0x002ffc0f}, |
| 1390 | + {0x00001060, 0x002ffc0f}, |
| 1391 | + {0x00001064, 0x002ffc0f}, |
| 1392 | + {0x000010f0, 0x00000100}, |
| 1393 | + {0x00001270, 0x00000000}, |
| 1394 | + {0x000012b0, 0x00000000}, |
| 1395 | + {0x000012f0, 0x00000000}, |
| 1396 | + {0x0000143c, 0x00000000}, |
| 1397 | + {0x0000147c, 0x00000000}, |
| 1398 | + {0x00008000, 0x00000000}, |
| 1399 | + {0x00008004, 0x00000000}, |
| 1400 | + {0x00008008, 0x00000000}, |
| 1401 | + {0x0000800c, 0x00000000}, |
| 1402 | + {0x00008018, 0x00000000}, |
| 1403 | + {0x00008020, 0x00000000}, |
| 1404 | + {0x00008038, 0x00000000}, |
| 1405 | + {0x0000803c, 0x00000000}, |
| 1406 | + {0x00008040, 0x00000000}, |
| 1407 | + {0x00008044, 0x00000000}, |
| 1408 | + {0x00008048, 0x00000000}, |
| 1409 | + {0x0000804c, 0xffffffff}, |
| 1410 | + {0x00008054, 0x00000000}, |
| 1411 | + {0x00008058, 0x00000000}, |
| 1412 | + {0x0000805c, 0x000fc78f}, |
| 1413 | + {0x00008060, 0x0000000f}, |
| 1414 | + {0x00008064, 0x00000000}, |
| 1415 | + {0x00008070, 0x00000310}, |
| 1416 | + {0x00008074, 0x00000020}, |
| 1417 | + {0x00008078, 0x00000000}, |
| 1418 | + {0x0000809c, 0x0000000f}, |
| 1419 | + {0x000080a0, 0x00000000}, |
| 1420 | + {0x000080a4, 0x02ff0000}, |
| 1421 | + {0x000080a8, 0x0e070605}, |
| 1422 | + {0x000080ac, 0x0000000d}, |
| 1423 | + {0x000080b0, 0x00000000}, |
| 1424 | + {0x000080b4, 0x00000000}, |
| 1425 | + {0x000080b8, 0x00000000}, |
| 1426 | + {0x000080bc, 0x00000000}, |
| 1427 | + {0x000080c0, 0x2a800000}, |
| 1428 | + {0x000080c4, 0x06900168}, |
| 1429 | + {0x000080c8, 0x13881c20}, |
| 1430 | + {0x000080cc, 0x01f40000}, |
| 1431 | + {0x000080d0, 0x00252500}, |
| 1432 | + {0x000080d4, 0x00a00000}, |
| 1433 | + {0x000080d8, 0x00400000}, |
| 1434 | + {0x000080dc, 0x00000000}, |
| 1435 | + {0x000080e0, 0xffffffff}, |
| 1436 | + {0x000080e4, 0x0000ffff}, |
| 1437 | + {0x000080e8, 0x3f3f3f3f}, |
| 1438 | + {0x000080ec, 0x00000000}, |
| 1439 | + {0x000080f0, 0x00000000}, |
| 1440 | + {0x000080f4, 0x00000000}, |
| 1441 | + {0x000080fc, 0x00020000}, |
| 1442 | + {0x00008100, 0x00000000}, |
| 1443 | + {0x00008108, 0x00000052}, |
| 1444 | + {0x0000810c, 0x00000000}, |
| 1445 | + {0x00008110, 0x00000000}, |
| 1446 | + {0x00008114, 0x000007ff}, |
| 1447 | + {0x00008118, 0x000000aa}, |
| 1448 | + {0x0000811c, 0x00003210}, |
| 1449 | + {0x00008124, 0x00000000}, |
| 1450 | + {0x00008128, 0x00000000}, |
| 1451 | + {0x0000812c, 0x00000000}, |
| 1452 | + {0x00008130, 0x00000000}, |
| 1453 | + {0x00008134, 0x00000000}, |
| 1454 | + {0x00008138, 0x00000000}, |
| 1455 | + {0x0000813c, 0x0000ffff}, |
| 1456 | + {0x00008144, 0xffffffff}, |
| 1457 | + {0x00008168, 0x00000000}, |
| 1458 | + {0x0000816c, 0x00000000}, |
| 1459 | + {0x00008170, 0x18486200}, |
| 1460 | + {0x00008174, 0x33332210}, |
| 1461 | + {0x00008178, 0x00000000}, |
| 1462 | + {0x0000817c, 0x00020000}, |
| 1463 | + {0x000081c0, 0x00000000}, |
| 1464 | + {0x000081c4, 0x33332210}, |
| 1465 | + {0x000081c8, 0x00000000}, |
| 1466 | + {0x000081cc, 0x00000000}, |
| 1467 | + {0x000081d4, 0x00000000}, |
| 1468 | + {0x000081ec, 0x00000000}, |
| 1469 | + {0x000081f0, 0x00000000}, |
| 1470 | + {0x000081f4, 0x00000000}, |
| 1471 | + {0x000081f8, 0x00000000}, |
| 1472 | + {0x000081fc, 0x00000000}, |
| 1473 | + {0x00008240, 0x00100000}, |
| 1474 | + {0x00008244, 0x0010f424}, |
| 1475 | + {0x00008248, 0x00000800}, |
| 1476 | + {0x0000824c, 0x0001e848}, |
| 1477 | + {0x00008250, 0x00000000}, |
| 1478 | + {0x00008254, 0x00000000}, |
| 1479 | + {0x00008258, 0x00000000}, |
| 1480 | + {0x0000825c, 0x40000000}, |
| 1481 | + {0x00008260, 0x00080922}, |
| 1482 | + {0x00008264, 0x98a00010}, |
| 1483 | + {0x00008268, 0xffffffff}, |
| 1484 | + {0x0000826c, 0x0000ffff}, |
| 1485 | + {0x00008270, 0x00000000}, |
| 1486 | + {0x00008274, 0x40000000}, |
| 1487 | + {0x00008278, 0x003e4180}, |
| 1488 | + {0x0000827c, 0x00000004}, |
| 1489 | + {0x00008284, 0x0000002c}, |
| 1490 | + {0x00008288, 0x0000002c}, |
| 1491 | + {0x0000828c, 0x000000ff}, |
| 1492 | + {0x00008294, 0x00000000}, |
| 1493 | + {0x00008298, 0x00000000}, |
| 1494 | + {0x0000829c, 0x00000000}, |
| 1495 | + {0x00008300, 0x00000140}, |
| 1496 | + {0x00008314, 0x00000000}, |
| 1497 | + {0x0000831c, 0x0000010d}, |
| 1498 | + {0x00008328, 0x00000000}, |
| 1499 | + {0x0000832c, 0x00000007}, |
| 1500 | + {0x00008330, 0x00000302}, |
| 1501 | + {0x00008334, 0x00000700}, |
| 1502 | + {0x00008338, 0x00ff0000}, |
| 1503 | + {0x0000833c, 0x02400000}, |
| 1504 | + {0x00008340, 0x000107ff}, |
| 1505 | + {0x00008344, 0xaa48105b}, |
| 1506 | + {0x00008348, 0x008f0000}, |
| 1507 | + {0x0000835c, 0x00000000}, |
| 1508 | + {0x00008360, 0xffffffff}, |
| 1509 | + {0x00008364, 0xffffffff}, |
| 1510 | + {0x00008368, 0x00000000}, |
| 1511 | + {0x00008370, 0x00000000}, |
| 1512 | + {0x00008374, 0x000000ff}, |
| 1513 | + {0x00008378, 0x00000000}, |
| 1514 | + {0x0000837c, 0x00000000}, |
| 1515 | + {0x00008380, 0xffffffff}, |
| 1516 | + {0x00008384, 0xffffffff}, |
| 1517 | + {0x00008390, 0xffffffff}, |
| 1518 | + {0x00008394, 0xffffffff}, |
| 1519 | + {0x00008398, 0x00000000}, |
| 1520 | + {0x0000839c, 0x00000000}, |
| 1521 | + {0x000083a0, 0x00000000}, |
| 1522 | + {0x000083a4, 0x0000fa14}, |
| 1523 | + {0x000083a8, 0x000f0c00}, |
| 1524 | + {0x000083ac, 0x33332210}, |
| 1525 | + {0x000083b0, 0x33332210}, |
| 1526 | + {0x000083b4, 0x33332210}, |
| 1527 | + {0x000083b8, 0x33332210}, |
| 1528 | + {0x000083bc, 0x00000000}, |
| 1529 | + {0x000083c0, 0x00000000}, |
| 1530 | + {0x000083c4, 0x00000000}, |
| 1531 | + {0x000083c8, 0x00000000}, |
| 1532 | + {0x000083cc, 0x00000200}, |
| 1533 | + {0x000083d0, 0x000301ff}, |
| 1534 | +}; |
| 1535 | + |
| 1536 | +static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = { |
| 1537 | + /* Addr allmodes */ |
| 1538 | + {0x0000a000, 0x00010000}, |
| 1539 | + {0x0000a004, 0x00030002}, |
| 1540 | + {0x0000a008, 0x00050004}, |
| 1541 | + {0x0000a00c, 0x00810080}, |
| 1542 | + {0x0000a010, 0x00830082}, |
| 1543 | + {0x0000a014, 0x01810180}, |
| 1544 | + {0x0000a018, 0x01830182}, |
| 1545 | + {0x0000a01c, 0x01850184}, |
| 1546 | + {0x0000a020, 0x01890188}, |
| 1547 | + {0x0000a024, 0x018b018a}, |
| 1548 | + {0x0000a028, 0x018d018c}, |
| 1549 | + {0x0000a02c, 0x03820190}, |
| 1550 | + {0x0000a030, 0x03840383}, |
| 1551 | + {0x0000a034, 0x03880385}, |
| 1552 | + {0x0000a038, 0x038a0389}, |
| 1553 | + {0x0000a03c, 0x038c038b}, |
| 1554 | + {0x0000a040, 0x0390038d}, |
| 1555 | + {0x0000a044, 0x03920391}, |
| 1556 | + {0x0000a048, 0x03940393}, |
| 1557 | + {0x0000a04c, 0x03960395}, |
| 1558 | + {0x0000a050, 0x00000000}, |
| 1559 | + {0x0000a054, 0x00000000}, |
| 1560 | + {0x0000a058, 0x00000000}, |
| 1561 | + {0x0000a05c, 0x00000000}, |
| 1562 | + {0x0000a060, 0x00000000}, |
| 1563 | + {0x0000a064, 0x00000000}, |
| 1564 | + {0x0000a068, 0x00000000}, |
| 1565 | + {0x0000a06c, 0x00000000}, |
| 1566 | + {0x0000a070, 0x00000000}, |
| 1567 | + {0x0000a074, 0x00000000}, |
| 1568 | + {0x0000a078, 0x00000000}, |
| 1569 | + {0x0000a07c, 0x00000000}, |
| 1570 | + {0x0000a080, 0x29292929}, |
| 1571 | + {0x0000a084, 0x29292929}, |
| 1572 | + {0x0000a088, 0x29292929}, |
| 1573 | + {0x0000a08c, 0x29292929}, |
| 1574 | + {0x0000a090, 0x22292929}, |
| 1575 | + {0x0000a094, 0x1d1d2222}, |
| 1576 | + {0x0000a098, 0x0c111117}, |
| 1577 | + {0x0000a09c, 0x00030303}, |
| 1578 | + {0x0000a0a0, 0x00000000}, |
| 1579 | + {0x0000a0a4, 0x00000000}, |
| 1580 | + {0x0000a0a8, 0x00000000}, |
| 1581 | + {0x0000a0ac, 0x00000000}, |
| 1582 | + {0x0000a0b0, 0x00000000}, |
| 1583 | + {0x0000a0b4, 0x00000000}, |
| 1584 | + {0x0000a0b8, 0x00000000}, |
| 1585 | + {0x0000a0bc, 0x00000000}, |
| 1586 | + {0x0000a0c0, 0x001f0000}, |
| 1587 | + {0x0000a0c4, 0x01000101}, |
| 1588 | + {0x0000a0c8, 0x011e011f}, |
| 1589 | + {0x0000a0cc, 0x011c011d}, |
| 1590 | + {0x0000a0d0, 0x02030204}, |
| 1591 | + {0x0000a0d4, 0x02010202}, |
| 1592 | + {0x0000a0d8, 0x021f0200}, |
| 1593 | + {0x0000a0dc, 0x0302021e}, |
| 1594 | + {0x0000a0e0, 0x03000301}, |
| 1595 | + {0x0000a0e4, 0x031e031f}, |
| 1596 | + {0x0000a0e8, 0x0402031d}, |
| 1597 | + {0x0000a0ec, 0x04000401}, |
| 1598 | + {0x0000a0f0, 0x041e041f}, |
| 1599 | + {0x0000a0f4, 0x0502041d}, |
| 1600 | + {0x0000a0f8, 0x05000501}, |
| 1601 | + {0x0000a0fc, 0x051e051f}, |
| 1602 | + {0x0000a100, 0x06010602}, |
| 1603 | + {0x0000a104, 0x061f0600}, |
| 1604 | + {0x0000a108, 0x061d061e}, |
| 1605 | + {0x0000a10c, 0x07020703}, |
| 1606 | + {0x0000a110, 0x07000701}, |
| 1607 | + {0x0000a114, 0x00000000}, |
| 1608 | + {0x0000a118, 0x00000000}, |
| 1609 | + {0x0000a11c, 0x00000000}, |
| 1610 | + {0x0000a120, 0x00000000}, |
| 1611 | + {0x0000a124, 0x00000000}, |
| 1612 | + {0x0000a128, 0x00000000}, |
| 1613 | + {0x0000a12c, 0x00000000}, |
| 1614 | + {0x0000a130, 0x00000000}, |
| 1615 | + {0x0000a134, 0x00000000}, |
| 1616 | + {0x0000a138, 0x00000000}, |
| 1617 | + {0x0000a13c, 0x00000000}, |
| 1618 | + {0x0000a140, 0x001f0000}, |
| 1619 | + {0x0000a144, 0x01000101}, |
| 1620 | + {0x0000a148, 0x011e011f}, |
| 1621 | + {0x0000a14c, 0x011c011d}, |
| 1622 | + {0x0000a150, 0x02030204}, |
| 1623 | + {0x0000a154, 0x02010202}, |
| 1624 | + {0x0000a158, 0x021f0200}, |
| 1625 | + {0x0000a15c, 0x0302021e}, |
| 1626 | + {0x0000a160, 0x03000301}, |
| 1627 | + {0x0000a164, 0x031e031f}, |
| 1628 | + {0x0000a168, 0x0402031d}, |
| 1629 | + {0x0000a16c, 0x04000401}, |
| 1630 | + {0x0000a170, 0x041e041f}, |
| 1631 | + {0x0000a174, 0x0502041d}, |
| 1632 | + {0x0000a178, 0x05000501}, |
| 1633 | + {0x0000a17c, 0x051e051f}, |
| 1634 | + {0x0000a180, 0x06010602}, |
| 1635 | + {0x0000a184, 0x061f0600}, |
| 1636 | + {0x0000a188, 0x061d061e}, |
| 1637 | + {0x0000a18c, 0x07020703}, |
| 1638 | + {0x0000a190, 0x07000701}, |
| 1639 | + {0x0000a194, 0x00000000}, |
| 1640 | + {0x0000a198, 0x00000000}, |
| 1641 | + {0x0000a19c, 0x00000000}, |
| 1642 | + {0x0000a1a0, 0x00000000}, |
| 1643 | + {0x0000a1a4, 0x00000000}, |
| 1644 | + {0x0000a1a8, 0x00000000}, |
| 1645 | + {0x0000a1ac, 0x00000000}, |
| 1646 | + {0x0000a1b0, 0x00000000}, |
| 1647 | + {0x0000a1b4, 0x00000000}, |
| 1648 | + {0x0000a1b8, 0x00000000}, |
| 1649 | + {0x0000a1bc, 0x00000000}, |
| 1650 | + {0x0000a1c0, 0x00000000}, |
| 1651 | + {0x0000a1c4, 0x00000000}, |
| 1652 | + {0x0000a1c8, 0x00000000}, |
| 1653 | + {0x0000a1cc, 0x00000000}, |
| 1654 | + {0x0000a1d0, 0x00000000}, |
| 1655 | + {0x0000a1d4, 0x00000000}, |
| 1656 | + {0x0000a1d8, 0x00000000}, |
| 1657 | + {0x0000a1dc, 0x00000000}, |
| 1658 | + {0x0000a1e0, 0x00000000}, |
| 1659 | + {0x0000a1e4, 0x00000000}, |
| 1660 | + {0x0000a1e8, 0x00000000}, |
| 1661 | + {0x0000a1ec, 0x00000000}, |
| 1662 | + {0x0000a1f0, 0x00000396}, |
| 1663 | + {0x0000a1f4, 0x00000396}, |
| 1664 | + {0x0000a1f8, 0x00000396}, |
| 1665 | + {0x0000a1fc, 0x00000196}, |
| 1666 | + {0x0000b000, 0x00010000}, |
| 1667 | + {0x0000b004, 0x00030002}, |
| 1668 | + {0x0000b008, 0x00050004}, |
| 1669 | + {0x0000b00c, 0x00810080}, |
| 1670 | + {0x0000b010, 0x00830082}, |
| 1671 | + {0x0000b014, 0x01810180}, |
| 1672 | + {0x0000b018, 0x01830182}, |
| 1673 | + {0x0000b01c, 0x01850184}, |
| 1674 | + {0x0000b020, 0x02810280}, |
| 1675 | + {0x0000b024, 0x02830282}, |
| 1676 | + {0x0000b028, 0x02850284}, |
| 1677 | + {0x0000b02c, 0x02890288}, |
| 1678 | + {0x0000b030, 0x028b028a}, |
| 1679 | + {0x0000b034, 0x0388028c}, |
| 1680 | + {0x0000b038, 0x038a0389}, |
| 1681 | + {0x0000b03c, 0x038c038b}, |
| 1682 | + {0x0000b040, 0x0390038d}, |
| 1683 | + {0x0000b044, 0x03920391}, |
| 1684 | + {0x0000b048, 0x03940393}, |
| 1685 | + {0x0000b04c, 0x03960395}, |
| 1686 | + {0x0000b050, 0x00000000}, |
| 1687 | + {0x0000b054, 0x00000000}, |
| 1688 | + {0x0000b058, 0x00000000}, |
| 1689 | + {0x0000b05c, 0x00000000}, |
| 1690 | + {0x0000b060, 0x00000000}, |
| 1691 | + {0x0000b064, 0x00000000}, |
| 1692 | + {0x0000b068, 0x00000000}, |
| 1693 | + {0x0000b06c, 0x00000000}, |
| 1694 | + {0x0000b070, 0x00000000}, |
| 1695 | + {0x0000b074, 0x00000000}, |
| 1696 | + {0x0000b078, 0x00000000}, |
| 1697 | + {0x0000b07c, 0x00000000}, |
| 1698 | + {0x0000b080, 0x32323232}, |
| 1699 | + {0x0000b084, 0x2f2f3232}, |
| 1700 | + {0x0000b088, 0x23282a2d}, |
| 1701 | + {0x0000b08c, 0x1c1e2123}, |
| 1702 | + {0x0000b090, 0x14171919}, |
| 1703 | + {0x0000b094, 0x0e0e1214}, |
| 1704 | + {0x0000b098, 0x03050707}, |
| 1705 | + {0x0000b09c, 0x00030303}, |
| 1706 | + {0x0000b0a0, 0x00000000}, |
| 1707 | + {0x0000b0a4, 0x00000000}, |
| 1708 | + {0x0000b0a8, 0x00000000}, |
| 1709 | + {0x0000b0ac, 0x00000000}, |
| 1710 | + {0x0000b0b0, 0x00000000}, |
| 1711 | + {0x0000b0b4, 0x00000000}, |
| 1712 | + {0x0000b0b8, 0x00000000}, |
| 1713 | + {0x0000b0bc, 0x00000000}, |
| 1714 | + {0x0000b0c0, 0x003f0020}, |
| 1715 | + {0x0000b0c4, 0x00400041}, |
| 1716 | + {0x0000b0c8, 0x0140005f}, |
| 1717 | + {0x0000b0cc, 0x0160015f}, |
| 1718 | + {0x0000b0d0, 0x017e017f}, |
| 1719 | + {0x0000b0d4, 0x02410242}, |
| 1720 | + {0x0000b0d8, 0x025f0240}, |
| 1721 | + {0x0000b0dc, 0x027f0260}, |
| 1722 | + {0x0000b0e0, 0x0341027e}, |
| 1723 | + {0x0000b0e4, 0x035f0340}, |
| 1724 | + {0x0000b0e8, 0x037f0360}, |
| 1725 | + {0x0000b0ec, 0x04400441}, |
| 1726 | + {0x0000b0f0, 0x0460045f}, |
| 1727 | + {0x0000b0f4, 0x0541047f}, |
| 1728 | + {0x0000b0f8, 0x055f0540}, |
| 1729 | + {0x0000b0fc, 0x057f0560}, |
| 1730 | + {0x0000b100, 0x06400641}, |
| 1731 | + {0x0000b104, 0x0660065f}, |
| 1732 | + {0x0000b108, 0x067e067f}, |
| 1733 | + {0x0000b10c, 0x07410742}, |
| 1734 | + {0x0000b110, 0x075f0740}, |
| 1735 | + {0x0000b114, 0x077f0760}, |
| 1736 | + {0x0000b118, 0x07800781}, |
| 1737 | + {0x0000b11c, 0x07a0079f}, |
| 1738 | + {0x0000b120, 0x07c107bf}, |
| 1739 | + {0x0000b124, 0x000007c0}, |
| 1740 | + {0x0000b128, 0x00000000}, |
| 1741 | + {0x0000b12c, 0x00000000}, |
| 1742 | + {0x0000b130, 0x00000000}, |
| 1743 | + {0x0000b134, 0x00000000}, |
| 1744 | + {0x0000b138, 0x00000000}, |
| 1745 | + {0x0000b13c, 0x00000000}, |
| 1746 | + {0x0000b140, 0x003f0020}, |
| 1747 | + {0x0000b144, 0x00400041}, |
| 1748 | + {0x0000b148, 0x0140005f}, |
| 1749 | + {0x0000b14c, 0x0160015f}, |
| 1750 | + {0x0000b150, 0x017e017f}, |
| 1751 | + {0x0000b154, 0x02410242}, |
| 1752 | + {0x0000b158, 0x025f0240}, |
| 1753 | + {0x0000b15c, 0x027f0260}, |
| 1754 | + {0x0000b160, 0x0341027e}, |
| 1755 | + {0x0000b164, 0x035f0340}, |
| 1756 | + {0x0000b168, 0x037f0360}, |
| 1757 | + {0x0000b16c, 0x04400441}, |
| 1758 | + {0x0000b170, 0x0460045f}, |
| 1759 | + {0x0000b174, 0x0541047f}, |
| 1760 | + {0x0000b178, 0x055f0540}, |
| 1761 | + {0x0000b17c, 0x057f0560}, |
| 1762 | + {0x0000b180, 0x06400641}, |
| 1763 | + {0x0000b184, 0x0660065f}, |
| 1764 | + {0x0000b188, 0x067e067f}, |
| 1765 | + {0x0000b18c, 0x07410742}, |
| 1766 | + {0x0000b190, 0x075f0740}, |
| 1767 | + {0x0000b194, 0x077f0760}, |
| 1768 | + {0x0000b198, 0x07800781}, |
| 1769 | + {0x0000b19c, 0x07a0079f}, |
| 1770 | + {0x0000b1a0, 0x07c107bf}, |
| 1771 | + {0x0000b1a4, 0x000007c0}, |
| 1772 | + {0x0000b1a8, 0x00000000}, |
| 1773 | + {0x0000b1ac, 0x00000000}, |
| 1774 | + {0x0000b1b0, 0x00000000}, |
| 1775 | + {0x0000b1b4, 0x00000000}, |
| 1776 | + {0x0000b1b8, 0x00000000}, |
| 1777 | + {0x0000b1bc, 0x00000000}, |
| 1778 | + {0x0000b1c0, 0x00000000}, |
| 1779 | + {0x0000b1c4, 0x00000000}, |
| 1780 | + {0x0000b1c8, 0x00000000}, |
| 1781 | + {0x0000b1cc, 0x00000000}, |
| 1782 | + {0x0000b1d0, 0x00000000}, |
| 1783 | + {0x0000b1d4, 0x00000000}, |
| 1784 | + {0x0000b1d8, 0x00000000}, |
| 1785 | + {0x0000b1dc, 0x00000000}, |
| 1786 | + {0x0000b1e0, 0x00000000}, |
| 1787 | + {0x0000b1e4, 0x00000000}, |
| 1788 | + {0x0000b1e8, 0x00000000}, |
| 1789 | + {0x0000b1ec, 0x00000000}, |
| 1790 | + {0x0000b1f0, 0x00000396}, |
| 1791 | + {0x0000b1f4, 0x00000396}, |
| 1792 | + {0x0000b1f8, 0x00000396}, |
| 1793 | + {0x0000b1fc, 0x00000196}, |
| 1794 | +}; |
| 1795 | + |
| 1796 | +static const u32 ar9300_2p0_soc_preamble[][2] = { |
| 1797 | + /* Addr allmodes */ |
| 1798 | + {0x000040a4, 0x00a0c1c9}, |
| 1799 | + {0x00007008, 0x00000000}, |
| 1800 | + {0x00007020, 0x00000000}, |
| 1801 | + {0x00007034, 0x00000002}, |
| 1802 | + {0x00007038, 0x000004c2}, |
| 1803 | +}; |
| 1804 | + |
| 1805 | +static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0[][2] = { |
| 1806 | + /* Addr allmodes */ |
| 1807 | + {0x00004040, 0x08212e5e}, |
| 1808 | + {0x00004040, 0x0008003b}, |
| 1809 | + {0x00004044, 0x00000000}, |
| 1810 | +}; |
| 1811 | + |
| 1812 | +static const u32 ar9300PciePhy_clkreq_enable_L1_2p0[][2] = { |
| 1813 | + /* Addr allmodes */ |
| 1814 | + {0x00004040, 0x08253e5e}, |
| 1815 | + {0x00004040, 0x0008003b}, |
| 1816 | + {0x00004044, 0x00000000}, |
| 1817 | +}; |
| 1818 | + |
| 1819 | +static const u32 ar9300PciePhy_clkreq_disable_L1_2p0[][2] = { |
| 1820 | + /* Addr allmodes */ |
| 1821 | + {0x00004040, 0x08213e5e}, |
| 1822 | + {0x00004040, 0x0008003b}, |
| 1823 | + {0x00004044, 0x00000000}, |
| 1824 | +}; |
| 1825 | + |
| 1826 | +#endif /* INITVALS_9003_2P0_H */ |
| 1827 | --- /dev/null |
| 1828 | @@ -0,0 +1,1785 @@ |
| 1829 | +/* |
| 1830 | + * Copyright (c) 2010 Atheros Communications Inc. |
| 1831 | + * |
| 1832 | + * Permission to use, copy, modify, and/or distribute this software for any |
| 1833 | + * purpose with or without fee is hereby granted, provided that the above |
| 1834 | + * copyright notice and this permission notice appear in all copies. |
| 1835 | + * |
| 1836 | + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 1837 | + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 1838 | + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 1839 | + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 1840 | + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 1841 | + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 1842 | + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 1843 | + */ |
| 1844 | + |
| 1845 | +#ifndef INITVALS_9003_2P2_H |
| 1846 | +#define INITVALS_9003_2P2_H |
| 1847 | + |
| 1848 | +/* AR9003 2.2 */ |
| 1849 | + |
| 1850 | +static const u32 ar9300_2p2_radio_postamble[][5] = { |
| 1851 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 1852 | + {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31}, |
| 1853 | + {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800}, |
| 1854 | + {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20}, |
| 1855 | + {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 1856 | + {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 1857 | + {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 1858 | + {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 1859 | + {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 1860 | + {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 1861 | +}; |
| 1862 | + |
| 1863 | +static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = { |
| 1864 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 1865 | + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 1866 | + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 1867 | + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, |
| 1868 | + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, |
| 1869 | + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, |
| 1870 | + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, |
| 1871 | + {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, |
| 1872 | + {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, |
| 1873 | + {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, |
| 1874 | + {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, |
| 1875 | + {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, |
| 1876 | + {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, |
| 1877 | + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, |
| 1878 | + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, |
| 1879 | + {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, |
| 1880 | + {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, |
| 1881 | + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, |
| 1882 | + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, |
| 1883 | + {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, |
| 1884 | + {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, |
| 1885 | + {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, |
| 1886 | + {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, |
| 1887 | + {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, |
| 1888 | + {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, |
| 1889 | + {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, |
| 1890 | + {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, |
| 1891 | + {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 1892 | + {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 1893 | + {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 1894 | + {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 1895 | + {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 1896 | + {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 1897 | + {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 1898 | + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 1899 | + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, |
| 1900 | + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, |
| 1901 | + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, |
| 1902 | + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, |
| 1903 | + {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, |
| 1904 | + {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, |
| 1905 | + {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, |
| 1906 | + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, |
| 1907 | + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, |
| 1908 | + {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, |
| 1909 | + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, |
| 1910 | + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, |
| 1911 | + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, |
| 1912 | + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, |
| 1913 | + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, |
| 1914 | + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, |
| 1915 | + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, |
| 1916 | + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, |
| 1917 | + {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, |
| 1918 | + {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, |
| 1919 | + {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, |
| 1920 | + {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, |
| 1921 | + {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, |
| 1922 | + {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, |
| 1923 | + {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 1924 | + {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 1925 | + {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 1926 | + {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 1927 | + {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 1928 | + {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 1929 | + {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 1930 | + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 1931 | + {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 1932 | + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1933 | + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 1934 | + {0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 1935 | + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1936 | + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 1937 | + {0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 1938 | + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 1939 | +}; |
| 1940 | + |
| 1941 | +static const u32 ar9300Modes_fast_clock_2p2[][3] = { |
| 1942 | + /* Addr 5G_HT20 5G_HT40 */ |
| 1943 | + {0x00001030, 0x00000268, 0x000004d0}, |
| 1944 | + {0x00001070, 0x0000018c, 0x00000318}, |
| 1945 | + {0x000010b0, 0x00000fd0, 0x00001fa0}, |
| 1946 | + {0x00008014, 0x044c044c, 0x08980898}, |
| 1947 | + {0x0000801c, 0x148ec02b, 0x148ec057}, |
| 1948 | + {0x00008318, 0x000044c0, 0x00008980}, |
| 1949 | + {0x00009e00, 0x03721821, 0x03721821}, |
| 1950 | + {0x0000a230, 0x0000000b, 0x00000016}, |
| 1951 | + {0x0000a254, 0x00000898, 0x00001130}, |
| 1952 | +}; |
| 1953 | + |
| 1954 | +static const u32 ar9300_2p2_radio_core[][2] = { |
| 1955 | + /* Addr allmodes */ |
| 1956 | + {0x00016000, 0x36db6db6}, |
| 1957 | + {0x00016004, 0x6db6db40}, |
| 1958 | + {0x00016008, 0x73f00000}, |
| 1959 | + {0x0001600c, 0x00000000}, |
| 1960 | + {0x00016040, 0x7f80fff8}, |
| 1961 | + {0x0001604c, 0x76d005b5}, |
| 1962 | + {0x00016050, 0x556cf031}, |
| 1963 | + {0x00016054, 0x13449440}, |
| 1964 | + {0x00016058, 0x0c51c92c}, |
| 1965 | + {0x0001605c, 0x3db7fffc}, |
| 1966 | + {0x00016060, 0xfffffffc}, |
| 1967 | + {0x00016064, 0x000f0278}, |
| 1968 | + {0x0001606c, 0x6db60000}, |
| 1969 | + {0x00016080, 0x00000000}, |
| 1970 | + {0x00016084, 0x0e48048c}, |
| 1971 | + {0x00016088, 0x54214514}, |
| 1972 | + {0x0001608c, 0x119f481e}, |
| 1973 | + {0x00016090, 0x24926490}, |
| 1974 | + {0x00016098, 0xd2888888}, |
| 1975 | + {0x000160a0, 0x0a108ffe}, |
| 1976 | + {0x000160a4, 0x812fc370}, |
| 1977 | + {0x000160a8, 0x423c8000}, |
| 1978 | + {0x000160b4, 0x92480080}, |
| 1979 | + {0x000160c0, 0x00adb6d0}, |
| 1980 | + {0x000160c4, 0x6db6db60}, |
| 1981 | + {0x000160c8, 0x6db6db6c}, |
| 1982 | + {0x000160cc, 0x01e6c000}, |
| 1983 | + {0x00016100, 0x3fffbe01}, |
| 1984 | + {0x00016104, 0xfff80000}, |
| 1985 | + {0x00016108, 0x00080010}, |
| 1986 | + {0x00016144, 0x02084080}, |
| 1987 | + {0x00016148, 0x00000000}, |
| 1988 | + {0x00016280, 0x058a0001}, |
| 1989 | + {0x00016284, 0x3d840208}, |
| 1990 | + {0x00016288, 0x05a20408}, |
| 1991 | + {0x0001628c, 0x00038c07}, |
| 1992 | + {0x00016290, 0x00000004}, |
| 1993 | + {0x00016294, 0x458aa14f}, |
| 1994 | + {0x00016380, 0x00000000}, |
| 1995 | + {0x00016384, 0x00000000}, |
| 1996 | + {0x00016388, 0x00800700}, |
| 1997 | + {0x0001638c, 0x00800700}, |
| 1998 | + {0x00016390, 0x00800700}, |
| 1999 | + {0x00016394, 0x00000000}, |
| 2000 | + {0x00016398, 0x00000000}, |
| 2001 | + {0x0001639c, 0x00000000}, |
| 2002 | + {0x000163a0, 0x00000001}, |
| 2003 | + {0x000163a4, 0x00000001}, |
| 2004 | + {0x000163a8, 0x00000000}, |
| 2005 | + {0x000163ac, 0x00000000}, |
| 2006 | + {0x000163b0, 0x00000000}, |
| 2007 | + {0x000163b4, 0x00000000}, |
| 2008 | + {0x000163b8, 0x00000000}, |
| 2009 | + {0x000163bc, 0x00000000}, |
| 2010 | + {0x000163c0, 0x000000a0}, |
| 2011 | + {0x000163c4, 0x000c0000}, |
| 2012 | + {0x000163c8, 0x14021402}, |
| 2013 | + {0x000163cc, 0x00001402}, |
| 2014 | + {0x000163d0, 0x00000000}, |
| 2015 | + {0x000163d4, 0x00000000}, |
| 2016 | + {0x00016400, 0x36db6db6}, |
| 2017 | + {0x00016404, 0x6db6db40}, |
| 2018 | + {0x00016408, 0x73f00000}, |
| 2019 | + {0x0001640c, 0x00000000}, |
| 2020 | + {0x00016440, 0x7f80fff8}, |
| 2021 | + {0x0001644c, 0x76d005b5}, |
| 2022 | + {0x00016450, 0x556cf031}, |
| 2023 | + {0x00016454, 0x13449440}, |
| 2024 | + {0x00016458, 0x0c51c92c}, |
| 2025 | + {0x0001645c, 0x3db7fffc}, |
| 2026 | + {0x00016460, 0xfffffffc}, |
| 2027 | + {0x00016464, 0x000f0278}, |
| 2028 | + {0x0001646c, 0x6db60000}, |
| 2029 | + {0x00016500, 0x3fffbe01}, |
| 2030 | + {0x00016504, 0xfff80000}, |
| 2031 | + {0x00016508, 0x00080010}, |
| 2032 | + {0x00016544, 0x02084080}, |
| 2033 | + {0x00016548, 0x00000000}, |
| 2034 | + {0x00016780, 0x00000000}, |
| 2035 | + {0x00016784, 0x00000000}, |
| 2036 | + {0x00016788, 0x00800700}, |
| 2037 | + {0x0001678c, 0x00800700}, |
| 2038 | + {0x00016790, 0x00800700}, |
| 2039 | + {0x00016794, 0x00000000}, |
| 2040 | + {0x00016798, 0x00000000}, |
| 2041 | + {0x0001679c, 0x00000000}, |
| 2042 | + {0x000167a0, 0x00000001}, |
| 2043 | + {0x000167a4, 0x00000001}, |
| 2044 | + {0x000167a8, 0x00000000}, |
| 2045 | + {0x000167ac, 0x00000000}, |
| 2046 | + {0x000167b0, 0x00000000}, |
| 2047 | + {0x000167b4, 0x00000000}, |
| 2048 | + {0x000167b8, 0x00000000}, |
| 2049 | + {0x000167bc, 0x00000000}, |
| 2050 | + {0x000167c0, 0x000000a0}, |
| 2051 | + {0x000167c4, 0x000c0000}, |
| 2052 | + {0x000167c8, 0x14021402}, |
| 2053 | + {0x000167cc, 0x00001402}, |
| 2054 | + {0x000167d0, 0x00000000}, |
| 2055 | + {0x000167d4, 0x00000000}, |
| 2056 | + {0x00016800, 0x36db6db6}, |
| 2057 | + {0x00016804, 0x6db6db40}, |
| 2058 | + {0x00016808, 0x73f00000}, |
| 2059 | + {0x0001680c, 0x00000000}, |
| 2060 | + {0x00016840, 0x7f80fff8}, |
| 2061 | + {0x0001684c, 0x76d005b5}, |
| 2062 | + {0x00016850, 0x556cf031}, |
| 2063 | + {0x00016854, 0x13449440}, |
| 2064 | + {0x00016858, 0x0c51c92c}, |
| 2065 | + {0x0001685c, 0x3db7fffc}, |
| 2066 | + {0x00016860, 0xfffffffc}, |
| 2067 | + {0x00016864, 0x000f0278}, |
| 2068 | + {0x0001686c, 0x6db60000}, |
| 2069 | + {0x00016900, 0x3fffbe01}, |
| 2070 | + {0x00016904, 0xfff80000}, |
| 2071 | + {0x00016908, 0x00080010}, |
| 2072 | + {0x00016944, 0x02084080}, |
| 2073 | + {0x00016948, 0x00000000}, |
| 2074 | + {0x00016b80, 0x00000000}, |
| 2075 | + {0x00016b84, 0x00000000}, |
| 2076 | + {0x00016b88, 0x00800700}, |
| 2077 | + {0x00016b8c, 0x00800700}, |
| 2078 | + {0x00016b90, 0x00800700}, |
| 2079 | + {0x00016b94, 0x00000000}, |
| 2080 | + {0x00016b98, 0x00000000}, |
| 2081 | + {0x00016b9c, 0x00000000}, |
| 2082 | + {0x00016ba0, 0x00000001}, |
| 2083 | + {0x00016ba4, 0x00000001}, |
| 2084 | + {0x00016ba8, 0x00000000}, |
| 2085 | + {0x00016bac, 0x00000000}, |
| 2086 | + {0x00016bb0, 0x00000000}, |
| 2087 | + {0x00016bb4, 0x00000000}, |
| 2088 | + {0x00016bb8, 0x00000000}, |
| 2089 | + {0x00016bbc, 0x00000000}, |
| 2090 | + {0x00016bc0, 0x000000a0}, |
| 2091 | + {0x00016bc4, 0x000c0000}, |
| 2092 | + {0x00016bc8, 0x14021402}, |
| 2093 | + {0x00016bcc, 0x00001402}, |
| 2094 | + {0x00016bd0, 0x00000000}, |
| 2095 | + {0x00016bd4, 0x00000000}, |
| 2096 | +}; |
| 2097 | + |
| 2098 | +static const u32 ar9300Common_rx_gain_table_merlin_2p2[][2] = { |
| 2099 | + /* Addr allmodes */ |
| 2100 | + {0x0000a000, 0x02000101}, |
| 2101 | + {0x0000a004, 0x02000102}, |
| 2102 | + {0x0000a008, 0x02000103}, |
| 2103 | + {0x0000a00c, 0x02000104}, |
| 2104 | + {0x0000a010, 0x02000200}, |
| 2105 | + {0x0000a014, 0x02000201}, |
| 2106 | + {0x0000a018, 0x02000202}, |
| 2107 | + {0x0000a01c, 0x02000203}, |
| 2108 | + {0x0000a020, 0x02000204}, |
| 2109 | + {0x0000a024, 0x02000205}, |
| 2110 | + {0x0000a028, 0x02000208}, |
| 2111 | + {0x0000a02c, 0x02000302}, |
| 2112 | + {0x0000a030, 0x02000303}, |
| 2113 | + {0x0000a034, 0x02000304}, |
| 2114 | + {0x0000a038, 0x02000400}, |
| 2115 | + {0x0000a03c, 0x02010300}, |
| 2116 | + {0x0000a040, 0x02010301}, |
| 2117 | + {0x0000a044, 0x02010302}, |
| 2118 | + {0x0000a048, 0x02000500}, |
| 2119 | + {0x0000a04c, 0x02010400}, |
| 2120 | + {0x0000a050, 0x02020300}, |
| 2121 | + {0x0000a054, 0x02020301}, |
| 2122 | + {0x0000a058, 0x02020302}, |
| 2123 | + {0x0000a05c, 0x02020303}, |
| 2124 | + {0x0000a060, 0x02020400}, |
| 2125 | + {0x0000a064, 0x02030300}, |
| 2126 | + {0x0000a068, 0x02030301}, |
| 2127 | + {0x0000a06c, 0x02030302}, |
| 2128 | + {0x0000a070, 0x02030303}, |
| 2129 | + {0x0000a074, 0x02030400}, |
| 2130 | + {0x0000a078, 0x02040300}, |
| 2131 | + {0x0000a07c, 0x02040301}, |
| 2132 | + {0x0000a080, 0x02040302}, |
| 2133 | + {0x0000a084, 0x02040303}, |
| 2134 | + {0x0000a088, 0x02030500}, |
| 2135 | + {0x0000a08c, 0x02040400}, |
| 2136 | + {0x0000a090, 0x02050203}, |
| 2137 | + {0x0000a094, 0x02050204}, |
| 2138 | + {0x0000a098, 0x02050205}, |
| 2139 | + {0x0000a09c, 0x02040500}, |
| 2140 | + {0x0000a0a0, 0x02050301}, |
| 2141 | + {0x0000a0a4, 0x02050302}, |
| 2142 | + {0x0000a0a8, 0x02050303}, |
| 2143 | + {0x0000a0ac, 0x02050400}, |
| 2144 | + {0x0000a0b0, 0x02050401}, |
| 2145 | + {0x0000a0b4, 0x02050402}, |
| 2146 | + {0x0000a0b8, 0x02050403}, |
| 2147 | + {0x0000a0bc, 0x02050500}, |
| 2148 | + {0x0000a0c0, 0x02050501}, |
| 2149 | + {0x0000a0c4, 0x02050502}, |
| 2150 | + {0x0000a0c8, 0x02050503}, |
| 2151 | + {0x0000a0cc, 0x02050504}, |
| 2152 | + {0x0000a0d0, 0x02050600}, |
| 2153 | + {0x0000a0d4, 0x02050601}, |
| 2154 | + {0x0000a0d8, 0x02050602}, |
| 2155 | + {0x0000a0dc, 0x02050603}, |
| 2156 | + {0x0000a0e0, 0x02050604}, |
| 2157 | + {0x0000a0e4, 0x02050700}, |
| 2158 | + {0x0000a0e8, 0x02050701}, |
| 2159 | + {0x0000a0ec, 0x02050702}, |
| 2160 | + {0x0000a0f0, 0x02050703}, |
| 2161 | + {0x0000a0f4, 0x02050704}, |
| 2162 | + {0x0000a0f8, 0x02050705}, |
| 2163 | + {0x0000a0fc, 0x02050708}, |
| 2164 | + {0x0000a100, 0x02050709}, |
| 2165 | + {0x0000a104, 0x0205070a}, |
| 2166 | + {0x0000a108, 0x0205070b}, |
| 2167 | + {0x0000a10c, 0x0205070c}, |
| 2168 | + {0x0000a110, 0x0205070d}, |
| 2169 | + {0x0000a114, 0x02050710}, |
| 2170 | + {0x0000a118, 0x02050711}, |
| 2171 | + {0x0000a11c, 0x02050712}, |
| 2172 | + {0x0000a120, 0x02050713}, |
| 2173 | + {0x0000a124, 0x02050714}, |
| 2174 | + {0x0000a128, 0x02050715}, |
| 2175 | + {0x0000a12c, 0x02050730}, |
| 2176 | + {0x0000a130, 0x02050731}, |
| 2177 | + {0x0000a134, 0x02050732}, |
| 2178 | + {0x0000a138, 0x02050733}, |
| 2179 | + {0x0000a13c, 0x02050734}, |
| 2180 | + {0x0000a140, 0x02050735}, |
| 2181 | + {0x0000a144, 0x02050750}, |
| 2182 | + {0x0000a148, 0x02050751}, |
| 2183 | + {0x0000a14c, 0x02050752}, |
| 2184 | + {0x0000a150, 0x02050753}, |
| 2185 | + {0x0000a154, 0x02050754}, |
| 2186 | + {0x0000a158, 0x02050755}, |
| 2187 | + {0x0000a15c, 0x02050770}, |
| 2188 | + {0x0000a160, 0x02050771}, |
| 2189 | + {0x0000a164, 0x02050772}, |
| 2190 | + {0x0000a168, 0x02050773}, |
| 2191 | + {0x0000a16c, 0x02050774}, |
| 2192 | + {0x0000a170, 0x02050775}, |
| 2193 | + {0x0000a174, 0x00000776}, |
| 2194 | + {0x0000a178, 0x00000776}, |
| 2195 | + {0x0000a17c, 0x00000776}, |
| 2196 | + {0x0000a180, 0x00000776}, |
| 2197 | + {0x0000a184, 0x00000776}, |
| 2198 | + {0x0000a188, 0x00000776}, |
| 2199 | + {0x0000a18c, 0x00000776}, |
| 2200 | + {0x0000a190, 0x00000776}, |
| 2201 | + {0x0000a194, 0x00000776}, |
| 2202 | + {0x0000a198, 0x00000776}, |
| 2203 | + {0x0000a19c, 0x00000776}, |
| 2204 | + {0x0000a1a0, 0x00000776}, |
| 2205 | + {0x0000a1a4, 0x00000776}, |
| 2206 | + {0x0000a1a8, 0x00000776}, |
| 2207 | + {0x0000a1ac, 0x00000776}, |
| 2208 | + {0x0000a1b0, 0x00000776}, |
| 2209 | + {0x0000a1b4, 0x00000776}, |
| 2210 | + {0x0000a1b8, 0x00000776}, |
| 2211 | + {0x0000a1bc, 0x00000776}, |
| 2212 | + {0x0000a1c0, 0x00000776}, |
| 2213 | + {0x0000a1c4, 0x00000776}, |
| 2214 | + {0x0000a1c8, 0x00000776}, |
| 2215 | + {0x0000a1cc, 0x00000776}, |
| 2216 | + {0x0000a1d0, 0x00000776}, |
| 2217 | + {0x0000a1d4, 0x00000776}, |
| 2218 | + {0x0000a1d8, 0x00000776}, |
| 2219 | + {0x0000a1dc, 0x00000776}, |
| 2220 | + {0x0000a1e0, 0x00000776}, |
| 2221 | + {0x0000a1e4, 0x00000776}, |
| 2222 | + {0x0000a1e8, 0x00000776}, |
| 2223 | + {0x0000a1ec, 0x00000776}, |
| 2224 | + {0x0000a1f0, 0x00000776}, |
| 2225 | + {0x0000a1f4, 0x00000776}, |
| 2226 | + {0x0000a1f8, 0x00000776}, |
| 2227 | + {0x0000a1fc, 0x00000776}, |
| 2228 | + {0x0000b000, 0x02000101}, |
| 2229 | + {0x0000b004, 0x02000102}, |
| 2230 | + {0x0000b008, 0x02000103}, |
| 2231 | + {0x0000b00c, 0x02000104}, |
| 2232 | + {0x0000b010, 0x02000200}, |
| 2233 | + {0x0000b014, 0x02000201}, |
| 2234 | + {0x0000b018, 0x02000202}, |
| 2235 | + {0x0000b01c, 0x02000203}, |
| 2236 | + {0x0000b020, 0x02000204}, |
| 2237 | + {0x0000b024, 0x02000205}, |
| 2238 | + {0x0000b028, 0x02000208}, |
| 2239 | + {0x0000b02c, 0x02000302}, |
| 2240 | + {0x0000b030, 0x02000303}, |
| 2241 | + {0x0000b034, 0x02000304}, |
| 2242 | + {0x0000b038, 0x02000400}, |
| 2243 | + {0x0000b03c, 0x02010300}, |
| 2244 | + {0x0000b040, 0x02010301}, |
| 2245 | + {0x0000b044, 0x02010302}, |
| 2246 | + {0x0000b048, 0x02000500}, |
| 2247 | + {0x0000b04c, 0x02010400}, |
| 2248 | + {0x0000b050, 0x02020300}, |
| 2249 | + {0x0000b054, 0x02020301}, |
| 2250 | + {0x0000b058, 0x02020302}, |
| 2251 | + {0x0000b05c, 0x02020303}, |
| 2252 | + {0x0000b060, 0x02020400}, |
| 2253 | + {0x0000b064, 0x02030300}, |
| 2254 | + {0x0000b068, 0x02030301}, |
| 2255 | + {0x0000b06c, 0x02030302}, |
| 2256 | + {0x0000b070, 0x02030303}, |
| 2257 | + {0x0000b074, 0x02030400}, |
| 2258 | + {0x0000b078, 0x02040300}, |
| 2259 | + {0x0000b07c, 0x02040301}, |
| 2260 | + {0x0000b080, 0x02040302}, |
| 2261 | + {0x0000b084, 0x02040303}, |
| 2262 | + {0x0000b088, 0x02030500}, |
| 2263 | + {0x0000b08c, 0x02040400}, |
| 2264 | + {0x0000b090, 0x02050203}, |
| 2265 | + {0x0000b094, 0x02050204}, |
| 2266 | + {0x0000b098, 0x02050205}, |
| 2267 | + {0x0000b09c, 0x02040500}, |
| 2268 | + {0x0000b0a0, 0x02050301}, |
| 2269 | + {0x0000b0a4, 0x02050302}, |
| 2270 | + {0x0000b0a8, 0x02050303}, |
| 2271 | + {0x0000b0ac, 0x02050400}, |
| 2272 | + {0x0000b0b0, 0x02050401}, |
| 2273 | + {0x0000b0b4, 0x02050402}, |
| 2274 | + {0x0000b0b8, 0x02050403}, |
| 2275 | + {0x0000b0bc, 0x02050500}, |
| 2276 | + {0x0000b0c0, 0x02050501}, |
| 2277 | + {0x0000b0c4, 0x02050502}, |
| 2278 | + {0x0000b0c8, 0x02050503}, |
| 2279 | + {0x0000b0cc, 0x02050504}, |
| 2280 | + {0x0000b0d0, 0x02050600}, |
| 2281 | + {0x0000b0d4, 0x02050601}, |
| 2282 | + {0x0000b0d8, 0x02050602}, |
| 2283 | + {0x0000b0dc, 0x02050603}, |
| 2284 | + {0x0000b0e0, 0x02050604}, |
| 2285 | + {0x0000b0e4, 0x02050700}, |
| 2286 | + {0x0000b0e8, 0x02050701}, |
| 2287 | + {0x0000b0ec, 0x02050702}, |
| 2288 | + {0x0000b0f0, 0x02050703}, |
| 2289 | + {0x0000b0f4, 0x02050704}, |
| 2290 | + {0x0000b0f8, 0x02050705}, |
| 2291 | + {0x0000b0fc, 0x02050708}, |
| 2292 | + {0x0000b100, 0x02050709}, |
| 2293 | + {0x0000b104, 0x0205070a}, |
| 2294 | + {0x0000b108, 0x0205070b}, |
| 2295 | + {0x0000b10c, 0x0205070c}, |
| 2296 | + {0x0000b110, 0x0205070d}, |
| 2297 | + {0x0000b114, 0x02050710}, |
| 2298 | + {0x0000b118, 0x02050711}, |
| 2299 | + {0x0000b11c, 0x02050712}, |
| 2300 | + {0x0000b120, 0x02050713}, |
| 2301 | + {0x0000b124, 0x02050714}, |
| 2302 | + {0x0000b128, 0x02050715}, |
| 2303 | + {0x0000b12c, 0x02050730}, |
| 2304 | + {0x0000b130, 0x02050731}, |
| 2305 | + {0x0000b134, 0x02050732}, |
| 2306 | + {0x0000b138, 0x02050733}, |
| 2307 | + {0x0000b13c, 0x02050734}, |
| 2308 | + {0x0000b140, 0x02050735}, |
| 2309 | + {0x0000b144, 0x02050750}, |
| 2310 | + {0x0000b148, 0x02050751}, |
| 2311 | + {0x0000b14c, 0x02050752}, |
| 2312 | + {0x0000b150, 0x02050753}, |
| 2313 | + {0x0000b154, 0x02050754}, |
| 2314 | + {0x0000b158, 0x02050755}, |
| 2315 | + {0x0000b15c, 0x02050770}, |
| 2316 | + {0x0000b160, 0x02050771}, |
| 2317 | + {0x0000b164, 0x02050772}, |
| 2318 | + {0x0000b168, 0x02050773}, |
| 2319 | + {0x0000b16c, 0x02050774}, |
| 2320 | + {0x0000b170, 0x02050775}, |
| 2321 | + {0x0000b174, 0x00000776}, |
| 2322 | + {0x0000b178, 0x00000776}, |
| 2323 | + {0x0000b17c, 0x00000776}, |
| 2324 | + {0x0000b180, 0x00000776}, |
| 2325 | + {0x0000b184, 0x00000776}, |
| 2326 | + {0x0000b188, 0x00000776}, |
| 2327 | + {0x0000b18c, 0x00000776}, |
| 2328 | + {0x0000b190, 0x00000776}, |
| 2329 | + {0x0000b194, 0x00000776}, |
| 2330 | + {0x0000b198, 0x00000776}, |
| 2331 | + {0x0000b19c, 0x00000776}, |
| 2332 | + {0x0000b1a0, 0x00000776}, |
| 2333 | + {0x0000b1a4, 0x00000776}, |
| 2334 | + {0x0000b1a8, 0x00000776}, |
| 2335 | + {0x0000b1ac, 0x00000776}, |
| 2336 | + {0x0000b1b0, 0x00000776}, |
| 2337 | + {0x0000b1b4, 0x00000776}, |
| 2338 | + {0x0000b1b8, 0x00000776}, |
| 2339 | + {0x0000b1bc, 0x00000776}, |
| 2340 | + {0x0000b1c0, 0x00000776}, |
| 2341 | + {0x0000b1c4, 0x00000776}, |
| 2342 | + {0x0000b1c8, 0x00000776}, |
| 2343 | + {0x0000b1cc, 0x00000776}, |
| 2344 | + {0x0000b1d0, 0x00000776}, |
| 2345 | + {0x0000b1d4, 0x00000776}, |
| 2346 | + {0x0000b1d8, 0x00000776}, |
| 2347 | + {0x0000b1dc, 0x00000776}, |
| 2348 | + {0x0000b1e0, 0x00000776}, |
| 2349 | + {0x0000b1e4, 0x00000776}, |
| 2350 | + {0x0000b1e8, 0x00000776}, |
| 2351 | + {0x0000b1ec, 0x00000776}, |
| 2352 | + {0x0000b1f0, 0x00000776}, |
| 2353 | + {0x0000b1f4, 0x00000776}, |
| 2354 | + {0x0000b1f8, 0x00000776}, |
| 2355 | + {0x0000b1fc, 0x00000776}, |
| 2356 | +}; |
| 2357 | + |
| 2358 | +static const u32 ar9300_2p2_mac_postamble[][5] = { |
| 2359 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 2360 | + {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160}, |
| 2361 | + {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c}, |
| 2362 | + {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38}, |
| 2363 | + {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00}, |
| 2364 | + {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b}, |
| 2365 | + {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810}, |
| 2366 | + {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a}, |
| 2367 | + {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440}, |
| 2368 | +}; |
| 2369 | + |
| 2370 | +static const u32 ar9300_2p2_soc_postamble[][5] = { |
| 2371 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 2372 | + {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023}, |
| 2373 | +}; |
| 2374 | + |
| 2375 | +static const u32 ar9200_merlin_2p2_radio_core[][2] = { |
| 2376 | + /* Addr allmodes */ |
| 2377 | + {0x00007800, 0x00040000}, |
| 2378 | + {0x00007804, 0xdb005012}, |
| 2379 | + {0x00007808, 0x04924914}, |
| 2380 | + {0x0000780c, 0x21084210}, |
| 2381 | + {0x00007810, 0x6d801300}, |
| 2382 | + {0x00007814, 0x0019beff}, |
| 2383 | + {0x00007818, 0x07e41000}, |
| 2384 | + {0x0000781c, 0x00392000}, |
| 2385 | + {0x00007820, 0x92592480}, |
| 2386 | + {0x00007824, 0x00040000}, |
| 2387 | + {0x00007828, 0xdb005012}, |
| 2388 | + {0x0000782c, 0x04924914}, |
| 2389 | + {0x00007830, 0x21084210}, |
| 2390 | + {0x00007834, 0x6d801300}, |
| 2391 | + {0x00007838, 0x0019beff}, |
| 2392 | + {0x0000783c, 0x07e40000}, |
| 2393 | + {0x00007840, 0x00392000}, |
| 2394 | + {0x00007844, 0x92592480}, |
| 2395 | + {0x00007848, 0x00100000}, |
| 2396 | + {0x0000784c, 0x773f0567}, |
| 2397 | + {0x00007850, 0x54214514}, |
| 2398 | + {0x00007854, 0x12035828}, |
| 2399 | + {0x00007858, 0x92592692}, |
| 2400 | + {0x0000785c, 0x00000000}, |
| 2401 | + {0x00007860, 0x56400000}, |
| 2402 | + {0x00007864, 0x0a8e370e}, |
| 2403 | + {0x00007868, 0xc0102850}, |
| 2404 | + {0x0000786c, 0x812d4000}, |
| 2405 | + {0x00007870, 0x807ec400}, |
| 2406 | + {0x00007874, 0x001b6db0}, |
| 2407 | + {0x00007878, 0x00376b63}, |
| 2408 | + {0x0000787c, 0x06db6db6}, |
| 2409 | + {0x00007880, 0x006d8000}, |
| 2410 | + {0x00007884, 0xffeffffe}, |
| 2411 | + {0x00007888, 0xffeffffe}, |
| 2412 | + {0x0000788c, 0x00010000}, |
| 2413 | + {0x00007890, 0x02060aeb}, |
| 2414 | + {0x00007894, 0x5a108000}, |
| 2415 | +}; |
| 2416 | + |
| 2417 | +static const u32 ar9300_2p2_baseband_postamble[][5] = { |
| 2418 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 2419 | + {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011}, |
| 2420 | + {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e}, |
| 2421 | + {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, |
| 2422 | + {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881}, |
| 2423 | + {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, |
| 2424 | + {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, |
| 2425 | + {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4}, |
| 2426 | + {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0}, |
| 2427 | + {0x00009e04, 0x00802020, 0x00802020, 0x00802020, 0x00802020}, |
| 2428 | + {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, |
| 2429 | + {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, |
| 2430 | + {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e}, |
| 2431 | + {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 2432 | + {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, |
| 2433 | + {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, |
| 2434 | + {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, |
| 2435 | + {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, |
| 2436 | + {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, |
| 2437 | + {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, |
| 2438 | + {0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0}, |
| 2439 | + {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, |
| 2440 | + {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, |
| 2441 | + {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff}, |
| 2442 | + {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018}, |
| 2443 | + {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108}, |
| 2444 | + {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898}, |
| 2445 | + {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002}, |
| 2446 | + {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, |
| 2447 | + {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501}, |
| 2448 | + {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, |
| 2449 | + {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b}, |
| 2450 | + {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 2451 | + {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, |
| 2452 | + {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, |
| 2453 | + {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, |
| 2454 | + {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071982}, |
| 2455 | + {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a}, |
| 2456 | + {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 2457 | + {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 2458 | + {0x0000ae04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 2459 | + {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 2460 | + {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 2461 | + {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, |
| 2462 | + {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 2463 | + {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 2464 | + {0x0000be04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 2465 | + {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 2466 | + {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 2467 | + {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, |
| 2468 | + {0x0000c284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 2469 | +}; |
| 2470 | + |
| 2471 | +static const u32 ar9300_2p2_baseband_core[][2] = { |
| 2472 | + /* Addr allmodes */ |
| 2473 | + {0x00009800, 0xafe68e30}, |
| 2474 | + {0x00009804, 0xfd14e000}, |
| 2475 | + {0x00009808, 0x9c0a9f6b}, |
| 2476 | + {0x0000980c, 0x04900000}, |
| 2477 | + {0x00009814, 0x9280c00a}, |
| 2478 | + {0x00009818, 0x00000000}, |
| 2479 | + {0x0000981c, 0x00020028}, |
| 2480 | + {0x00009834, 0x5f3ca3de}, |
| 2481 | + {0x00009838, 0x0108ecff}, |
| 2482 | + {0x0000983c, 0x14750600}, |
| 2483 | + {0x00009880, 0x201fff00}, |
| 2484 | + {0x00009884, 0x00001042}, |
| 2485 | + {0x000098a4, 0x00200400}, |
| 2486 | + {0x000098b0, 0x52440bbe}, |
| 2487 | + {0x000098d0, 0x004b6a8e}, |
| 2488 | + {0x000098d4, 0x00000820}, |
| 2489 | + {0x000098dc, 0x00000000}, |
| 2490 | + {0x000098f0, 0x00000000}, |
| 2491 | + {0x000098f4, 0x00000000}, |
| 2492 | + {0x00009c04, 0xff55ff55}, |
| 2493 | + {0x00009c08, 0x0320ff55}, |
| 2494 | + {0x00009c0c, 0x00000000}, |
| 2495 | + {0x00009c10, 0x00000000}, |
| 2496 | + {0x00009c14, 0x00046384}, |
| 2497 | + {0x00009c18, 0x05b6b440}, |
| 2498 | + {0x00009c1c, 0x00b6b440}, |
| 2499 | + {0x00009d00, 0xc080a333}, |
| 2500 | + {0x00009d04, 0x40206c10}, |
| 2501 | + {0x00009d08, 0x009c4060}, |
| 2502 | + {0x00009d0c, 0x9883800a}, |
| 2503 | + {0x00009d10, 0x01834061}, |
| 2504 | + {0x00009d14, 0x00c0040b}, |
| 2505 | + {0x00009d18, 0x00000000}, |
| 2506 | + {0x00009e08, 0x0038230c}, |
| 2507 | + {0x00009e24, 0x990bb515}, |
| 2508 | + {0x00009e28, 0x0c6f0000}, |
| 2509 | + {0x00009e30, 0x06336f77}, |
| 2510 | + {0x00009e34, 0x6af6532f}, |
| 2511 | + {0x00009e38, 0x0cc80c00}, |
| 2512 | + {0x00009e3c, 0xcf946222}, |
| 2513 | + {0x00009e40, 0x0d261820}, |
| 2514 | + {0x00009e4c, 0x00001004}, |
| 2515 | + {0x00009e50, 0x00ff03f1}, |
| 2516 | + {0x00009e54, 0x00000000}, |
| 2517 | + {0x00009fc0, 0x803e4788}, |
| 2518 | + {0x00009fc4, 0x0001efb5}, |
| 2519 | + {0x00009fcc, 0x40000014}, |
| 2520 | + {0x00009fd0, 0x01193b93}, |
| 2521 | + {0x0000a20c, 0x00000000}, |
| 2522 | + {0x0000a220, 0x00000000}, |
| 2523 | + {0x0000a224, 0x00000000}, |
| 2524 | + {0x0000a228, 0x10002310}, |
| 2525 | + {0x0000a22c, 0x01036a1e}, |
| 2526 | + {0x0000a23c, 0x00000000}, |
| 2527 | + {0x0000a244, 0x0c000000}, |
| 2528 | + {0x0000a2a0, 0x00000001}, |
| 2529 | + {0x0000a2c0, 0x00000001}, |
| 2530 | + {0x0000a2c8, 0x00000000}, |
| 2531 | + {0x0000a2cc, 0x18c43433}, |
| 2532 | + {0x0000a2d4, 0x00000000}, |
| 2533 | + {0x0000a2dc, 0x00000000}, |
| 2534 | + {0x0000a2e0, 0x00000000}, |
| 2535 | + {0x0000a2e4, 0x00000000}, |
| 2536 | + {0x0000a2e8, 0x00000000}, |
| 2537 | + {0x0000a2ec, 0x00000000}, |
| 2538 | + {0x0000a2f0, 0x00000000}, |
| 2539 | + {0x0000a2f4, 0x00000000}, |
| 2540 | + {0x0000a2f8, 0x00000000}, |
| 2541 | + {0x0000a344, 0x00000000}, |
| 2542 | + {0x0000a34c, 0x00000000}, |
| 2543 | + {0x0000a350, 0x0000a000}, |
| 2544 | + {0x0000a364, 0x00000000}, |
| 2545 | + {0x0000a370, 0x00000000}, |
| 2546 | + {0x0000a390, 0x00000001}, |
| 2547 | + {0x0000a394, 0x00000444}, |
| 2548 | + {0x0000a398, 0x001f0e0f}, |
| 2549 | + {0x0000a39c, 0x0075393f}, |
| 2550 | + {0x0000a3a0, 0xb79f6427}, |
| 2551 | + {0x0000a3a4, 0x00000000}, |
| 2552 | + {0x0000a3a8, 0xaaaaaaaa}, |
| 2553 | + {0x0000a3ac, 0x3c466478}, |
| 2554 | + {0x0000a3c0, 0x20202020}, |
| 2555 | + {0x0000a3c4, 0x22222220}, |
| 2556 | + {0x0000a3c8, 0x20200020}, |
| 2557 | + {0x0000a3cc, 0x20202020}, |
| 2558 | + {0x0000a3d0, 0x20202020}, |
| 2559 | + {0x0000a3d4, 0x20202020}, |
| 2560 | + {0x0000a3d8, 0x20202020}, |
| 2561 | + {0x0000a3dc, 0x20202020}, |
| 2562 | + {0x0000a3e0, 0x20202020}, |
| 2563 | + {0x0000a3e4, 0x20202020}, |
| 2564 | + {0x0000a3e8, 0x20202020}, |
| 2565 | + {0x0000a3ec, 0x20202020}, |
| 2566 | + {0x0000a3f0, 0x00000000}, |
| 2567 | + {0x0000a3f4, 0x00000246}, |
| 2568 | + {0x0000a3f8, 0x0cdbd380}, |
| 2569 | + {0x0000a3fc, 0x000f0f01}, |
| 2570 | + {0x0000a400, 0x8fa91f01}, |
| 2571 | + {0x0000a404, 0x00000000}, |
| 2572 | + {0x0000a408, 0x0e79e5c6}, |
| 2573 | + {0x0000a40c, 0x00820820}, |
| 2574 | + {0x0000a414, 0x1ce739ce}, |
| 2575 | + {0x0000a418, 0x2d001dce}, |
| 2576 | + {0x0000a41c, 0x1ce739ce}, |
| 2577 | + {0x0000a420, 0x000001ce}, |
| 2578 | + {0x0000a424, 0x1ce739ce}, |
| 2579 | + {0x0000a428, 0x000001ce}, |
| 2580 | + {0x0000a42c, 0x1ce739ce}, |
| 2581 | + {0x0000a430, 0x1ce739ce}, |
| 2582 | + {0x0000a434, 0x00000000}, |
| 2583 | + {0x0000a438, 0x00001801}, |
| 2584 | + {0x0000a43c, 0x00000000}, |
| 2585 | + {0x0000a440, 0x00000000}, |
| 2586 | + {0x0000a444, 0x00000000}, |
| 2587 | + {0x0000a448, 0x06000080}, |
| 2588 | + {0x0000a44c, 0x00000001}, |
| 2589 | + {0x0000a450, 0x00010000}, |
| 2590 | + {0x0000a458, 0x00000000}, |
| 2591 | + {0x0000a600, 0x00000000}, |
| 2592 | + {0x0000a604, 0x00000000}, |
| 2593 | + {0x0000a608, 0x00000000}, |
| 2594 | + {0x0000a60c, 0x00000000}, |
| 2595 | + {0x0000a610, 0x00000000}, |
| 2596 | + {0x0000a614, 0x00000000}, |
| 2597 | + {0x0000a618, 0x00000000}, |
| 2598 | + {0x0000a61c, 0x00000000}, |
| 2599 | + {0x0000a620, 0x00000000}, |
| 2600 | + {0x0000a624, 0x00000000}, |
| 2601 | + {0x0000a628, 0x00000000}, |
| 2602 | + {0x0000a62c, 0x00000000}, |
| 2603 | + {0x0000a630, 0x00000000}, |
| 2604 | + {0x0000a634, 0x00000000}, |
| 2605 | + {0x0000a638, 0x00000000}, |
| 2606 | + {0x0000a63c, 0x00000000}, |
| 2607 | + {0x0000a640, 0x00000000}, |
| 2608 | + {0x0000a644, 0x3fad9d74}, |
| 2609 | + {0x0000a648, 0x0048060a}, |
| 2610 | + {0x0000a64c, 0x00000637}, |
| 2611 | + {0x0000a670, 0x03020100}, |
| 2612 | + {0x0000a674, 0x09080504}, |
| 2613 | + {0x0000a678, 0x0d0c0b0a}, |
| 2614 | + {0x0000a67c, 0x13121110}, |
| 2615 | + {0x0000a680, 0x31301514}, |
| 2616 | + {0x0000a684, 0x35343332}, |
| 2617 | + {0x0000a688, 0x00000036}, |
| 2618 | + {0x0000a690, 0x00000838}, |
| 2619 | + {0x0000a7c0, 0x00000000}, |
| 2620 | + {0x0000a7c4, 0xfffffffc}, |
| 2621 | + {0x0000a7c8, 0x00000000}, |
| 2622 | + {0x0000a7cc, 0x00000000}, |
| 2623 | + {0x0000a7d0, 0x00000000}, |
| 2624 | + {0x0000a7d4, 0x00000004}, |
| 2625 | + {0x0000a7dc, 0x00000001}, |
| 2626 | + {0x0000a8d0, 0x004b6a8e}, |
| 2627 | + {0x0000a8d4, 0x00000820}, |
| 2628 | + {0x0000a8dc, 0x00000000}, |
| 2629 | + {0x0000a8f0, 0x00000000}, |
| 2630 | + {0x0000a8f4, 0x00000000}, |
| 2631 | + {0x0000b2d0, 0x00000080}, |
| 2632 | + {0x0000b2d4, 0x00000000}, |
| 2633 | + {0x0000b2dc, 0x00000000}, |
| 2634 | + {0x0000b2e0, 0x00000000}, |
| 2635 | + {0x0000b2e4, 0x00000000}, |
| 2636 | + {0x0000b2e8, 0x00000000}, |
| 2637 | + {0x0000b2ec, 0x00000000}, |
| 2638 | + {0x0000b2f0, 0x00000000}, |
| 2639 | + {0x0000b2f4, 0x00000000}, |
| 2640 | + {0x0000b2f8, 0x00000000}, |
| 2641 | + {0x0000b408, 0x0e79e5c0}, |
| 2642 | + {0x0000b40c, 0x00820820}, |
| 2643 | + {0x0000b420, 0x00000000}, |
| 2644 | + {0x0000b8d0, 0x004b6a8e}, |
| 2645 | + {0x0000b8d4, 0x00000820}, |
| 2646 | + {0x0000b8dc, 0x00000000}, |
| 2647 | + {0x0000b8f0, 0x00000000}, |
| 2648 | + {0x0000b8f4, 0x00000000}, |
| 2649 | + {0x0000c2d0, 0x00000080}, |
| 2650 | + {0x0000c2d4, 0x00000000}, |
| 2651 | + {0x0000c2dc, 0x00000000}, |
| 2652 | + {0x0000c2e0, 0x00000000}, |
| 2653 | + {0x0000c2e4, 0x00000000}, |
| 2654 | + {0x0000c2e8, 0x00000000}, |
| 2655 | + {0x0000c2ec, 0x00000000}, |
| 2656 | + {0x0000c2f0, 0x00000000}, |
| 2657 | + {0x0000c2f4, 0x00000000}, |
| 2658 | + {0x0000c2f8, 0x00000000}, |
| 2659 | + {0x0000c408, 0x0e79e5c0}, |
| 2660 | + {0x0000c40c, 0x00820820}, |
| 2661 | + {0x0000c420, 0x00000000}, |
| 2662 | +}; |
| 2663 | + |
| 2664 | +static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = { |
| 2665 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 2666 | + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 2667 | + {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, |
| 2668 | + {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002}, |
| 2669 | + {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, |
| 2670 | + {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, |
| 2671 | + {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, |
| 2672 | + {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, |
| 2673 | + {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, |
| 2674 | + {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, |
| 2675 | + {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, |
| 2676 | + {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, |
| 2677 | + {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, |
| 2678 | + {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, |
| 2679 | + {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20}, |
| 2680 | + {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22}, |
| 2681 | + {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24}, |
| 2682 | + {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640}, |
| 2683 | + {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660}, |
| 2684 | + {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861}, |
| 2685 | + {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81}, |
| 2686 | + {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, |
| 2687 | + {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84}, |
| 2688 | + {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3}, |
| 2689 | + {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5}, |
| 2690 | + {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9}, |
| 2691 | + {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb}, |
| 2692 | + {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2693 | + {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2694 | + {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2695 | + {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2696 | + {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2697 | + {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2698 | + {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2699 | + {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, |
| 2700 | + {0x0000a584, 0x06802223, 0x06802223, 0x04800002, 0x04800002}, |
| 2701 | + {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, |
| 2702 | + {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, |
| 2703 | + {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, |
| 2704 | + {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, |
| 2705 | + {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, |
| 2706 | + {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, |
| 2707 | + {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, |
| 2708 | + {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, |
| 2709 | + {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, |
| 2710 | + {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, |
| 2711 | + {0x0000a5b0, 0x34825643, 0x34825643, 0x2a800e20, 0x2a800e20}, |
| 2712 | + {0x0000a5b4, 0x38825a44, 0x38825a44, 0x2e800e22, 0x2e800e22}, |
| 2713 | + {0x0000a5b8, 0x3b825e45, 0x3b825e45, 0x31800e24, 0x31800e24}, |
| 2714 | + {0x0000a5bc, 0x41825e4a, 0x41825e4a, 0x34801640, 0x34801640}, |
| 2715 | + {0x0000a5c0, 0x48825e6c, 0x48825e6c, 0x38801660, 0x38801660}, |
| 2716 | + {0x0000a5c4, 0x4e825e8e, 0x4e825e8e, 0x3b801861, 0x3b801861}, |
| 2717 | + {0x0000a5c8, 0x53825eb2, 0x53825eb2, 0x3e801a81, 0x3e801a81}, |
| 2718 | + {0x0000a5cc, 0x59825eb5, 0x59825eb5, 0x42801a83, 0x42801a83}, |
| 2719 | + {0x0000a5d0, 0x5f825ef6, 0x5f825ef6, 0x44801c84, 0x44801c84}, |
| 2720 | + {0x0000a5d4, 0x62825f56, 0x62825f56, 0x48801ce3, 0x48801ce3}, |
| 2721 | + {0x0000a5d8, 0x66827f56, 0x66827f56, 0x4c801ce5, 0x4c801ce5}, |
| 2722 | + {0x0000a5dc, 0x6a829f56, 0x6a829f56, 0x50801ce9, 0x50801ce9}, |
| 2723 | + {0x0000a5e0, 0x70849f56, 0x70849f56, 0x54801ceb, 0x54801ceb}, |
| 2724 | + {0x0000a5e4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2725 | + {0x0000a5e8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2726 | + {0x0000a5ec, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2727 | + {0x0000a5f0, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2728 | + {0x0000a5f4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2729 | + {0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2730 | + {0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2731 | + {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 2732 | + {0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 2733 | + {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 2734 | + {0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 2735 | + {0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 2736 | + {0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 2737 | + {0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 2738 | + {0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 2739 | + {0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 2740 | +}; |
| 2741 | + |
| 2742 | +static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = { |
| 2743 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 2744 | + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 2745 | + {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, |
| 2746 | + {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002}, |
| 2747 | + {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, |
| 2748 | + {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, |
| 2749 | + {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, |
| 2750 | + {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, |
| 2751 | + {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, |
| 2752 | + {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, |
| 2753 | + {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, |
| 2754 | + {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, |
| 2755 | + {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, |
| 2756 | + {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, |
| 2757 | + {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20}, |
| 2758 | + {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22}, |
| 2759 | + {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24}, |
| 2760 | + {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640}, |
| 2761 | + {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660}, |
| 2762 | + {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861}, |
| 2763 | + {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81}, |
| 2764 | + {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, |
| 2765 | + {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84}, |
| 2766 | + {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3}, |
| 2767 | + {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5}, |
| 2768 | + {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9}, |
| 2769 | + {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb}, |
| 2770 | + {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2771 | + {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2772 | + {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2773 | + {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2774 | + {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2775 | + {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2776 | + {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 2777 | + {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, |
| 2778 | + {0x0000a584, 0x06802223, 0x06802223, 0x04800002, 0x04800002}, |
| 2779 | + {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, |
| 2780 | + {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, |
| 2781 | + {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, |
| 2782 | + {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, |
| 2783 | + {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, |
| 2784 | + {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, |
| 2785 | + {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, |
| 2786 | + {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, |
| 2787 | + {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, |
| 2788 | + {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, |
| 2789 | + {0x0000a5b0, 0x34825643, 0x34825643, 0x2a800e20, 0x2a800e20}, |
| 2790 | + {0x0000a5b4, 0x38825a44, 0x38825a44, 0x2e800e22, 0x2e800e22}, |
| 2791 | + {0x0000a5b8, 0x3b825e45, 0x3b825e45, 0x31800e24, 0x31800e24}, |
| 2792 | + {0x0000a5bc, 0x41825e4a, 0x41825e4a, 0x34801640, 0x34801640}, |
| 2793 | + {0x0000a5c0, 0x48825e6c, 0x48825e6c, 0x38801660, 0x38801660}, |
| 2794 | + {0x0000a5c4, 0x4e825e8e, 0x4e825e8e, 0x3b801861, 0x3b801861}, |
| 2795 | + {0x0000a5c8, 0x53825eb2, 0x53825eb2, 0x3e801a81, 0x3e801a81}, |
| 2796 | + {0x0000a5cc, 0x59825eb5, 0x59825eb5, 0x42801a83, 0x42801a83}, |
| 2797 | + {0x0000a5d0, 0x5f825ef6, 0x5f825ef6, 0x44801c84, 0x44801c84}, |
| 2798 | + {0x0000a5d4, 0x62825f56, 0x62825f56, 0x48801ce3, 0x48801ce3}, |
| 2799 | + {0x0000a5d8, 0x66827f56, 0x66827f56, 0x4c801ce5, 0x4c801ce5}, |
| 2800 | + {0x0000a5dc, 0x6a829f56, 0x6a829f56, 0x50801ce9, 0x50801ce9}, |
| 2801 | + {0x0000a5e0, 0x70849f56, 0x70849f56, 0x54801ceb, 0x54801ceb}, |
| 2802 | + {0x0000a5e4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2803 | + {0x0000a5e8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2804 | + {0x0000a5ec, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2805 | + {0x0000a5f0, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2806 | + {0x0000a5f4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2807 | + {0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2808 | + {0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 2809 | + {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 2810 | + {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 2811 | + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 2812 | + {0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 2813 | + {0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 2814 | + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 2815 | + {0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 2816 | + {0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 2817 | + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 2818 | +}; |
| 2819 | + |
| 2820 | +static const u32 ar9300Common_rx_gain_table_2p2[][2] = { |
| 2821 | + /* Addr allmodes */ |
| 2822 | + {0x0000a000, 0x00010000}, |
| 2823 | + {0x0000a004, 0x00030002}, |
| 2824 | + {0x0000a008, 0x00050004}, |
| 2825 | + {0x0000a00c, 0x00810080}, |
| 2826 | + {0x0000a010, 0x00830082}, |
| 2827 | + {0x0000a014, 0x01810180}, |
| 2828 | + {0x0000a018, 0x01830182}, |
| 2829 | + {0x0000a01c, 0x01850184}, |
| 2830 | + {0x0000a020, 0x01890188}, |
| 2831 | + {0x0000a024, 0x018b018a}, |
| 2832 | + {0x0000a028, 0x018d018c}, |
| 2833 | + {0x0000a02c, 0x01910190}, |
| 2834 | + {0x0000a030, 0x01930192}, |
| 2835 | + {0x0000a034, 0x01950194}, |
| 2836 | + {0x0000a038, 0x038a0196}, |
| 2837 | + {0x0000a03c, 0x038c038b}, |
| 2838 | + {0x0000a040, 0x0390038d}, |
| 2839 | + {0x0000a044, 0x03920391}, |
| 2840 | + {0x0000a048, 0x03940393}, |
| 2841 | + {0x0000a04c, 0x03960395}, |
| 2842 | + {0x0000a050, 0x00000000}, |
| 2843 | + {0x0000a054, 0x00000000}, |
| 2844 | + {0x0000a058, 0x00000000}, |
| 2845 | + {0x0000a05c, 0x00000000}, |
| 2846 | + {0x0000a060, 0x00000000}, |
| 2847 | + {0x0000a064, 0x00000000}, |
| 2848 | + {0x0000a068, 0x00000000}, |
| 2849 | + {0x0000a06c, 0x00000000}, |
| 2850 | + {0x0000a070, 0x00000000}, |
| 2851 | + {0x0000a074, 0x00000000}, |
| 2852 | + {0x0000a078, 0x00000000}, |
| 2853 | + {0x0000a07c, 0x00000000}, |
| 2854 | + {0x0000a080, 0x22222229}, |
| 2855 | + {0x0000a084, 0x1d1d1d1d}, |
| 2856 | + {0x0000a088, 0x1d1d1d1d}, |
| 2857 | + {0x0000a08c, 0x1d1d1d1d}, |
| 2858 | + {0x0000a090, 0x171d1d1d}, |
| 2859 | + {0x0000a094, 0x11111717}, |
| 2860 | + {0x0000a098, 0x00030311}, |
| 2861 | + {0x0000a09c, 0x00000000}, |
| 2862 | + {0x0000a0a0, 0x00000000}, |
| 2863 | + {0x0000a0a4, 0x00000000}, |
| 2864 | + {0x0000a0a8, 0x00000000}, |
| 2865 | + {0x0000a0ac, 0x00000000}, |
| 2866 | + {0x0000a0b0, 0x00000000}, |
| 2867 | + {0x0000a0b4, 0x00000000}, |
| 2868 | + {0x0000a0b8, 0x00000000}, |
| 2869 | + {0x0000a0bc, 0x00000000}, |
| 2870 | + {0x0000a0c0, 0x001f0000}, |
| 2871 | + {0x0000a0c4, 0x01000101}, |
| 2872 | + {0x0000a0c8, 0x011e011f}, |
| 2873 | + {0x0000a0cc, 0x011c011d}, |
| 2874 | + {0x0000a0d0, 0x02030204}, |
| 2875 | + {0x0000a0d4, 0x02010202}, |
| 2876 | + {0x0000a0d8, 0x021f0200}, |
| 2877 | + {0x0000a0dc, 0x0302021e}, |
| 2878 | + {0x0000a0e0, 0x03000301}, |
| 2879 | + {0x0000a0e4, 0x031e031f}, |
| 2880 | + {0x0000a0e8, 0x0402031d}, |
| 2881 | + {0x0000a0ec, 0x04000401}, |
| 2882 | + {0x0000a0f0, 0x041e041f}, |
| 2883 | + {0x0000a0f4, 0x0502041d}, |
| 2884 | + {0x0000a0f8, 0x05000501}, |
| 2885 | + {0x0000a0fc, 0x051e051f}, |
| 2886 | + {0x0000a100, 0x06010602}, |
| 2887 | + {0x0000a104, 0x061f0600}, |
| 2888 | + {0x0000a108, 0x061d061e}, |
| 2889 | + {0x0000a10c, 0x07020703}, |
| 2890 | + {0x0000a110, 0x07000701}, |
| 2891 | + {0x0000a114, 0x00000000}, |
| 2892 | + {0x0000a118, 0x00000000}, |
| 2893 | + {0x0000a11c, 0x00000000}, |
| 2894 | + {0x0000a120, 0x00000000}, |
| 2895 | + {0x0000a124, 0x00000000}, |
| 2896 | + {0x0000a128, 0x00000000}, |
| 2897 | + {0x0000a12c, 0x00000000}, |
| 2898 | + {0x0000a130, 0x00000000}, |
| 2899 | + {0x0000a134, 0x00000000}, |
| 2900 | + {0x0000a138, 0x00000000}, |
| 2901 | + {0x0000a13c, 0x00000000}, |
| 2902 | + {0x0000a140, 0x001f0000}, |
| 2903 | + {0x0000a144, 0x01000101}, |
| 2904 | + {0x0000a148, 0x011e011f}, |
| 2905 | + {0x0000a14c, 0x011c011d}, |
| 2906 | + {0x0000a150, 0x02030204}, |
| 2907 | + {0x0000a154, 0x02010202}, |
| 2908 | + {0x0000a158, 0x021f0200}, |
| 2909 | + {0x0000a15c, 0x0302021e}, |
| 2910 | + {0x0000a160, 0x03000301}, |
| 2911 | + {0x0000a164, 0x031e031f}, |
| 2912 | + {0x0000a168, 0x0402031d}, |
| 2913 | + {0x0000a16c, 0x04000401}, |
| 2914 | + {0x0000a170, 0x041e041f}, |
| 2915 | + {0x0000a174, 0x0502041d}, |
| 2916 | + {0x0000a178, 0x05000501}, |
| 2917 | + {0x0000a17c, 0x051e051f}, |
| 2918 | + {0x0000a180, 0x06010602}, |
| 2919 | + {0x0000a184, 0x061f0600}, |
| 2920 | + {0x0000a188, 0x061d061e}, |
| 2921 | + {0x0000a18c, 0x07020703}, |
| 2922 | + {0x0000a190, 0x07000701}, |
| 2923 | + {0x0000a194, 0x00000000}, |
| 2924 | + {0x0000a198, 0x00000000}, |
| 2925 | + {0x0000a19c, 0x00000000}, |
| 2926 | + {0x0000a1a0, 0x00000000}, |
| 2927 | + {0x0000a1a4, 0x00000000}, |
| 2928 | + {0x0000a1a8, 0x00000000}, |
| 2929 | + {0x0000a1ac, 0x00000000}, |
| 2930 | + {0x0000a1b0, 0x00000000}, |
| 2931 | + {0x0000a1b4, 0x00000000}, |
| 2932 | + {0x0000a1b8, 0x00000000}, |
| 2933 | + {0x0000a1bc, 0x00000000}, |
| 2934 | + {0x0000a1c0, 0x00000000}, |
| 2935 | + {0x0000a1c4, 0x00000000}, |
| 2936 | + {0x0000a1c8, 0x00000000}, |
| 2937 | + {0x0000a1cc, 0x00000000}, |
| 2938 | + {0x0000a1d0, 0x00000000}, |
| 2939 | + {0x0000a1d4, 0x00000000}, |
| 2940 | + {0x0000a1d8, 0x00000000}, |
| 2941 | + {0x0000a1dc, 0x00000000}, |
| 2942 | + {0x0000a1e0, 0x00000000}, |
| 2943 | + {0x0000a1e4, 0x00000000}, |
| 2944 | + {0x0000a1e8, 0x00000000}, |
| 2945 | + {0x0000a1ec, 0x00000000}, |
| 2946 | + {0x0000a1f0, 0x00000396}, |
| 2947 | + {0x0000a1f4, 0x00000396}, |
| 2948 | + {0x0000a1f8, 0x00000396}, |
| 2949 | + {0x0000a1fc, 0x00000196}, |
| 2950 | + {0x0000b000, 0x00010000}, |
| 2951 | + {0x0000b004, 0x00030002}, |
| 2952 | + {0x0000b008, 0x00050004}, |
| 2953 | + {0x0000b00c, 0x00810080}, |
| 2954 | + {0x0000b010, 0x00830082}, |
| 2955 | + {0x0000b014, 0x01810180}, |
| 2956 | + {0x0000b018, 0x01830182}, |
| 2957 | + {0x0000b01c, 0x01850184}, |
| 2958 | + {0x0000b020, 0x02810280}, |
| 2959 | + {0x0000b024, 0x02830282}, |
| 2960 | + {0x0000b028, 0x02850284}, |
| 2961 | + {0x0000b02c, 0x02890288}, |
| 2962 | + {0x0000b030, 0x028b028a}, |
| 2963 | + {0x0000b034, 0x0388028c}, |
| 2964 | + {0x0000b038, 0x038a0389}, |
| 2965 | + {0x0000b03c, 0x038c038b}, |
| 2966 | + {0x0000b040, 0x0390038d}, |
| 2967 | + {0x0000b044, 0x03920391}, |
| 2968 | + {0x0000b048, 0x03940393}, |
| 2969 | + {0x0000b04c, 0x03960395}, |
| 2970 | + {0x0000b050, 0x00000000}, |
| 2971 | + {0x0000b054, 0x00000000}, |
| 2972 | + {0x0000b058, 0x00000000}, |
| 2973 | + {0x0000b05c, 0x00000000}, |
| 2974 | + {0x0000b060, 0x00000000}, |
| 2975 | + {0x0000b064, 0x00000000}, |
| 2976 | + {0x0000b068, 0x00000000}, |
| 2977 | + {0x0000b06c, 0x00000000}, |
| 2978 | + {0x0000b070, 0x00000000}, |
| 2979 | + {0x0000b074, 0x00000000}, |
| 2980 | + {0x0000b078, 0x00000000}, |
| 2981 | + {0x0000b07c, 0x00000000}, |
| 2982 | + {0x0000b080, 0x32323232}, |
| 2983 | + {0x0000b084, 0x2f2f3232}, |
| 2984 | + {0x0000b088, 0x23282a2d}, |
| 2985 | + {0x0000b08c, 0x1c1e2123}, |
| 2986 | + {0x0000b090, 0x14171919}, |
| 2987 | + {0x0000b094, 0x0e0e1214}, |
| 2988 | + {0x0000b098, 0x03050707}, |
| 2989 | + {0x0000b09c, 0x00030303}, |
| 2990 | + {0x0000b0a0, 0x00000000}, |
| 2991 | + {0x0000b0a4, 0x00000000}, |
| 2992 | + {0x0000b0a8, 0x00000000}, |
| 2993 | + {0x0000b0ac, 0x00000000}, |
| 2994 | + {0x0000b0b0, 0x00000000}, |
| 2995 | + {0x0000b0b4, 0x00000000}, |
| 2996 | + {0x0000b0b8, 0x00000000}, |
| 2997 | + {0x0000b0bc, 0x00000000}, |
| 2998 | + {0x0000b0c0, 0x003f0020}, |
| 2999 | + {0x0000b0c4, 0x00400041}, |
| 3000 | + {0x0000b0c8, 0x0140005f}, |
| 3001 | + {0x0000b0cc, 0x0160015f}, |
| 3002 | + {0x0000b0d0, 0x017e017f}, |
| 3003 | + {0x0000b0d4, 0x02410242}, |
| 3004 | + {0x0000b0d8, 0x025f0240}, |
| 3005 | + {0x0000b0dc, 0x027f0260}, |
| 3006 | + {0x0000b0e0, 0x0341027e}, |
| 3007 | + {0x0000b0e4, 0x035f0340}, |
| 3008 | + {0x0000b0e8, 0x037f0360}, |
| 3009 | + {0x0000b0ec, 0x04400441}, |
| 3010 | + {0x0000b0f0, 0x0460045f}, |
| 3011 | + {0x0000b0f4, 0x0541047f}, |
| 3012 | + {0x0000b0f8, 0x055f0540}, |
| 3013 | + {0x0000b0fc, 0x057f0560}, |
| 3014 | + {0x0000b100, 0x06400641}, |
| 3015 | + {0x0000b104, 0x0660065f}, |
| 3016 | + {0x0000b108, 0x067e067f}, |
| 3017 | + {0x0000b10c, 0x07410742}, |
| 3018 | + {0x0000b110, 0x075f0740}, |
| 3019 | + {0x0000b114, 0x077f0760}, |
| 3020 | + {0x0000b118, 0x07800781}, |
| 3021 | + {0x0000b11c, 0x07a0079f}, |
| 3022 | + {0x0000b120, 0x07c107bf}, |
| 3023 | + {0x0000b124, 0x000007c0}, |
| 3024 | + {0x0000b128, 0x00000000}, |
| 3025 | + {0x0000b12c, 0x00000000}, |
| 3026 | + {0x0000b130, 0x00000000}, |
| 3027 | + {0x0000b134, 0x00000000}, |
| 3028 | + {0x0000b138, 0x00000000}, |
| 3029 | + {0x0000b13c, 0x00000000}, |
| 3030 | + {0x0000b140, 0x003f0020}, |
| 3031 | + {0x0000b144, 0x00400041}, |
| 3032 | + {0x0000b148, 0x0140005f}, |
| 3033 | + {0x0000b14c, 0x0160015f}, |
| 3034 | + {0x0000b150, 0x017e017f}, |
| 3035 | + {0x0000b154, 0x02410242}, |
| 3036 | + {0x0000b158, 0x025f0240}, |
| 3037 | + {0x0000b15c, 0x027f0260}, |
| 3038 | + {0x0000b160, 0x0341027e}, |
| 3039 | + {0x0000b164, 0x035f0340}, |
| 3040 | + {0x0000b168, 0x037f0360}, |
| 3041 | + {0x0000b16c, 0x04400441}, |
| 3042 | + {0x0000b170, 0x0460045f}, |
| 3043 | + {0x0000b174, 0x0541047f}, |
| 3044 | + {0x0000b178, 0x055f0540}, |
| 3045 | + {0x0000b17c, 0x057f0560}, |
| 3046 | + {0x0000b180, 0x06400641}, |
| 3047 | + {0x0000b184, 0x0660065f}, |
| 3048 | + {0x0000b188, 0x067e067f}, |
| 3049 | + {0x0000b18c, 0x07410742}, |
| 3050 | + {0x0000b190, 0x075f0740}, |
| 3051 | + {0x0000b194, 0x077f0760}, |
| 3052 | + {0x0000b198, 0x07800781}, |
| 3053 | + {0x0000b19c, 0x07a0079f}, |
| 3054 | + {0x0000b1a0, 0x07c107bf}, |
| 3055 | + {0x0000b1a4, 0x000007c0}, |
| 3056 | + {0x0000b1a8, 0x00000000}, |
| 3057 | + {0x0000b1ac, 0x00000000}, |
| 3058 | + {0x0000b1b0, 0x00000000}, |
| 3059 | + {0x0000b1b4, 0x00000000}, |
| 3060 | + {0x0000b1b8, 0x00000000}, |
| 3061 | + {0x0000b1bc, 0x00000000}, |
| 3062 | + {0x0000b1c0, 0x00000000}, |
| 3063 | + {0x0000b1c4, 0x00000000}, |
| 3064 | + {0x0000b1c8, 0x00000000}, |
| 3065 | + {0x0000b1cc, 0x00000000}, |
| 3066 | + {0x0000b1d0, 0x00000000}, |
| 3067 | + {0x0000b1d4, 0x00000000}, |
| 3068 | + {0x0000b1d8, 0x00000000}, |
| 3069 | + {0x0000b1dc, 0x00000000}, |
| 3070 | + {0x0000b1e0, 0x00000000}, |
| 3071 | + {0x0000b1e4, 0x00000000}, |
| 3072 | + {0x0000b1e8, 0x00000000}, |
| 3073 | + {0x0000b1ec, 0x00000000}, |
| 3074 | + {0x0000b1f0, 0x00000396}, |
| 3075 | + {0x0000b1f4, 0x00000396}, |
| 3076 | + {0x0000b1f8, 0x00000396}, |
| 3077 | + {0x0000b1fc, 0x00000196}, |
| 3078 | +}; |
| 3079 | + |
| 3080 | +static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p2[][5] = { |
| 3081 | + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 3082 | + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 3083 | + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 3084 | + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, |
| 3085 | + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, |
| 3086 | + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, |
| 3087 | + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, |
| 3088 | + {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, |
| 3089 | + {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, |
| 3090 | + {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, |
| 3091 | + {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, |
| 3092 | + {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, |
| 3093 | + {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, |
| 3094 | + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, |
| 3095 | + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, |
| 3096 | + {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, |
| 3097 | + {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, |
| 3098 | + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, |
| 3099 | + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, |
| 3100 | + {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, |
| 3101 | + {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, |
| 3102 | + {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, |
| 3103 | + {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, |
| 3104 | + {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, |
| 3105 | + {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, |
| 3106 | + {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, |
| 3107 | + {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, |
| 3108 | + {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 3109 | + {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 3110 | + {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 3111 | + {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 3112 | + {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 3113 | + {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 3114 | + {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, |
| 3115 | + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 3116 | + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, |
| 3117 | + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, |
| 3118 | + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, |
| 3119 | + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, |
| 3120 | + {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, |
| 3121 | + {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, |
| 3122 | + {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, |
| 3123 | + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, |
| 3124 | + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, |
| 3125 | + {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, |
| 3126 | + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, |
| 3127 | + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, |
| 3128 | + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, |
| 3129 | + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, |
| 3130 | + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, |
| 3131 | + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, |
| 3132 | + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, |
| 3133 | + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, |
| 3134 | + {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, |
| 3135 | + {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, |
| 3136 | + {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, |
| 3137 | + {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, |
| 3138 | + {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, |
| 3139 | + {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, |
| 3140 | + {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 3141 | + {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 3142 | + {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 3143 | + {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 3144 | + {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 3145 | + {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 3146 | + {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
| 3147 | + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 3148 | + {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, |
| 3149 | + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 3150 | + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 3151 | + {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, |
| 3152 | + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 3153 | + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 3154 | + {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, |
| 3155 | + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 3156 | +}; |
| 3157 | + |
| 3158 | +static const u32 ar9300_2p2_mac_core[][2] = { |
| 3159 | + /* Addr allmodes */ |
| 3160 | + {0x00000008, 0x00000000}, |
| 3161 | + {0x00000030, 0x00020085}, |
| 3162 | + {0x00000034, 0x00000005}, |
| 3163 | + {0x00000040, 0x00000000}, |
| 3164 | + {0x00000044, 0x00000000}, |
| 3165 | + {0x00000048, 0x00000008}, |
| 3166 | + {0x0000004c, 0x00000010}, |
| 3167 | + {0x00000050, 0x00000000}, |
| 3168 | + {0x00001040, 0x002ffc0f}, |
| 3169 | + {0x00001044, 0x002ffc0f}, |
| 3170 | + {0x00001048, 0x002ffc0f}, |
| 3171 | + {0x0000104c, 0x002ffc0f}, |
| 3172 | + {0x00001050, 0x002ffc0f}, |
| 3173 | + {0x00001054, 0x002ffc0f}, |
| 3174 | + {0x00001058, 0x002ffc0f}, |
| 3175 | + {0x0000105c, 0x002ffc0f}, |
| 3176 | + {0x00001060, 0x002ffc0f}, |
| 3177 | + {0x00001064, 0x002ffc0f}, |
| 3178 | + {0x000010f0, 0x00000100}, |
| 3179 | + {0x00001270, 0x00000000}, |
| 3180 | + {0x000012b0, 0x00000000}, |
| 3181 | + {0x000012f0, 0x00000000}, |
| 3182 | + {0x0000143c, 0x00000000}, |
| 3183 | + {0x0000147c, 0x00000000}, |
| 3184 | + {0x00008000, 0x00000000}, |
| 3185 | + {0x00008004, 0x00000000}, |
| 3186 | + {0x00008008, 0x00000000}, |
| 3187 | + {0x0000800c, 0x00000000}, |
| 3188 | + {0x00008018, 0x00000000}, |
| 3189 | + {0x00008020, 0x00000000}, |
| 3190 | + {0x00008038, 0x00000000}, |
| 3191 | + {0x0000803c, 0x00000000}, |
| 3192 | + {0x00008040, 0x00000000}, |
| 3193 | + {0x00008044, 0x00000000}, |
| 3194 | + {0x00008048, 0x00000000}, |
| 3195 | + {0x0000804c, 0xffffffff}, |
| 3196 | + {0x00008054, 0x00000000}, |
| 3197 | + {0x00008058, 0x00000000}, |
| 3198 | + {0x0000805c, 0x000fc78f}, |
| 3199 | + {0x00008060, 0x0000000f}, |
| 3200 | + {0x00008064, 0x00000000}, |
| 3201 | + {0x00008070, 0x00000310}, |
| 3202 | + {0x00008074, 0x00000020}, |
| 3203 | + {0x00008078, 0x00000000}, |
| 3204 | + {0x0000809c, 0x0000000f}, |
| 3205 | + {0x000080a0, 0x00000000}, |
| 3206 | + {0x000080a4, 0x02ff0000}, |
| 3207 | + {0x000080a8, 0x0e070605}, |
| 3208 | + {0x000080ac, 0x0000000d}, |
| 3209 | + {0x000080b0, 0x00000000}, |
| 3210 | + {0x000080b4, 0x00000000}, |
| 3211 | + {0x000080b8, 0x00000000}, |
| 3212 | + {0x000080bc, 0x00000000}, |
| 3213 | + {0x000080c0, 0x2a800000}, |
| 3214 | + {0x000080c4, 0x06900168}, |
| 3215 | + {0x000080c8, 0x13881c20}, |
| 3216 | + {0x000080cc, 0x01f40000}, |
| 3217 | + {0x000080d0, 0x00252500}, |
| 3218 | + {0x000080d4, 0x00a00000}, |
| 3219 | + {0x000080d8, 0x00400000}, |
| 3220 | + {0x000080dc, 0x00000000}, |
| 3221 | + {0x000080e0, 0xffffffff}, |
| 3222 | + {0x000080e4, 0x0000ffff}, |
| 3223 | + {0x000080e8, 0x3f3f3f3f}, |
| 3224 | + {0x000080ec, 0x00000000}, |
| 3225 | + {0x000080f0, 0x00000000}, |
| 3226 | + {0x000080f4, 0x00000000}, |
| 3227 | + {0x000080fc, 0x00020000}, |
| 3228 | + {0x00008100, 0x00000000}, |
| 3229 | + {0x00008108, 0x00000052}, |
| 3230 | + {0x0000810c, 0x00000000}, |
| 3231 | + {0x00008110, 0x00000000}, |
| 3232 | + {0x00008114, 0x000007ff}, |
| 3233 | + {0x00008118, 0x000000aa}, |
| 3234 | + {0x0000811c, 0x00003210}, |
| 3235 | + {0x00008124, 0x00000000}, |
| 3236 | + {0x00008128, 0x00000000}, |
| 3237 | + {0x0000812c, 0x00000000}, |
| 3238 | + {0x00008130, 0x00000000}, |
| 3239 | + {0x00008134, 0x00000000}, |
| 3240 | + {0x00008138, 0x00000000}, |
| 3241 | + {0x0000813c, 0x0000ffff}, |
| 3242 | + {0x00008144, 0xffffffff}, |
| 3243 | + {0x00008168, 0x00000000}, |
| 3244 | + {0x0000816c, 0x00000000}, |
| 3245 | + {0x00008170, 0x18486200}, |
| 3246 | + {0x00008174, 0x33332210}, |
| 3247 | + {0x00008178, 0x00000000}, |
| 3248 | + {0x0000817c, 0x00020000}, |
| 3249 | + {0x000081c0, 0x00000000}, |
| 3250 | + {0x000081c4, 0x33332210}, |
| 3251 | + {0x000081c8, 0x00000000}, |
| 3252 | + {0x000081cc, 0x00000000}, |
| 3253 | + {0x000081d4, 0x00000000}, |
| 3254 | + {0x000081ec, 0x00000000}, |
| 3255 | + {0x000081f0, 0x00000000}, |
| 3256 | + {0x000081f4, 0x00000000}, |
| 3257 | + {0x000081f8, 0x00000000}, |
| 3258 | + {0x000081fc, 0x00000000}, |
| 3259 | + {0x00008240, 0x00100000}, |
| 3260 | + {0x00008244, 0x0010f424}, |
| 3261 | + {0x00008248, 0x00000800}, |
| 3262 | + {0x0000824c, 0x0001e848}, |
| 3263 | + {0x00008250, 0x00000000}, |
| 3264 | + {0x00008254, 0x00000000}, |
| 3265 | + {0x00008258, 0x00000000}, |
| 3266 | + {0x0000825c, 0x40000000}, |
| 3267 | + {0x00008260, 0x00080922}, |
| 3268 | + {0x00008264, 0x9bc00010}, |
| 3269 | + {0x00008268, 0xffffffff}, |
| 3270 | + {0x0000826c, 0x0000ffff}, |
| 3271 | + {0x00008270, 0x00000000}, |
| 3272 | + {0x00008274, 0x40000000}, |
| 3273 | + {0x00008278, 0x003e4180}, |
| 3274 | + {0x0000827c, 0x00000004}, |
| 3275 | + {0x00008284, 0x0000002c}, |
| 3276 | + {0x00008288, 0x0000002c}, |
| 3277 | + {0x0000828c, 0x000000ff}, |
| 3278 | + {0x00008294, 0x00000000}, |
| 3279 | + {0x00008298, 0x00000000}, |
| 3280 | + {0x0000829c, 0x00000000}, |
| 3281 | + {0x00008300, 0x00000140}, |
| 3282 | + {0x00008314, 0x00000000}, |
| 3283 | + {0x0000831c, 0x0000010d}, |
| 3284 | + {0x00008328, 0x00000000}, |
| 3285 | + {0x0000832c, 0x00000007}, |
| 3286 | + {0x00008330, 0x00000302}, |
| 3287 | + {0x00008334, 0x00000700}, |
| 3288 | + {0x00008338, 0x00ff0000}, |
| 3289 | + {0x0000833c, 0x02400000}, |
| 3290 | + {0x00008340, 0x000107ff}, |
| 3291 | + {0x00008344, 0xaa48105b}, |
| 3292 | + {0x00008348, 0x008f0000}, |
| 3293 | + {0x0000835c, 0x00000000}, |
| 3294 | + {0x00008360, 0xffffffff}, |
| 3295 | + {0x00008364, 0xffffffff}, |
| 3296 | + {0x00008368, 0x00000000}, |
| 3297 | + {0x00008370, 0x00000000}, |
| 3298 | + {0x00008374, 0x000000ff}, |
| 3299 | + {0x00008378, 0x00000000}, |
| 3300 | + {0x0000837c, 0x00000000}, |
| 3301 | + {0x00008380, 0xffffffff}, |
| 3302 | + {0x00008384, 0xffffffff}, |
| 3303 | + {0x00008390, 0xffffffff}, |
| 3304 | + {0x00008394, 0xffffffff}, |
| 3305 | + {0x00008398, 0x00000000}, |
| 3306 | + {0x0000839c, 0x00000000}, |
| 3307 | + {0x000083a0, 0x00000000}, |
| 3308 | + {0x000083a4, 0x0000fa14}, |
| 3309 | + {0x000083a8, 0x000f0c00}, |
| 3310 | + {0x000083ac, 0x33332210}, |
| 3311 | + {0x000083b0, 0x33332210}, |
| 3312 | + {0x000083b4, 0x33332210}, |
| 3313 | + {0x000083b8, 0x33332210}, |
| 3314 | + {0x000083bc, 0x00000000}, |
| 3315 | + {0x000083c0, 0x00000000}, |
| 3316 | + {0x000083c4, 0x00000000}, |
| 3317 | + {0x000083c8, 0x00000000}, |
| 3318 | + {0x000083cc, 0x00000200}, |
| 3319 | + {0x000083d0, 0x000301ff}, |
| 3320 | +}; |
| 3321 | + |
| 3322 | +static const u32 ar9300Common_wo_xlna_rx_gain_table_2p2[][2] = { |
| 3323 | + /* Addr allmodes */ |
| 3324 | + {0x0000a000, 0x00010000}, |
| 3325 | + {0x0000a004, 0x00030002}, |
| 3326 | + {0x0000a008, 0x00050004}, |
| 3327 | + {0x0000a00c, 0x00810080}, |
| 3328 | + {0x0000a010, 0x00830082}, |
| 3329 | + {0x0000a014, 0x01810180}, |
| 3330 | + {0x0000a018, 0x01830182}, |
| 3331 | + {0x0000a01c, 0x01850184}, |
| 3332 | + {0x0000a020, 0x01890188}, |
| 3333 | + {0x0000a024, 0x018b018a}, |
| 3334 | + {0x0000a028, 0x018d018c}, |
| 3335 | + {0x0000a02c, 0x03820190}, |
| 3336 | + {0x0000a030, 0x03840383}, |
| 3337 | + {0x0000a034, 0x03880385}, |
| 3338 | + {0x0000a038, 0x038a0389}, |
| 3339 | + {0x0000a03c, 0x038c038b}, |
| 3340 | + {0x0000a040, 0x0390038d}, |
| 3341 | + {0x0000a044, 0x03920391}, |
| 3342 | + {0x0000a048, 0x03940393}, |
| 3343 | + {0x0000a04c, 0x03960395}, |
| 3344 | + {0x0000a050, 0x00000000}, |
| 3345 | + {0x0000a054, 0x00000000}, |
| 3346 | + {0x0000a058, 0x00000000}, |
| 3347 | + {0x0000a05c, 0x00000000}, |
| 3348 | + {0x0000a060, 0x00000000}, |
| 3349 | + {0x0000a064, 0x00000000}, |
| 3350 | + {0x0000a068, 0x00000000}, |
| 3351 | + {0x0000a06c, 0x00000000}, |
| 3352 | + {0x0000a070, 0x00000000}, |
| 3353 | + {0x0000a074, 0x00000000}, |
| 3354 | + {0x0000a078, 0x00000000}, |
| 3355 | + {0x0000a07c, 0x00000000}, |
| 3356 | + {0x0000a080, 0x29292929}, |
| 3357 | + {0x0000a084, 0x29292929}, |
| 3358 | + {0x0000a088, 0x29292929}, |
| 3359 | + {0x0000a08c, 0x29292929}, |
| 3360 | + {0x0000a090, 0x22292929}, |
| 3361 | + {0x0000a094, 0x1d1d2222}, |
| 3362 | + {0x0000a098, 0x0c111117}, |
| 3363 | + {0x0000a09c, 0x00030303}, |
| 3364 | + {0x0000a0a0, 0x00000000}, |
| 3365 | + {0x0000a0a4, 0x00000000}, |
| 3366 | + {0x0000a0a8, 0x00000000}, |
| 3367 | + {0x0000a0ac, 0x00000000}, |
| 3368 | + {0x0000a0b0, 0x00000000}, |
| 3369 | + {0x0000a0b4, 0x00000000}, |
| 3370 | + {0x0000a0b8, 0x00000000}, |
| 3371 | + {0x0000a0bc, 0x00000000}, |
| 3372 | + {0x0000a0c0, 0x001f0000}, |
| 3373 | + {0x0000a0c4, 0x01000101}, |
| 3374 | + {0x0000a0c8, 0x011e011f}, |
| 3375 | + {0x0000a0cc, 0x011c011d}, |
| 3376 | + {0x0000a0d0, 0x02030204}, |
| 3377 | + {0x0000a0d4, 0x02010202}, |
| 3378 | + {0x0000a0d8, 0x021f0200}, |
| 3379 | + {0x0000a0dc, 0x0302021e}, |
| 3380 | + {0x0000a0e0, 0x03000301}, |
| 3381 | + {0x0000a0e4, 0x031e031f}, |
| 3382 | + {0x0000a0e8, 0x0402031d}, |
| 3383 | + {0x0000a0ec, 0x04000401}, |
| 3384 | + {0x0000a0f0, 0x041e041f}, |
| 3385 | + {0x0000a0f4, 0x0502041d}, |
| 3386 | + {0x0000a0f8, 0x05000501}, |
| 3387 | + {0x0000a0fc, 0x051e051f}, |
| 3388 | + {0x0000a100, 0x06010602}, |
| 3389 | + {0x0000a104, 0x061f0600}, |
| 3390 | + {0x0000a108, 0x061d061e}, |
| 3391 | + {0x0000a10c, 0x07020703}, |
| 3392 | + {0x0000a110, 0x07000701}, |
| 3393 | + {0x0000a114, 0x00000000}, |
| 3394 | + {0x0000a118, 0x00000000}, |
| 3395 | + {0x0000a11c, 0x00000000}, |
| 3396 | + {0x0000a120, 0x00000000}, |
| 3397 | + {0x0000a124, 0x00000000}, |
| 3398 | + {0x0000a128, 0x00000000}, |
| 3399 | + {0x0000a12c, 0x00000000}, |
| 3400 | + {0x0000a130, 0x00000000}, |
| 3401 | + {0x0000a134, 0x00000000}, |
| 3402 | + {0x0000a138, 0x00000000}, |
| 3403 | + {0x0000a13c, 0x00000000}, |
| 3404 | + {0x0000a140, 0x001f0000}, |
| 3405 | + {0x0000a144, 0x01000101}, |
| 3406 | + {0x0000a148, 0x011e011f}, |
| 3407 | + {0x0000a14c, 0x011c011d}, |
| 3408 | + {0x0000a150, 0x02030204}, |
| 3409 | + {0x0000a154, 0x02010202}, |
| 3410 | + {0x0000a158, 0x021f0200}, |
| 3411 | + {0x0000a15c, 0x0302021e}, |
| 3412 | + {0x0000a160, 0x03000301}, |
| 3413 | + {0x0000a164, 0x031e031f}, |
| 3414 | + {0x0000a168, 0x0402031d}, |
| 3415 | + {0x0000a16c, 0x04000401}, |
| 3416 | + {0x0000a170, 0x041e041f}, |
| 3417 | + {0x0000a174, 0x0502041d}, |
| 3418 | + {0x0000a178, 0x05000501}, |
| 3419 | + {0x0000a17c, 0x051e051f}, |
| 3420 | + {0x0000a180, 0x06010602}, |
| 3421 | + {0x0000a184, 0x061f0600}, |
| 3422 | + {0x0000a188, 0x061d061e}, |
| 3423 | + {0x0000a18c, 0x07020703}, |
| 3424 | + {0x0000a190, 0x07000701}, |
| 3425 | + {0x0000a194, 0x00000000}, |
| 3426 | + {0x0000a198, 0x00000000}, |
| 3427 | + {0x0000a19c, 0x00000000}, |
| 3428 | + {0x0000a1a0, 0x00000000}, |
| 3429 | + {0x0000a1a4, 0x00000000}, |
| 3430 | + {0x0000a1a8, 0x00000000}, |
| 3431 | + {0x0000a1ac, 0x00000000}, |
| 3432 | + {0x0000a1b0, 0x00000000}, |
| 3433 | + {0x0000a1b4, 0x00000000}, |
| 3434 | + {0x0000a1b8, 0x00000000}, |
| 3435 | + {0x0000a1bc, 0x00000000}, |
| 3436 | + {0x0000a1c0, 0x00000000}, |
| 3437 | + {0x0000a1c4, 0x00000000}, |
| 3438 | + {0x0000a1c8, 0x00000000}, |
| 3439 | + {0x0000a1cc, 0x00000000}, |
| 3440 | + {0x0000a1d0, 0x00000000}, |
| 3441 | + {0x0000a1d4, 0x00000000}, |
| 3442 | + {0x0000a1d8, 0x00000000}, |
| 3443 | + {0x0000a1dc, 0x00000000}, |
| 3444 | + {0x0000a1e0, 0x00000000}, |
| 3445 | + {0x0000a1e4, 0x00000000}, |
| 3446 | + {0x0000a1e8, 0x00000000}, |
| 3447 | + {0x0000a1ec, 0x00000000}, |
| 3448 | + {0x0000a1f0, 0x00000396}, |
| 3449 | + {0x0000a1f4, 0x00000396}, |
| 3450 | + {0x0000a1f8, 0x00000396}, |
| 3451 | + {0x0000a1fc, 0x00000196}, |
| 3452 | + {0x0000b000, 0x00010000}, |
| 3453 | + {0x0000b004, 0x00030002}, |
| 3454 | + {0x0000b008, 0x00050004}, |
| 3455 | + {0x0000b00c, 0x00810080}, |
| 3456 | + {0x0000b010, 0x00830082}, |
| 3457 | + {0x0000b014, 0x01810180}, |
| 3458 | + {0x0000b018, 0x01830182}, |
| 3459 | + {0x0000b01c, 0x01850184}, |
| 3460 | + {0x0000b020, 0x02810280}, |
| 3461 | + {0x0000b024, 0x02830282}, |
| 3462 | + {0x0000b028, 0x02850284}, |
| 3463 | + {0x0000b02c, 0x02890288}, |
| 3464 | + {0x0000b030, 0x028b028a}, |
| 3465 | + {0x0000b034, 0x0388028c}, |
| 3466 | + {0x0000b038, 0x038a0389}, |
| 3467 | + {0x0000b03c, 0x038c038b}, |
| 3468 | + {0x0000b040, 0x0390038d}, |
| 3469 | + {0x0000b044, 0x03920391}, |
| 3470 | + {0x0000b048, 0x03940393}, |
| 3471 | + {0x0000b04c, 0x03960395}, |
| 3472 | + {0x0000b050, 0x00000000}, |
| 3473 | + {0x0000b054, 0x00000000}, |
| 3474 | + {0x0000b058, 0x00000000}, |
| 3475 | + {0x0000b05c, 0x00000000}, |
| 3476 | + {0x0000b060, 0x00000000}, |
| 3477 | + {0x0000b064, 0x00000000}, |
| 3478 | + {0x0000b068, 0x00000000}, |
| 3479 | + {0x0000b06c, 0x00000000}, |
| 3480 | + {0x0000b070, 0x00000000}, |
| 3481 | + {0x0000b074, 0x00000000}, |
| 3482 | + {0x0000b078, 0x00000000}, |
| 3483 | + {0x0000b07c, 0x00000000}, |
| 3484 | + {0x0000b080, 0x32323232}, |
| 3485 | + {0x0000b084, 0x2f2f3232}, |
| 3486 | + {0x0000b088, 0x23282a2d}, |
| 3487 | + {0x0000b08c, 0x1c1e2123}, |
| 3488 | + {0x0000b090, 0x14171919}, |
| 3489 | + {0x0000b094, 0x0e0e1214}, |
| 3490 | + {0x0000b098, 0x03050707}, |
| 3491 | + {0x0000b09c, 0x00030303}, |
| 3492 | + {0x0000b0a0, 0x00000000}, |
| 3493 | + {0x0000b0a4, 0x00000000}, |
| 3494 | + {0x0000b0a8, 0x00000000}, |
| 3495 | + {0x0000b0ac, 0x00000000}, |
| 3496 | + {0x0000b0b0, 0x00000000}, |
| 3497 | + {0x0000b0b4, 0x00000000}, |
| 3498 | + {0x0000b0b8, 0x00000000}, |
| 3499 | + {0x0000b0bc, 0x00000000}, |
| 3500 | + {0x0000b0c0, 0x003f0020}, |
| 3501 | + {0x0000b0c4, 0x00400041}, |
| 3502 | + {0x0000b0c8, 0x0140005f}, |
| 3503 | + {0x0000b0cc, 0x0160015f}, |
| 3504 | + {0x0000b0d0, 0x017e017f}, |
| 3505 | + {0x0000b0d4, 0x02410242}, |
| 3506 | + {0x0000b0d8, 0x025f0240}, |
| 3507 | + {0x0000b0dc, 0x027f0260}, |
| 3508 | + {0x0000b0e0, 0x0341027e}, |
| 3509 | + {0x0000b0e4, 0x035f0340}, |
| 3510 | + {0x0000b0e8, 0x037f0360}, |
| 3511 | + {0x0000b0ec, 0x04400441}, |
| 3512 | + {0x0000b0f0, 0x0460045f}, |
| 3513 | + {0x0000b0f4, 0x0541047f}, |
| 3514 | + {0x0000b0f8, 0x055f0540}, |
| 3515 | + {0x0000b0fc, 0x057f0560}, |
| 3516 | + {0x0000b100, 0x06400641}, |
| 3517 | + {0x0000b104, 0x0660065f}, |
| 3518 | + {0x0000b108, 0x067e067f}, |
| 3519 | + {0x0000b10c, 0x07410742}, |
| 3520 | + {0x0000b110, 0x075f0740}, |
| 3521 | + {0x0000b114, 0x077f0760}, |
| 3522 | + {0x0000b118, 0x07800781}, |
| 3523 | + {0x0000b11c, 0x07a0079f}, |
| 3524 | + {0x0000b120, 0x07c107bf}, |
| 3525 | + {0x0000b124, 0x000007c0}, |
| 3526 | + {0x0000b128, 0x00000000}, |
| 3527 | + {0x0000b12c, 0x00000000}, |
| 3528 | + {0x0000b130, 0x00000000}, |
| 3529 | + {0x0000b134, 0x00000000}, |
| 3530 | + {0x0000b138, 0x00000000}, |
| 3531 | + {0x0000b13c, 0x00000000}, |
| 3532 | + {0x0000b140, 0x003f0020}, |
| 3533 | + {0x0000b144, 0x00400041}, |
| 3534 | + {0x0000b148, 0x0140005f}, |
| 3535 | + {0x0000b14c, 0x0160015f}, |
| 3536 | + {0x0000b150, 0x017e017f}, |
| 3537 | + {0x0000b154, 0x02410242}, |
| 3538 | + {0x0000b158, 0x025f0240}, |
| 3539 | + {0x0000b15c, 0x027f0260}, |
| 3540 | + {0x0000b160, 0x0341027e}, |
| 3541 | + {0x0000b164, 0x035f0340}, |
| 3542 | + {0x0000b168, 0x037f0360}, |
| 3543 | + {0x0000b16c, 0x04400441}, |
| 3544 | + {0x0000b170, 0x0460045f}, |
| 3545 | + {0x0000b174, 0x0541047f}, |
| 3546 | + {0x0000b178, 0x055f0540}, |
| 3547 | + {0x0000b17c, 0x057f0560}, |
| 3548 | + {0x0000b180, 0x06400641}, |
| 3549 | + {0x0000b184, 0x0660065f}, |
| 3550 | + {0x0000b188, 0x067e067f}, |
| 3551 | + {0x0000b18c, 0x07410742}, |
| 3552 | + {0x0000b190, 0x075f0740}, |
| 3553 | + {0x0000b194, 0x077f0760}, |
| 3554 | + {0x0000b198, 0x07800781}, |
| 3555 | + {0x0000b19c, 0x07a0079f}, |
| 3556 | + {0x0000b1a0, 0x07c107bf}, |
| 3557 | + {0x0000b1a4, 0x000007c0}, |
| 3558 | + {0x0000b1a8, 0x00000000}, |
| 3559 | + {0x0000b1ac, 0x00000000}, |
| 3560 | + {0x0000b1b0, 0x00000000}, |
| 3561 | + {0x0000b1b4, 0x00000000}, |
| 3562 | + {0x0000b1b8, 0x00000000}, |
| 3563 | + {0x0000b1bc, 0x00000000}, |
| 3564 | + {0x0000b1c0, 0x00000000}, |
| 3565 | + {0x0000b1c4, 0x00000000}, |
| 3566 | + {0x0000b1c8, 0x00000000}, |
| 3567 | + {0x0000b1cc, 0x00000000}, |
| 3568 | + {0x0000b1d0, 0x00000000}, |
| 3569 | + {0x0000b1d4, 0x00000000}, |
| 3570 | + {0x0000b1d8, 0x00000000}, |
| 3571 | + {0x0000b1dc, 0x00000000}, |
| 3572 | + {0x0000b1e0, 0x00000000}, |
| 3573 | + {0x0000b1e4, 0x00000000}, |
| 3574 | + {0x0000b1e8, 0x00000000}, |
| 3575 | + {0x0000b1ec, 0x00000000}, |
| 3576 | + {0x0000b1f0, 0x00000396}, |
| 3577 | + {0x0000b1f4, 0x00000396}, |
| 3578 | + {0x0000b1f8, 0x00000396}, |
| 3579 | + {0x0000b1fc, 0x00000196}, |
| 3580 | +}; |
| 3581 | + |
| 3582 | +static const u32 ar9300_2p2_soc_preamble[][2] = { |
| 3583 | + /* Addr allmodes */ |
| 3584 | + {0x000040a4, 0x00a0c1c9}, |
| 3585 | + {0x00007008, 0x00000000}, |
| 3586 | + {0x00007020, 0x00000000}, |
| 3587 | + {0x00007034, 0x00000002}, |
| 3588 | + {0x00007038, 0x000004c2}, |
| 3589 | + {0x00007048, 0x00000008}, |
| 3590 | +}; |
| 3591 | + |
| 3592 | +static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2[][2] = { |
| 3593 | + /* Addr allmodes */ |
| 3594 | + {0x00004040, 0x08212e5e}, |
| 3595 | + {0x00004040, 0x0008003b}, |
| 3596 | + {0x00004044, 0x00000000}, |
| 3597 | +}; |
| 3598 | + |
| 3599 | +static const u32 ar9300PciePhy_clkreq_enable_L1_2p2[][2] = { |
| 3600 | + /* Addr allmodes */ |
| 3601 | + {0x00004040, 0x08253e5e}, |
| 3602 | + {0x00004040, 0x0008003b}, |
| 3603 | + {0x00004044, 0x00000000}, |
| 3604 | +}; |
| 3605 | + |
| 3606 | +static const u32 ar9300PciePhy_clkreq_disable_L1_2p2[][2] = { |
| 3607 | + /* Addr allmodes */ |
| 3608 | + {0x00004040, 0x08213e5e}, |
| 3609 | + {0x00004040, 0x0008003b}, |
| 3610 | + {0x00004044, 0x00000000}, |
| 3611 | +}; |
| 3612 | + |
| 3613 | +#endif /* INITVALS_9003_2P2_H */ |
| 3614 | --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c |
| 3615 | @@ -739,6 +739,12 @@ static bool ar9003_hw_init_cal(struct at |
| 3616 | */ |
| 3617 | ar9003_hw_set_chain_masks(ah, 0x7, 0x7); |
| 3618 | |
| 3619 | + /* Do Tx IQ Calibration */ |
| 3620 | + ar9003_hw_tx_iq_cal(ah); |
| 3621 | + REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); |
| 3622 | + udelay(5); |
| 3623 | + REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); |
| 3624 | + |
| 3625 | /* Calibrate the AGC */ |
| 3626 | REG_WRITE(ah, AR_PHY_AGC_CONTROL, |
| 3627 | REG_READ(ah, AR_PHY_AGC_CONTROL) | |
| 3628 | @@ -753,10 +759,6 @@ static bool ar9003_hw_init_cal(struct at |
| 3629 | return false; |
| 3630 | } |
| 3631 | |
| 3632 | - /* Do Tx IQ Calibration */ |
| 3633 | - if (ah->config.tx_iq_calibration) |
| 3634 | - ar9003_hw_tx_iq_cal(ah); |
| 3635 | - |
| 3636 | /* Revert chainmasks to their original values before NF cal */ |
| 3637 | ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); |
| 3638 | |
| 3639 | --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c |
| 3640 | @@ -16,7 +16,8 @@ |
| 3641 | |
| 3642 | #include "hw.h" |
| 3643 | #include "ar9003_mac.h" |
| 3644 | -#include "ar9003_initvals.h" |
| 3645 | +#include "ar9003_2p0_initvals.h" |
| 3646 | +#include "ar9003_2p2_initvals.h" |
| 3647 | |
| 3648 | /* General hardware code for the AR9003 hadware family */ |
| 3649 | |
| 3650 | @@ -31,12 +32,8 @@ static bool ar9003_hw_macversion_support |
| 3651 | return false; |
| 3652 | } |
| 3653 | |
| 3654 | -/* AR9003 2.0 - new INI format (pre, core, post arrays per subsystem) */ |
| 3655 | -/* |
| 3656 | - * XXX: move TX/RX gain INI to its own init_mode_gain_regs after |
| 3657 | - * ensuring it does not affect hardware bring up |
| 3658 | - */ |
| 3659 | -static void ar9003_hw_init_mode_regs(struct ath_hw *ah) |
| 3660 | +/* AR9003 2.0 */ |
| 3661 | +static void ar9003_2p0_hw_init_mode_regs(struct ath_hw *ah) |
| 3662 | { |
| 3663 | /* mac */ |
| 3664 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); |
| 3665 | @@ -106,27 +103,128 @@ static void ar9003_hw_init_mode_regs(str |
| 3666 | 3); |
| 3667 | } |
| 3668 | |
| 3669 | +/* AR9003 2.2 */ |
| 3670 | +static void ar9003_2p2_hw_init_mode_regs(struct ath_hw *ah) |
| 3671 | +{ |
| 3672 | + /* mac */ |
| 3673 | + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); |
| 3674 | + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
| 3675 | + ar9300_2p2_mac_core, |
| 3676 | + ARRAY_SIZE(ar9300_2p2_mac_core), 2); |
| 3677 | + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
| 3678 | + ar9300_2p2_mac_postamble, |
| 3679 | + ARRAY_SIZE(ar9300_2p2_mac_postamble), 5); |
| 3680 | + |
| 3681 | + /* bb */ |
| 3682 | + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); |
| 3683 | + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
| 3684 | + ar9300_2p2_baseband_core, |
| 3685 | + ARRAY_SIZE(ar9300_2p2_baseband_core), 2); |
| 3686 | + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
| 3687 | + ar9300_2p2_baseband_postamble, |
| 3688 | + ARRAY_SIZE(ar9300_2p2_baseband_postamble), 5); |
| 3689 | + |
| 3690 | + /* radio */ |
| 3691 | + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); |
| 3692 | + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
| 3693 | + ar9300_2p2_radio_core, |
| 3694 | + ARRAY_SIZE(ar9300_2p2_radio_core), 2); |
| 3695 | + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], |
| 3696 | + ar9300_2p2_radio_postamble, |
| 3697 | + ARRAY_SIZE(ar9300_2p2_radio_postamble), 5); |
| 3698 | + |
| 3699 | + /* soc */ |
| 3700 | + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
| 3701 | + ar9300_2p2_soc_preamble, |
| 3702 | + ARRAY_SIZE(ar9300_2p2_soc_preamble), 2); |
| 3703 | + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); |
| 3704 | + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
| 3705 | + ar9300_2p2_soc_postamble, |
| 3706 | + ARRAY_SIZE(ar9300_2p2_soc_postamble), 5); |
| 3707 | + |
| 3708 | + /* rx/tx gain */ |
| 3709 | + INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 3710 | + ar9300Common_rx_gain_table_2p2, |
| 3711 | + ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), 2); |
| 3712 | + INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3713 | + ar9300Modes_lowest_ob_db_tx_gain_table_2p2, |
| 3714 | + ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2), |
| 3715 | + 5); |
| 3716 | + |
| 3717 | + /* Load PCIE SERDES settings from INI */ |
| 3718 | + |
| 3719 | + /* Awake Setting */ |
| 3720 | + |
| 3721 | + INIT_INI_ARRAY(&ah->iniPcieSerdes, |
| 3722 | + ar9300PciePhy_pll_on_clkreq_disable_L1_2p2, |
| 3723 | + ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2), |
| 3724 | + 2); |
| 3725 | + |
| 3726 | + /* Sleep Setting */ |
| 3727 | + |
| 3728 | + INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, |
| 3729 | + ar9300PciePhy_clkreq_enable_L1_2p2, |
| 3730 | + ARRAY_SIZE(ar9300PciePhy_clkreq_enable_L1_2p2), |
| 3731 | + 2); |
| 3732 | + |
| 3733 | + /* Fast clock modal settings */ |
| 3734 | + INIT_INI_ARRAY(&ah->iniModesAdditional, |
| 3735 | + ar9300Modes_fast_clock_2p2, |
| 3736 | + ARRAY_SIZE(ar9300Modes_fast_clock_2p2), |
| 3737 | + 3); |
| 3738 | +} |
| 3739 | + |
| 3740 | +/* |
| 3741 | + * The AR9003 family uses a new INI format (pre, core, post |
| 3742 | + * arrays per subsystem). |
| 3743 | + */ |
| 3744 | +static void ar9003_hw_init_mode_regs(struct ath_hw *ah) |
| 3745 | +{ |
| 3746 | + if (AR_SREV_9300_20(ah)) |
| 3747 | + ar9003_2p0_hw_init_mode_regs(ah); |
| 3748 | + else |
| 3749 | + ar9003_2p2_hw_init_mode_regs(ah); |
| 3750 | +} |
| 3751 | + |
| 3752 | static void ar9003_tx_gain_table_apply(struct ath_hw *ah) |
| 3753 | { |
| 3754 | switch (ar9003_hw_get_tx_gain_idx(ah)) { |
| 3755 | case 0: |
| 3756 | default: |
| 3757 | - INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3758 | - ar9300Modes_lowest_ob_db_tx_gain_table_2p0, |
| 3759 | - ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0), |
| 3760 | - 5); |
| 3761 | + if (AR_SREV_9300_20(ah)) |
| 3762 | + INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3763 | + ar9300Modes_lowest_ob_db_tx_gain_table_2p0, |
| 3764 | + ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0), |
| 3765 | + 5); |
| 3766 | + else |
| 3767 | + INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3768 | + ar9300Modes_lowest_ob_db_tx_gain_table_2p2, |
| 3769 | + ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2), |
| 3770 | + 5); |
| 3771 | break; |
| 3772 | case 1: |
| 3773 | - INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3774 | - ar9300Modes_high_ob_db_tx_gain_table_2p0, |
| 3775 | - ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p0), |
| 3776 | - 5); |
| 3777 | + if (AR_SREV_9300_20(ah)) |
| 3778 | + INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3779 | + ar9300Modes_high_ob_db_tx_gain_table_2p0, |
| 3780 | + ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p0), |
| 3781 | + 5); |
| 3782 | + else |
| 3783 | + INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3784 | + ar9300Modes_high_ob_db_tx_gain_table_2p2, |
| 3785 | + ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2), |
| 3786 | + 5); |
| 3787 | break; |
| 3788 | case 2: |
| 3789 | - INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3790 | - ar9300Modes_low_ob_db_tx_gain_table_2p0, |
| 3791 | - ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p0), |
| 3792 | - 5); |
| 3793 | + if (AR_SREV_9300_20(ah)) |
| 3794 | + INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3795 | + ar9300Modes_low_ob_db_tx_gain_table_2p0, |
| 3796 | + ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p0), |
| 3797 | + 5); |
| 3798 | + else |
| 3799 | + INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 3800 | + ar9300Modes_low_ob_db_tx_gain_table_2p2, |
| 3801 | + ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2), |
| 3802 | + 5); |
| 3803 | break; |
| 3804 | } |
| 3805 | } |
| 3806 | @@ -136,15 +234,28 @@ static void ar9003_rx_gain_table_apply(s |
| 3807 | switch (ar9003_hw_get_rx_gain_idx(ah)) { |
| 3808 | case 0: |
| 3809 | default: |
| 3810 | - INIT_INI_ARRAY(&ah->iniModesRxGain, ar9300Common_rx_gain_table_2p0, |
| 3811 | - ARRAY_SIZE(ar9300Common_rx_gain_table_2p0), |
| 3812 | - 2); |
| 3813 | + if (AR_SREV_9300_20(ah)) |
| 3814 | + INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 3815 | + ar9300Common_rx_gain_table_2p0, |
| 3816 | + ARRAY_SIZE(ar9300Common_rx_gain_table_2p0), |
| 3817 | + 2); |
| 3818 | + else |
| 3819 | + INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 3820 | + ar9300Common_rx_gain_table_2p2, |
| 3821 | + ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), |
| 3822 | + 2); |
| 3823 | break; |
| 3824 | case 1: |
| 3825 | - INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 3826 | - ar9300Common_wo_xlna_rx_gain_table_2p0, |
| 3827 | - ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p0), |
| 3828 | - 2); |
| 3829 | + if (AR_SREV_9300_20(ah)) |
| 3830 | + INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 3831 | + ar9300Common_wo_xlna_rx_gain_table_2p0, |
| 3832 | + ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p0), |
| 3833 | + 2); |
| 3834 | + else |
| 3835 | + INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 3836 | + ar9300Common_wo_xlna_rx_gain_table_2p2, |
| 3837 | + ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2), |
| 3838 | + 2); |
| 3839 | break; |
| 3840 | } |
| 3841 | } |
| 3842 | --- a/drivers/net/wireless/ath/ath9k/ar9003_initvals.h |
| 3843 | @@ -1,1784 +0,0 @@ |
| 3844 | -/* |
| 3845 | - * Copyright (c) 2010 Atheros Communications Inc. |
| 3846 | - * |
| 3847 | - * Permission to use, copy, modify, and/or distribute this software for any |
| 3848 | - * purpose with or without fee is hereby granted, provided that the above |
| 3849 | - * copyright notice and this permission notice appear in all copies. |
| 3850 | - * |
| 3851 | - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 3852 | - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 3853 | - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 3854 | - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 3855 | - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 3856 | - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 3857 | - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 3858 | - */ |
| 3859 | - |
| 3860 | -#ifndef INITVALS_9003_H |
| 3861 | -#define INITVALS_9003_H |
| 3862 | - |
| 3863 | -/* AR9003 2.0 */ |
| 3864 | - |
| 3865 | -static const u32 ar9300_2p0_radio_postamble[][5] = { |
| 3866 | - /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 3867 | - {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31}, |
| 3868 | - {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800}, |
| 3869 | - {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20}, |
| 3870 | - {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 3871 | - {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 3872 | - {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 3873 | - {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 3874 | - {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, |
| 3875 | - {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, |
| 3876 | -}; |
| 3877 | - |
| 3878 | -static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p0[][5] = { |
| 3879 | - /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 3880 | - {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 3881 | - {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 3882 | - {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, |
| 3883 | - {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, |
| 3884 | - {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, |
| 3885 | - {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, |
| 3886 | - {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, |
| 3887 | - {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402}, |
| 3888 | - {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404}, |
| 3889 | - {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, |
| 3890 | - {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, |
| 3891 | - {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, |
| 3892 | - {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, |
| 3893 | - {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, |
| 3894 | - {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, |
| 3895 | - {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, |
| 3896 | - {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, |
| 3897 | - {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, |
| 3898 | - {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, |
| 3899 | - {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, |
| 3900 | - {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83}, |
| 3901 | - {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84}, |
| 3902 | - {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3}, |
| 3903 | - {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5}, |
| 3904 | - {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9}, |
| 3905 | - {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb}, |
| 3906 | - {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 3907 | - {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 3908 | - {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 3909 | - {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 3910 | - {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 3911 | - {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 3912 | - {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 3913 | - {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 3914 | - {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, |
| 3915 | - {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, |
| 3916 | - {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, |
| 3917 | - {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, |
| 3918 | - {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, |
| 3919 | - {0x0000a598, 0x21820220, 0x21820220, 0x16800402, 0x16800402}, |
| 3920 | - {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404}, |
| 3921 | - {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, |
| 3922 | - {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, |
| 3923 | - {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, |
| 3924 | - {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, |
| 3925 | - {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, |
| 3926 | - {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, |
| 3927 | - {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, |
| 3928 | - {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, |
| 3929 | - {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, |
| 3930 | - {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, |
| 3931 | - {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, |
| 3932 | - {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x47801a83, 0x47801a83}, |
| 3933 | - {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4a801c84, 0x4a801c84}, |
| 3934 | - {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4e801ce3, 0x4e801ce3}, |
| 3935 | - {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x52801ce5, 0x52801ce5}, |
| 3936 | - {0x0000a5dc, 0x7086308c, 0x7086308c, 0x56801ce9, 0x56801ce9}, |
| 3937 | - {0x0000a5e0, 0x738a308a, 0x738a308a, 0x5a801ceb, 0x5a801ceb}, |
| 3938 | - {0x0000a5e4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 3939 | - {0x0000a5e8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 3940 | - {0x0000a5ec, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 3941 | - {0x0000a5f0, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 3942 | - {0x0000a5f4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 3943 | - {0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 3944 | - {0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 3945 | - {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 3946 | - {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 3947 | - {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 3948 | - {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 3949 | - {0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 3950 | - {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 3951 | - {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 3952 | - {0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
| 3953 | - {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 3954 | -}; |
| 3955 | - |
| 3956 | -static const u32 ar9300Modes_fast_clock_2p0[][3] = { |
| 3957 | - /* Addr 5G_HT20 5G_HT40 */ |
| 3958 | - {0x00001030, 0x00000268, 0x000004d0}, |
| 3959 | - {0x00001070, 0x0000018c, 0x00000318}, |
| 3960 | - {0x000010b0, 0x00000fd0, 0x00001fa0}, |
| 3961 | - {0x00008014, 0x044c044c, 0x08980898}, |
| 3962 | - {0x0000801c, 0x148ec02b, 0x148ec057}, |
| 3963 | - {0x00008318, 0x000044c0, 0x00008980}, |
| 3964 | - {0x00009e00, 0x03721821, 0x03721821}, |
| 3965 | - {0x0000a230, 0x0000000b, 0x00000016}, |
| 3966 | - {0x0000a254, 0x00000898, 0x00001130}, |
| 3967 | -}; |
| 3968 | - |
| 3969 | -static const u32 ar9300_2p0_radio_core[][2] = { |
| 3970 | - /* Addr allmodes */ |
| 3971 | - {0x00016000, 0x36db6db6}, |
| 3972 | - {0x00016004, 0x6db6db40}, |
| 3973 | - {0x00016008, 0x73f00000}, |
| 3974 | - {0x0001600c, 0x00000000}, |
| 3975 | - {0x00016040, 0x7f80fff8}, |
| 3976 | - {0x0001604c, 0x76d005b5}, |
| 3977 | - {0x00016050, 0x556cf031}, |
| 3978 | - {0x00016054, 0x13449440}, |
| 3979 | - {0x00016058, 0x0c51c92c}, |
| 3980 | - {0x0001605c, 0x3db7fffc}, |
| 3981 | - {0x00016060, 0xfffffffc}, |
| 3982 | - {0x00016064, 0x000f0278}, |
| 3983 | - {0x0001606c, 0x6db60000}, |
| 3984 | - {0x00016080, 0x00000000}, |
| 3985 | - {0x00016084, 0x0e48048c}, |
| 3986 | - {0x00016088, 0x54214514}, |
| 3987 | - {0x0001608c, 0x119f481e}, |
| 3988 | - {0x00016090, 0x24926490}, |
| 3989 | - {0x00016098, 0xd2888888}, |
| 3990 | - {0x000160a0, 0x0a108ffe}, |
| 3991 | - {0x000160a4, 0x812fc370}, |
| 3992 | - {0x000160a8, 0x423c8000}, |
| 3993 | - {0x000160b4, 0x92480080}, |
| 3994 | - {0x000160c0, 0x00adb6d0}, |
| 3995 | - {0x000160c4, 0x6db6db60}, |
| 3996 | - {0x000160c8, 0x6db6db6c}, |
| 3997 | - {0x000160cc, 0x01e6c000}, |
| 3998 | - {0x00016100, 0x3fffbe01}, |
| 3999 | - {0x00016104, 0xfff80000}, |
| 4000 | - {0x00016108, 0x00080010}, |
| 4001 | - {0x00016144, 0x02084080}, |
| 4002 | - {0x00016148, 0x00000000}, |
| 4003 | - {0x00016280, 0x058a0001}, |
| 4004 | - {0x00016284, 0x3d840208}, |
| 4005 | - {0x00016288, 0x05a20408}, |
| 4006 | - {0x0001628c, 0x00038c07}, |
| 4007 | - {0x00016290, 0x40000004}, |
| 4008 | - {0x00016294, 0x458aa14f}, |
| 4009 | - {0x00016380, 0x00000000}, |
| 4010 | - {0x00016384, 0x00000000}, |
| 4011 | - {0x00016388, 0x00800700}, |
| 4012 | - {0x0001638c, 0x00800700}, |
| 4013 | - {0x00016390, 0x00800700}, |
| 4014 | - {0x00016394, 0x00000000}, |
| 4015 | - {0x00016398, 0x00000000}, |
| 4016 | - {0x0001639c, 0x00000000}, |
| 4017 | - {0x000163a0, 0x00000001}, |
| 4018 | - {0x000163a4, 0x00000001}, |
| 4019 | - {0x000163a8, 0x00000000}, |
| 4020 | - {0x000163ac, 0x00000000}, |
| 4021 | - {0x000163b0, 0x00000000}, |
| 4022 | - {0x000163b4, 0x00000000}, |
| 4023 | - {0x000163b8, 0x00000000}, |
| 4024 | - {0x000163bc, 0x00000000}, |
| 4025 | - {0x000163c0, 0x000000a0}, |
| 4026 | - {0x000163c4, 0x000c0000}, |
| 4027 | - {0x000163c8, 0x14021402}, |
| 4028 | - {0x000163cc, 0x00001402}, |
| 4029 | - {0x000163d0, 0x00000000}, |
| 4030 | - {0x000163d4, 0x00000000}, |
| 4031 | - {0x00016400, 0x36db6db6}, |
| 4032 | - {0x00016404, 0x6db6db40}, |
| 4033 | - {0x00016408, 0x73f00000}, |
| 4034 | - {0x0001640c, 0x00000000}, |
| 4035 | - {0x00016440, 0x7f80fff8}, |
| 4036 | - {0x0001644c, 0x76d005b5}, |
| 4037 | - {0x00016450, 0x556cf031}, |
| 4038 | - {0x00016454, 0x13449440}, |
| 4039 | - {0x00016458, 0x0c51c92c}, |
| 4040 | - {0x0001645c, 0x3db7fffc}, |
| 4041 | - {0x00016460, 0xfffffffc}, |
| 4042 | - {0x00016464, 0x000f0278}, |
| 4043 | - {0x0001646c, 0x6db60000}, |
| 4044 | - {0x00016500, 0x3fffbe01}, |
| 4045 | - {0x00016504, 0xfff80000}, |
| 4046 | - {0x00016508, 0x00080010}, |
| 4047 | - {0x00016544, 0x02084080}, |
| 4048 | - {0x00016548, 0x00000000}, |
| 4049 | - {0x00016780, 0x00000000}, |
| 4050 | - {0x00016784, 0x00000000}, |
| 4051 | - {0x00016788, 0x00800700}, |
| 4052 | - {0x0001678c, 0x00800700}, |
| 4053 | - {0x00016790, 0x00800700}, |
| 4054 | - {0x00016794, 0x00000000}, |
| 4055 | - {0x00016798, 0x00000000}, |
| 4056 | - {0x0001679c, 0x00000000}, |
| 4057 | - {0x000167a0, 0x00000001}, |
| 4058 | - {0x000167a4, 0x00000001}, |
| 4059 | - {0x000167a8, 0x00000000}, |
| 4060 | - {0x000167ac, 0x00000000}, |
| 4061 | - {0x000167b0, 0x00000000}, |
| 4062 | - {0x000167b4, 0x00000000}, |
| 4063 | - {0x000167b8, 0x00000000}, |
| 4064 | - {0x000167bc, 0x00000000}, |
| 4065 | - {0x000167c0, 0x000000a0}, |
| 4066 | - {0x000167c4, 0x000c0000}, |
| 4067 | - {0x000167c8, 0x14021402}, |
| 4068 | - {0x000167cc, 0x00001402}, |
| 4069 | - {0x000167d0, 0x00000000}, |
| 4070 | - {0x000167d4, 0x00000000}, |
| 4071 | - {0x00016800, 0x36db6db6}, |
| 4072 | - {0x00016804, 0x6db6db40}, |
| 4073 | - {0x00016808, 0x73f00000}, |
| 4074 | - {0x0001680c, 0x00000000}, |
| 4075 | - {0x00016840, 0x7f80fff8}, |
| 4076 | - {0x0001684c, 0x76d005b5}, |
| 4077 | - {0x00016850, 0x556cf031}, |
| 4078 | - {0x00016854, 0x13449440}, |
| 4079 | - {0x00016858, 0x0c51c92c}, |
| 4080 | - {0x0001685c, 0x3db7fffc}, |
| 4081 | - {0x00016860, 0xfffffffc}, |
| 4082 | - {0x00016864, 0x000f0278}, |
| 4083 | - {0x0001686c, 0x6db60000}, |
| 4084 | - {0x00016900, 0x3fffbe01}, |
| 4085 | - {0x00016904, 0xfff80000}, |
| 4086 | - {0x00016908, 0x00080010}, |
| 4087 | - {0x00016944, 0x02084080}, |
| 4088 | - {0x00016948, 0x00000000}, |
| 4089 | - {0x00016b80, 0x00000000}, |
| 4090 | - {0x00016b84, 0x00000000}, |
| 4091 | - {0x00016b88, 0x00800700}, |
| 4092 | - {0x00016b8c, 0x00800700}, |
| 4093 | - {0x00016b90, 0x00800700}, |
| 4094 | - {0x00016b94, 0x00000000}, |
| 4095 | - {0x00016b98, 0x00000000}, |
| 4096 | - {0x00016b9c, 0x00000000}, |
| 4097 | - {0x00016ba0, 0x00000001}, |
| 4098 | - {0x00016ba4, 0x00000001}, |
| 4099 | - {0x00016ba8, 0x00000000}, |
| 4100 | - {0x00016bac, 0x00000000}, |
| 4101 | - {0x00016bb0, 0x00000000}, |
| 4102 | - {0x00016bb4, 0x00000000}, |
| 4103 | - {0x00016bb8, 0x00000000}, |
| 4104 | - {0x00016bbc, 0x00000000}, |
| 4105 | - {0x00016bc0, 0x000000a0}, |
| 4106 | - {0x00016bc4, 0x000c0000}, |
| 4107 | - {0x00016bc8, 0x14021402}, |
| 4108 | - {0x00016bcc, 0x00001402}, |
| 4109 | - {0x00016bd0, 0x00000000}, |
| 4110 | - {0x00016bd4, 0x00000000}, |
| 4111 | -}; |
| 4112 | - |
| 4113 | -static const u32 ar9300Common_rx_gain_table_merlin_2p0[][2] = { |
| 4114 | - /* Addr allmodes */ |
| 4115 | - {0x0000a000, 0x02000101}, |
| 4116 | - {0x0000a004, 0x02000102}, |
| 4117 | - {0x0000a008, 0x02000103}, |
| 4118 | - {0x0000a00c, 0x02000104}, |
| 4119 | - {0x0000a010, 0x02000200}, |
| 4120 | - {0x0000a014, 0x02000201}, |
| 4121 | - {0x0000a018, 0x02000202}, |
| 4122 | - {0x0000a01c, 0x02000203}, |
| 4123 | - {0x0000a020, 0x02000204}, |
| 4124 | - {0x0000a024, 0x02000205}, |
| 4125 | - {0x0000a028, 0x02000208}, |
| 4126 | - {0x0000a02c, 0x02000302}, |
| 4127 | - {0x0000a030, 0x02000303}, |
| 4128 | - {0x0000a034, 0x02000304}, |
| 4129 | - {0x0000a038, 0x02000400}, |
| 4130 | - {0x0000a03c, 0x02010300}, |
| 4131 | - {0x0000a040, 0x02010301}, |
| 4132 | - {0x0000a044, 0x02010302}, |
| 4133 | - {0x0000a048, 0x02000500}, |
| 4134 | - {0x0000a04c, 0x02010400}, |
| 4135 | - {0x0000a050, 0x02020300}, |
| 4136 | - {0x0000a054, 0x02020301}, |
| 4137 | - {0x0000a058, 0x02020302}, |
| 4138 | - {0x0000a05c, 0x02020303}, |
| 4139 | - {0x0000a060, 0x02020400}, |
| 4140 | - {0x0000a064, 0x02030300}, |
| 4141 | - {0x0000a068, 0x02030301}, |
| 4142 | - {0x0000a06c, 0x02030302}, |
| 4143 | - {0x0000a070, 0x02030303}, |
| 4144 | - {0x0000a074, 0x02030400}, |
| 4145 | - {0x0000a078, 0x02040300}, |
| 4146 | - {0x0000a07c, 0x02040301}, |
| 4147 | - {0x0000a080, 0x02040302}, |
| 4148 | - {0x0000a084, 0x02040303}, |
| 4149 | - {0x0000a088, 0x02030500}, |
| 4150 | - {0x0000a08c, 0x02040400}, |
| 4151 | - {0x0000a090, 0x02050203}, |
| 4152 | - {0x0000a094, 0x02050204}, |
| 4153 | - {0x0000a098, 0x02050205}, |
| 4154 | - {0x0000a09c, 0x02040500}, |
| 4155 | - {0x0000a0a0, 0x02050301}, |
| 4156 | - {0x0000a0a4, 0x02050302}, |
| 4157 | - {0x0000a0a8, 0x02050303}, |
| 4158 | - {0x0000a0ac, 0x02050400}, |
| 4159 | - {0x0000a0b0, 0x02050401}, |
| 4160 | - {0x0000a0b4, 0x02050402}, |
| 4161 | - {0x0000a0b8, 0x02050403}, |
| 4162 | - {0x0000a0bc, 0x02050500}, |
| 4163 | - {0x0000a0c0, 0x02050501}, |
| 4164 | - {0x0000a0c4, 0x02050502}, |
| 4165 | - {0x0000a0c8, 0x02050503}, |
| 4166 | - {0x0000a0cc, 0x02050504}, |
| 4167 | - {0x0000a0d0, 0x02050600}, |
| 4168 | - {0x0000a0d4, 0x02050601}, |
| 4169 | - {0x0000a0d8, 0x02050602}, |
| 4170 | - {0x0000a0dc, 0x02050603}, |
| 4171 | - {0x0000a0e0, 0x02050604}, |
| 4172 | - {0x0000a0e4, 0x02050700}, |
| 4173 | - {0x0000a0e8, 0x02050701}, |
| 4174 | - {0x0000a0ec, 0x02050702}, |
| 4175 | - {0x0000a0f0, 0x02050703}, |
| 4176 | - {0x0000a0f4, 0x02050704}, |
| 4177 | - {0x0000a0f8, 0x02050705}, |
| 4178 | - {0x0000a0fc, 0x02050708}, |
| 4179 | - {0x0000a100, 0x02050709}, |
| 4180 | - {0x0000a104, 0x0205070a}, |
| 4181 | - {0x0000a108, 0x0205070b}, |
| 4182 | - {0x0000a10c, 0x0205070c}, |
| 4183 | - {0x0000a110, 0x0205070d}, |
| 4184 | - {0x0000a114, 0x02050710}, |
| 4185 | - {0x0000a118, 0x02050711}, |
| 4186 | - {0x0000a11c, 0x02050712}, |
| 4187 | - {0x0000a120, 0x02050713}, |
| 4188 | - {0x0000a124, 0x02050714}, |
| 4189 | - {0x0000a128, 0x02050715}, |
| 4190 | - {0x0000a12c, 0x02050730}, |
| 4191 | - {0x0000a130, 0x02050731}, |
| 4192 | - {0x0000a134, 0x02050732}, |
| 4193 | - {0x0000a138, 0x02050733}, |
| 4194 | - {0x0000a13c, 0x02050734}, |
| 4195 | - {0x0000a140, 0x02050735}, |
| 4196 | - {0x0000a144, 0x02050750}, |
| 4197 | - {0x0000a148, 0x02050751}, |
| 4198 | - {0x0000a14c, 0x02050752}, |
| 4199 | - {0x0000a150, 0x02050753}, |
| 4200 | - {0x0000a154, 0x02050754}, |
| 4201 | - {0x0000a158, 0x02050755}, |
| 4202 | - {0x0000a15c, 0x02050770}, |
| 4203 | - {0x0000a160, 0x02050771}, |
| 4204 | - {0x0000a164, 0x02050772}, |
| 4205 | - {0x0000a168, 0x02050773}, |
| 4206 | - {0x0000a16c, 0x02050774}, |
| 4207 | - {0x0000a170, 0x02050775}, |
| 4208 | - {0x0000a174, 0x00000776}, |
| 4209 | - {0x0000a178, 0x00000776}, |
| 4210 | - {0x0000a17c, 0x00000776}, |
| 4211 | - {0x0000a180, 0x00000776}, |
| 4212 | - {0x0000a184, 0x00000776}, |
| 4213 | - {0x0000a188, 0x00000776}, |
| 4214 | - {0x0000a18c, 0x00000776}, |
| 4215 | - {0x0000a190, 0x00000776}, |
| 4216 | - {0x0000a194, 0x00000776}, |
| 4217 | - {0x0000a198, 0x00000776}, |
| 4218 | - {0x0000a19c, 0x00000776}, |
| 4219 | - {0x0000a1a0, 0x00000776}, |
| 4220 | - {0x0000a1a4, 0x00000776}, |
| 4221 | - {0x0000a1a8, 0x00000776}, |
| 4222 | - {0x0000a1ac, 0x00000776}, |
| 4223 | - {0x0000a1b0, 0x00000776}, |
| 4224 | - {0x0000a1b4, 0x00000776}, |
| 4225 | - {0x0000a1b8, 0x00000776}, |
| 4226 | - {0x0000a1bc, 0x00000776}, |
| 4227 | - {0x0000a1c0, 0x00000776}, |
| 4228 | - {0x0000a1c4, 0x00000776}, |
| 4229 | - {0x0000a1c8, 0x00000776}, |
| 4230 | - {0x0000a1cc, 0x00000776}, |
| 4231 | - {0x0000a1d0, 0x00000776}, |
| 4232 | - {0x0000a1d4, 0x00000776}, |
| 4233 | - {0x0000a1d8, 0x00000776}, |
| 4234 | - {0x0000a1dc, 0x00000776}, |
| 4235 | - {0x0000a1e0, 0x00000776}, |
| 4236 | - {0x0000a1e4, 0x00000776}, |
| 4237 | - {0x0000a1e8, 0x00000776}, |
| 4238 | - {0x0000a1ec, 0x00000776}, |
| 4239 | - {0x0000a1f0, 0x00000776}, |
| 4240 | - {0x0000a1f4, 0x00000776}, |
| 4241 | - {0x0000a1f8, 0x00000776}, |
| 4242 | - {0x0000a1fc, 0x00000776}, |
| 4243 | - {0x0000b000, 0x02000101}, |
| 4244 | - {0x0000b004, 0x02000102}, |
| 4245 | - {0x0000b008, 0x02000103}, |
| 4246 | - {0x0000b00c, 0x02000104}, |
| 4247 | - {0x0000b010, 0x02000200}, |
| 4248 | - {0x0000b014, 0x02000201}, |
| 4249 | - {0x0000b018, 0x02000202}, |
| 4250 | - {0x0000b01c, 0x02000203}, |
| 4251 | - {0x0000b020, 0x02000204}, |
| 4252 | - {0x0000b024, 0x02000205}, |
| 4253 | - {0x0000b028, 0x02000208}, |
| 4254 | - {0x0000b02c, 0x02000302}, |
| 4255 | - {0x0000b030, 0x02000303}, |
| 4256 | - {0x0000b034, 0x02000304}, |
| 4257 | - {0x0000b038, 0x02000400}, |
| 4258 | - {0x0000b03c, 0x02010300}, |
| 4259 | - {0x0000b040, 0x02010301}, |
| 4260 | - {0x0000b044, 0x02010302}, |
| 4261 | - {0x0000b048, 0x02000500}, |
| 4262 | - {0x0000b04c, 0x02010400}, |
| 4263 | - {0x0000b050, 0x02020300}, |
| 4264 | - {0x0000b054, 0x02020301}, |
| 4265 | - {0x0000b058, 0x02020302}, |
| 4266 | - {0x0000b05c, 0x02020303}, |
| 4267 | - {0x0000b060, 0x02020400}, |
| 4268 | - {0x0000b064, 0x02030300}, |
| 4269 | - {0x0000b068, 0x02030301}, |
| 4270 | - {0x0000b06c, 0x02030302}, |
| 4271 | - {0x0000b070, 0x02030303}, |
| 4272 | - {0x0000b074, 0x02030400}, |
| 4273 | - {0x0000b078, 0x02040300}, |
| 4274 | - {0x0000b07c, 0x02040301}, |
| 4275 | - {0x0000b080, 0x02040302}, |
| 4276 | - {0x0000b084, 0x02040303}, |
| 4277 | - {0x0000b088, 0x02030500}, |
| 4278 | - {0x0000b08c, 0x02040400}, |
| 4279 | - {0x0000b090, 0x02050203}, |
| 4280 | - {0x0000b094, 0x02050204}, |
| 4281 | - {0x0000b098, 0x02050205}, |
| 4282 | - {0x0000b09c, 0x02040500}, |
| 4283 | - {0x0000b0a0, 0x02050301}, |
| 4284 | - {0x0000b0a4, 0x02050302}, |
| 4285 | - {0x0000b0a8, 0x02050303}, |
| 4286 | - {0x0000b0ac, 0x02050400}, |
| 4287 | - {0x0000b0b0, 0x02050401}, |
| 4288 | - {0x0000b0b4, 0x02050402}, |
| 4289 | - {0x0000b0b8, 0x02050403}, |
| 4290 | - {0x0000b0bc, 0x02050500}, |
| 4291 | - {0x0000b0c0, 0x02050501}, |
| 4292 | - {0x0000b0c4, 0x02050502}, |
| 4293 | - {0x0000b0c8, 0x02050503}, |
| 4294 | - {0x0000b0cc, 0x02050504}, |
| 4295 | - {0x0000b0d0, 0x02050600}, |
| 4296 | - {0x0000b0d4, 0x02050601}, |
| 4297 | - {0x0000b0d8, 0x02050602}, |
| 4298 | - {0x0000b0dc, 0x02050603}, |
| 4299 | - {0x0000b0e0, 0x02050604}, |
| 4300 | - {0x0000b0e4, 0x02050700}, |
| 4301 | - {0x0000b0e8, 0x02050701}, |
| 4302 | - {0x0000b0ec, 0x02050702}, |
| 4303 | - {0x0000b0f0, 0x02050703}, |
| 4304 | - {0x0000b0f4, 0x02050704}, |
| 4305 | - {0x0000b0f8, 0x02050705}, |
| 4306 | - {0x0000b0fc, 0x02050708}, |
| 4307 | - {0x0000b100, 0x02050709}, |
| 4308 | - {0x0000b104, 0x0205070a}, |
| 4309 | - {0x0000b108, 0x0205070b}, |
| 4310 | - {0x0000b10c, 0x0205070c}, |
| 4311 | - {0x0000b110, 0x0205070d}, |
| 4312 | - {0x0000b114, 0x02050710}, |
| 4313 | - {0x0000b118, 0x02050711}, |
| 4314 | - {0x0000b11c, 0x02050712}, |
| 4315 | - {0x0000b120, 0x02050713}, |
| 4316 | - {0x0000b124, 0x02050714}, |
| 4317 | - {0x0000b128, 0x02050715}, |
| 4318 | - {0x0000b12c, 0x02050730}, |
| 4319 | - {0x0000b130, 0x02050731}, |
| 4320 | - {0x0000b134, 0x02050732}, |
| 4321 | - {0x0000b138, 0x02050733}, |
| 4322 | - {0x0000b13c, 0x02050734}, |
| 4323 | - {0x0000b140, 0x02050735}, |
| 4324 | - {0x0000b144, 0x02050750}, |
| 4325 | - {0x0000b148, 0x02050751}, |
| 4326 | - {0x0000b14c, 0x02050752}, |
| 4327 | - {0x0000b150, 0x02050753}, |
| 4328 | - {0x0000b154, 0x02050754}, |
| 4329 | - {0x0000b158, 0x02050755}, |
| 4330 | - {0x0000b15c, 0x02050770}, |
| 4331 | - {0x0000b160, 0x02050771}, |
| 4332 | - {0x0000b164, 0x02050772}, |
| 4333 | - {0x0000b168, 0x02050773}, |
| 4334 | - {0x0000b16c, 0x02050774}, |
| 4335 | - {0x0000b170, 0x02050775}, |
| 4336 | - {0x0000b174, 0x00000776}, |
| 4337 | - {0x0000b178, 0x00000776}, |
| 4338 | - {0x0000b17c, 0x00000776}, |
| 4339 | - {0x0000b180, 0x00000776}, |
| 4340 | - {0x0000b184, 0x00000776}, |
| 4341 | - {0x0000b188, 0x00000776}, |
| 4342 | - {0x0000b18c, 0x00000776}, |
| 4343 | - {0x0000b190, 0x00000776}, |
| 4344 | - {0x0000b194, 0x00000776}, |
| 4345 | - {0x0000b198, 0x00000776}, |
| 4346 | - {0x0000b19c, 0x00000776}, |
| 4347 | - {0x0000b1a0, 0x00000776}, |
| 4348 | - {0x0000b1a4, 0x00000776}, |
| 4349 | - {0x0000b1a8, 0x00000776}, |
| 4350 | - {0x0000b1ac, 0x00000776}, |
| 4351 | - {0x0000b1b0, 0x00000776}, |
| 4352 | - {0x0000b1b4, 0x00000776}, |
| 4353 | - {0x0000b1b8, 0x00000776}, |
| 4354 | - {0x0000b1bc, 0x00000776}, |
| 4355 | - {0x0000b1c0, 0x00000776}, |
| 4356 | - {0x0000b1c4, 0x00000776}, |
| 4357 | - {0x0000b1c8, 0x00000776}, |
| 4358 | - {0x0000b1cc, 0x00000776}, |
| 4359 | - {0x0000b1d0, 0x00000776}, |
| 4360 | - {0x0000b1d4, 0x00000776}, |
| 4361 | - {0x0000b1d8, 0x00000776}, |
| 4362 | - {0x0000b1dc, 0x00000776}, |
| 4363 | - {0x0000b1e0, 0x00000776}, |
| 4364 | - {0x0000b1e4, 0x00000776}, |
| 4365 | - {0x0000b1e8, 0x00000776}, |
| 4366 | - {0x0000b1ec, 0x00000776}, |
| 4367 | - {0x0000b1f0, 0x00000776}, |
| 4368 | - {0x0000b1f4, 0x00000776}, |
| 4369 | - {0x0000b1f8, 0x00000776}, |
| 4370 | - {0x0000b1fc, 0x00000776}, |
| 4371 | -}; |
| 4372 | - |
| 4373 | -static const u32 ar9300_2p0_mac_postamble[][5] = { |
| 4374 | - /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 4375 | - {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160}, |
| 4376 | - {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c}, |
| 4377 | - {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38}, |
| 4378 | - {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00}, |
| 4379 | - {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b}, |
| 4380 | - {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810}, |
| 4381 | - {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a}, |
| 4382 | - {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440}, |
| 4383 | -}; |
| 4384 | - |
| 4385 | -static const u32 ar9300_2p0_soc_postamble[][5] = { |
| 4386 | - /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 4387 | - {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023}, |
| 4388 | -}; |
| 4389 | - |
| 4390 | -static const u32 ar9200_merlin_2p0_radio_core[][2] = { |
| 4391 | - /* Addr allmodes */ |
| 4392 | - {0x00007800, 0x00040000}, |
| 4393 | - {0x00007804, 0xdb005012}, |
| 4394 | - {0x00007808, 0x04924914}, |
| 4395 | - {0x0000780c, 0x21084210}, |
| 4396 | - {0x00007810, 0x6d801300}, |
| 4397 | - {0x00007814, 0x0019beff}, |
| 4398 | - {0x00007818, 0x07e41000}, |
| 4399 | - {0x0000781c, 0x00392000}, |
| 4400 | - {0x00007820, 0x92592480}, |
| 4401 | - {0x00007824, 0x00040000}, |
| 4402 | - {0x00007828, 0xdb005012}, |
| 4403 | - {0x0000782c, 0x04924914}, |
| 4404 | - {0x00007830, 0x21084210}, |
| 4405 | - {0x00007834, 0x6d801300}, |
| 4406 | - {0x00007838, 0x0019beff}, |
| 4407 | - {0x0000783c, 0x07e40000}, |
| 4408 | - {0x00007840, 0x00392000}, |
| 4409 | - {0x00007844, 0x92592480}, |
| 4410 | - {0x00007848, 0x00100000}, |
| 4411 | - {0x0000784c, 0x773f0567}, |
| 4412 | - {0x00007850, 0x54214514}, |
| 4413 | - {0x00007854, 0x12035828}, |
| 4414 | - {0x00007858, 0x92592692}, |
| 4415 | - {0x0000785c, 0x00000000}, |
| 4416 | - {0x00007860, 0x56400000}, |
| 4417 | - {0x00007864, 0x0a8e370e}, |
| 4418 | - {0x00007868, 0xc0102850}, |
| 4419 | - {0x0000786c, 0x812d4000}, |
| 4420 | - {0x00007870, 0x807ec400}, |
| 4421 | - {0x00007874, 0x001b6db0}, |
| 4422 | - {0x00007878, 0x00376b63}, |
| 4423 | - {0x0000787c, 0x06db6db6}, |
| 4424 | - {0x00007880, 0x006d8000}, |
| 4425 | - {0x00007884, 0xffeffffe}, |
| 4426 | - {0x00007888, 0xffeffffe}, |
| 4427 | - {0x0000788c, 0x00010000}, |
| 4428 | - {0x00007890, 0x02060aeb}, |
| 4429 | - {0x00007894, 0x5a108000}, |
| 4430 | -}; |
| 4431 | - |
| 4432 | -static const u32 ar9300_2p0_baseband_postamble[][5] = { |
| 4433 | - /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 4434 | - {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011}, |
| 4435 | - {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e}, |
| 4436 | - {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, |
| 4437 | - {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881}, |
| 4438 | - {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, |
| 4439 | - {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, |
| 4440 | - {0x00009c00, 0x00000044, 0x000000c4, 0x000000c4, 0x00000044}, |
| 4441 | - {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0}, |
| 4442 | - {0x00009e04, 0x00802020, 0x00802020, 0x00802020, 0x00802020}, |
| 4443 | - {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, |
| 4444 | - {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, |
| 4445 | - {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e}, |
| 4446 | - {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 4447 | - {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, |
| 4448 | - {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, |
| 4449 | - {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, |
| 4450 | - {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, |
| 4451 | - {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, |
| 4452 | - {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, |
| 4453 | - {0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0}, |
| 4454 | - {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, |
| 4455 | - {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, |
| 4456 | - {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018}, |
| 4457 | - {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108}, |
| 4458 | - {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898}, |
| 4459 | - {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002}, |
| 4460 | - {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, |
| 4461 | - {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501}, |
| 4462 | - {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, |
| 4463 | - {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b}, |
| 4464 | - {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 4465 | - {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, |
| 4466 | - {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, |
| 4467 | - {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, |
| 4468 | - {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071982}, |
| 4469 | - {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a}, |
| 4470 | - {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 4471 | - {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 4472 | - {0x0000ae04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 4473 | - {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 4474 | - {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 4475 | - {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, |
| 4476 | - {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 4477 | - {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 4478 | - {0x0000be04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 4479 | - {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 4480 | - {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
| 4481 | - {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, |
| 4482 | - {0x0000c284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
| 4483 | -}; |
| 4484 | - |
| 4485 | -static const u32 ar9300_2p0_baseband_core[][2] = { |
| 4486 | - /* Addr allmodes */ |
| 4487 | - {0x00009800, 0xafe68e30}, |
| 4488 | - {0x00009804, 0xfd14e000}, |
| 4489 | - {0x00009808, 0x9c0a9f6b}, |
| 4490 | - {0x0000980c, 0x04900000}, |
| 4491 | - {0x00009814, 0x9280c00a}, |
| 4492 | - {0x00009818, 0x00000000}, |
| 4493 | - {0x0000981c, 0x00020028}, |
| 4494 | - {0x00009834, 0x5f3ca3de}, |
| 4495 | - {0x00009838, 0x0108ecff}, |
| 4496 | - {0x0000983c, 0x14750600}, |
| 4497 | - {0x00009880, 0x201fff00}, |
| 4498 | - {0x00009884, 0x00001042}, |
| 4499 | - {0x000098a4, 0x00200400}, |
| 4500 | - {0x000098b0, 0x52440bbe}, |
| 4501 | - {0x000098d0, 0x004b6a8e}, |
| 4502 | - {0x000098d4, 0x00000820}, |
| 4503 | - {0x000098dc, 0x00000000}, |
| 4504 | - {0x000098f0, 0x00000000}, |
| 4505 | - {0x000098f4, 0x00000000}, |
| 4506 | - {0x00009c04, 0xff55ff55}, |
| 4507 | - {0x00009c08, 0x0320ff55}, |
| 4508 | - {0x00009c0c, 0x00000000}, |
| 4509 | - {0x00009c10, 0x00000000}, |
| 4510 | - {0x00009c14, 0x00046384}, |
| 4511 | - {0x00009c18, 0x05b6b440}, |
| 4512 | - {0x00009c1c, 0x00b6b440}, |
| 4513 | - {0x00009d00, 0xc080a333}, |
| 4514 | - {0x00009d04, 0x40206c10}, |
| 4515 | - {0x00009d08, 0x009c4060}, |
| 4516 | - {0x00009d0c, 0x9883800a}, |
| 4517 | - {0x00009d10, 0x01834061}, |
| 4518 | - {0x00009d14, 0x00c0040b}, |
| 4519 | - {0x00009d18, 0x00000000}, |
| 4520 | - {0x00009e08, 0x0038230c}, |
| 4521 | - {0x00009e24, 0x990bb515}, |
| 4522 | - {0x00009e28, 0x0c6f0000}, |
| 4523 | - {0x00009e30, 0x06336f77}, |
| 4524 | - {0x00009e34, 0x6af6532f}, |
| 4525 | - {0x00009e38, 0x0cc80c00}, |
| 4526 | - {0x00009e3c, 0xcf946222}, |
| 4527 | - {0x00009e40, 0x0d261820}, |
| 4528 | - {0x00009e4c, 0x00001004}, |
| 4529 | - {0x00009e50, 0x00ff03f1}, |
| 4530 | - {0x00009e54, 0x00000000}, |
| 4531 | - {0x00009fc0, 0x803e4788}, |
| 4532 | - {0x00009fc4, 0x0001efb5}, |
| 4533 | - {0x00009fcc, 0x40000014}, |
| 4534 | - {0x00009fd0, 0x01193b93}, |
| 4535 | - {0x0000a20c, 0x00000000}, |
| 4536 | - {0x0000a220, 0x00000000}, |
| 4537 | - {0x0000a224, 0x00000000}, |
| 4538 | - {0x0000a228, 0x10002310}, |
| 4539 | - {0x0000a22c, 0x01036a1e}, |
| 4540 | - {0x0000a234, 0x10000fff}, |
| 4541 | - {0x0000a23c, 0x00000000}, |
| 4542 | - {0x0000a244, 0x0c000000}, |
| 4543 | - {0x0000a2a0, 0x00000001}, |
| 4544 | - {0x0000a2c0, 0x00000001}, |
| 4545 | - {0x0000a2c8, 0x00000000}, |
| 4546 | - {0x0000a2cc, 0x18c43433}, |
| 4547 | - {0x0000a2d4, 0x00000000}, |
| 4548 | - {0x0000a2dc, 0x00000000}, |
| 4549 | - {0x0000a2e0, 0x00000000}, |
| 4550 | - {0x0000a2e4, 0x00000000}, |
| 4551 | - {0x0000a2e8, 0x00000000}, |
| 4552 | - {0x0000a2ec, 0x00000000}, |
| 4553 | - {0x0000a2f0, 0x00000000}, |
| 4554 | - {0x0000a2f4, 0x00000000}, |
| 4555 | - {0x0000a2f8, 0x00000000}, |
| 4556 | - {0x0000a344, 0x00000000}, |
| 4557 | - {0x0000a34c, 0x00000000}, |
| 4558 | - {0x0000a350, 0x0000a000}, |
| 4559 | - {0x0000a364, 0x00000000}, |
| 4560 | - {0x0000a370, 0x00000000}, |
| 4561 | - {0x0000a390, 0x00000001}, |
| 4562 | - {0x0000a394, 0x00000444}, |
| 4563 | - {0x0000a398, 0x001f0e0f}, |
| 4564 | - {0x0000a39c, 0x0075393f}, |
| 4565 | - {0x0000a3a0, 0xb79f6427}, |
| 4566 | - {0x0000a3a4, 0x00000000}, |
| 4567 | - {0x0000a3a8, 0xaaaaaaaa}, |
| 4568 | - {0x0000a3ac, 0x3c466478}, |
| 4569 | - {0x0000a3c0, 0x20202020}, |
| 4570 | - {0x0000a3c4, 0x22222220}, |
| 4571 | - {0x0000a3c8, 0x20200020}, |
| 4572 | - {0x0000a3cc, 0x20202020}, |
| 4573 | - {0x0000a3d0, 0x20202020}, |
| 4574 | - {0x0000a3d4, 0x20202020}, |
| 4575 | - {0x0000a3d8, 0x20202020}, |
| 4576 | - {0x0000a3dc, 0x20202020}, |
| 4577 | - {0x0000a3e0, 0x20202020}, |
| 4578 | - {0x0000a3e4, 0x20202020}, |
| 4579 | - {0x0000a3e8, 0x20202020}, |
| 4580 | - {0x0000a3ec, 0x20202020}, |
| 4581 | - {0x0000a3f0, 0x00000000}, |
| 4582 | - {0x0000a3f4, 0x00000246}, |
| 4583 | - {0x0000a3f8, 0x0cdbd380}, |
| 4584 | - {0x0000a3fc, 0x000f0f01}, |
| 4585 | - {0x0000a400, 0x8fa91f01}, |
| 4586 | - {0x0000a404, 0x00000000}, |
| 4587 | - {0x0000a408, 0x0e79e5c6}, |
| 4588 | - {0x0000a40c, 0x00820820}, |
| 4589 | - {0x0000a414, 0x1ce739ce}, |
| 4590 | - {0x0000a418, 0x2d001dce}, |
| 4591 | - {0x0000a41c, 0x1ce739ce}, |
| 4592 | - {0x0000a420, 0x000001ce}, |
| 4593 | - {0x0000a424, 0x1ce739ce}, |
| 4594 | - {0x0000a428, 0x000001ce}, |
| 4595 | - {0x0000a42c, 0x1ce739ce}, |
| 4596 | - {0x0000a430, 0x1ce739ce}, |
| 4597 | - {0x0000a434, 0x00000000}, |
| 4598 | - {0x0000a438, 0x00001801}, |
| 4599 | - {0x0000a43c, 0x00000000}, |
| 4600 | - {0x0000a440, 0x00000000}, |
| 4601 | - {0x0000a444, 0x00000000}, |
| 4602 | - {0x0000a448, 0x04000080}, |
| 4603 | - {0x0000a44c, 0x00000001}, |
| 4604 | - {0x0000a450, 0x00010000}, |
| 4605 | - {0x0000a458, 0x00000000}, |
| 4606 | - {0x0000a600, 0x00000000}, |
| 4607 | - {0x0000a604, 0x00000000}, |
| 4608 | - {0x0000a608, 0x00000000}, |
| 4609 | - {0x0000a60c, 0x00000000}, |
| 4610 | - {0x0000a610, 0x00000000}, |
| 4611 | - {0x0000a614, 0x00000000}, |
| 4612 | - {0x0000a618, 0x00000000}, |
| 4613 | - {0x0000a61c, 0x00000000}, |
| 4614 | - {0x0000a620, 0x00000000}, |
| 4615 | - {0x0000a624, 0x00000000}, |
| 4616 | - {0x0000a628, 0x00000000}, |
| 4617 | - {0x0000a62c, 0x00000000}, |
| 4618 | - {0x0000a630, 0x00000000}, |
| 4619 | - {0x0000a634, 0x00000000}, |
| 4620 | - {0x0000a638, 0x00000000}, |
| 4621 | - {0x0000a63c, 0x00000000}, |
| 4622 | - {0x0000a640, 0x00000000}, |
| 4623 | - {0x0000a644, 0x3fad9d74}, |
| 4624 | - {0x0000a648, 0x0048060a}, |
| 4625 | - {0x0000a64c, 0x00000637}, |
| 4626 | - {0x0000a670, 0x03020100}, |
| 4627 | - {0x0000a674, 0x09080504}, |
| 4628 | - {0x0000a678, 0x0d0c0b0a}, |
| 4629 | - {0x0000a67c, 0x13121110}, |
| 4630 | - {0x0000a680, 0x31301514}, |
| 4631 | - {0x0000a684, 0x35343332}, |
| 4632 | - {0x0000a688, 0x00000036}, |
| 4633 | - {0x0000a690, 0x00000838}, |
| 4634 | - {0x0000a7c0, 0x00000000}, |
| 4635 | - {0x0000a7c4, 0xfffffffc}, |
| 4636 | - {0x0000a7c8, 0x00000000}, |
| 4637 | - {0x0000a7cc, 0x00000000}, |
| 4638 | - {0x0000a7d0, 0x00000000}, |
| 4639 | - {0x0000a7d4, 0x00000004}, |
| 4640 | - {0x0000a7dc, 0x00000001}, |
| 4641 | - {0x0000a8d0, 0x004b6a8e}, |
| 4642 | - {0x0000a8d4, 0x00000820}, |
| 4643 | - {0x0000a8dc, 0x00000000}, |
| 4644 | - {0x0000a8f0, 0x00000000}, |
| 4645 | - {0x0000a8f4, 0x00000000}, |
| 4646 | - {0x0000b2d0, 0x00000080}, |
| 4647 | - {0x0000b2d4, 0x00000000}, |
| 4648 | - {0x0000b2dc, 0x00000000}, |
| 4649 | - {0x0000b2e0, 0x00000000}, |
| 4650 | - {0x0000b2e4, 0x00000000}, |
| 4651 | - {0x0000b2e8, 0x00000000}, |
| 4652 | - {0x0000b2ec, 0x00000000}, |
| 4653 | - {0x0000b2f0, 0x00000000}, |
| 4654 | - {0x0000b2f4, 0x00000000}, |
| 4655 | - {0x0000b2f8, 0x00000000}, |
| 4656 | - {0x0000b408, 0x0e79e5c0}, |
| 4657 | - {0x0000b40c, 0x00820820}, |
| 4658 | - {0x0000b420, 0x00000000}, |
| 4659 | - {0x0000b8d0, 0x004b6a8e}, |
| 4660 | - {0x0000b8d4, 0x00000820}, |
| 4661 | - {0x0000b8dc, 0x00000000}, |
| 4662 | - {0x0000b8f0, 0x00000000}, |
| 4663 | - {0x0000b8f4, 0x00000000}, |
| 4664 | - {0x0000c2d0, 0x00000080}, |
| 4665 | - {0x0000c2d4, 0x00000000}, |
| 4666 | - {0x0000c2dc, 0x00000000}, |
| 4667 | - {0x0000c2e0, 0x00000000}, |
| 4668 | - {0x0000c2e4, 0x00000000}, |
| 4669 | - {0x0000c2e8, 0x00000000}, |
| 4670 | - {0x0000c2ec, 0x00000000}, |
| 4671 | - {0x0000c2f0, 0x00000000}, |
| 4672 | - {0x0000c2f4, 0x00000000}, |
| 4673 | - {0x0000c2f8, 0x00000000}, |
| 4674 | - {0x0000c408, 0x0e79e5c0}, |
| 4675 | - {0x0000c40c, 0x00820820}, |
| 4676 | - {0x0000c420, 0x00000000}, |
| 4677 | -}; |
| 4678 | - |
| 4679 | -static const u32 ar9300Modes_high_power_tx_gain_table_2p0[][5] = { |
| 4680 | - /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 4681 | - {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 4682 | - {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, |
| 4683 | - {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002}, |
| 4684 | - {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, |
| 4685 | - {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, |
| 4686 | - {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, |
| 4687 | - {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, |
| 4688 | - {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, |
| 4689 | - {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, |
| 4690 | - {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, |
| 4691 | - {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, |
| 4692 | - {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, |
| 4693 | - {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, |
| 4694 | - {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20}, |
| 4695 | - {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22}, |
| 4696 | - {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24}, |
| 4697 | - {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640}, |
| 4698 | - {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660}, |
| 4699 | - {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861}, |
| 4700 | - {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81}, |
| 4701 | - {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, |
| 4702 | - {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84}, |
| 4703 | - {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3}, |
| 4704 | - {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5}, |
| 4705 | - {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9}, |
| 4706 | - {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb}, |
| 4707 | - {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4708 | - {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4709 | - {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4710 | - {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4711 | - {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4712 | - {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4713 | - {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4714 | - {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, |
| 4715 | - {0x0000a584, 0x06802223, 0x06802223, 0x04800002, 0x04800002}, |
| 4716 | - {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, |
| 4717 | - {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, |
| 4718 | - {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, |
| 4719 | - {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, |
| 4720 | - {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, |
| 4721 | - {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, |
| 4722 | - {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, |
| 4723 | - {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, |
| 4724 | - {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, |
| 4725 | - {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, |
| 4726 | - {0x0000a5b0, 0x34825643, 0x34825643, 0x2a800e20, 0x2a800e20}, |
| 4727 | - {0x0000a5b4, 0x38825a44, 0x38825a44, 0x2e800e22, 0x2e800e22}, |
| 4728 | - {0x0000a5b8, 0x3b825e45, 0x3b825e45, 0x31800e24, 0x31800e24}, |
| 4729 | - {0x0000a5bc, 0x41825e4a, 0x41825e4a, 0x34801640, 0x34801640}, |
| 4730 | - {0x0000a5c0, 0x48825e6c, 0x48825e6c, 0x38801660, 0x38801660}, |
| 4731 | - {0x0000a5c4, 0x4e825e8e, 0x4e825e8e, 0x3b801861, 0x3b801861}, |
| 4732 | - {0x0000a5c8, 0x53825eb2, 0x53825eb2, 0x3e801a81, 0x3e801a81}, |
| 4733 | - {0x0000a5cc, 0x59825eb5, 0x59825eb5, 0x42801a83, 0x42801a83}, |
| 4734 | - {0x0000a5d0, 0x5f825ef6, 0x5f825ef6, 0x44801c84, 0x44801c84}, |
| 4735 | - {0x0000a5d4, 0x62825f56, 0x62825f56, 0x48801ce3, 0x48801ce3}, |
| 4736 | - {0x0000a5d8, 0x66827f56, 0x66827f56, 0x4c801ce5, 0x4c801ce5}, |
| 4737 | - {0x0000a5dc, 0x6a829f56, 0x6a829f56, 0x50801ce9, 0x50801ce9}, |
| 4738 | - {0x0000a5e0, 0x70849f56, 0x70849f56, 0x54801ceb, 0x54801ceb}, |
| 4739 | - {0x0000a5e4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4740 | - {0x0000a5e8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4741 | - {0x0000a5ec, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4742 | - {0x0000a5f0, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4743 | - {0x0000a5f4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4744 | - {0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4745 | - {0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4746 | - {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 4747 | - {0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 4748 | - {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 4749 | - {0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 4750 | - {0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 4751 | - {0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 4752 | - {0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
| 4753 | - {0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
| 4754 | - {0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
| 4755 | -}; |
| 4756 | - |
| 4757 | -static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p0[][5] = { |
| 4758 | - /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 4759 | - {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 4760 | - {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, |
| 4761 | - {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002}, |
| 4762 | - {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, |
| 4763 | - {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, |
| 4764 | - {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, |
| 4765 | - {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, |
| 4766 | - {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, |
| 4767 | - {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, |
| 4768 | - {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, |
| 4769 | - {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, |
| 4770 | - {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, |
| 4771 | - {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, |
| 4772 | - {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20}, |
| 4773 | - {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22}, |
| 4774 | - {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24}, |
| 4775 | - {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640}, |
| 4776 | - {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660}, |
| 4777 | - {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861}, |
| 4778 | - {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81}, |
| 4779 | - {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, |
| 4780 | - {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84}, |
| 4781 | - {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3}, |
| 4782 | - {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5}, |
| 4783 | - {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9}, |
| 4784 | - {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb}, |
| 4785 | - {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4786 | - {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4787 | - {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4788 | - {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4789 | - {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4790 | - {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4791 | - {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, |
| 4792 | - {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, |
| 4793 | - {0x0000a584, 0x06802223, 0x06802223, 0x04800002, 0x04800002}, |
| 4794 | - {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, |
| 4795 | - {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, |
| 4796 | - {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, |
| 4797 | - {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, |
| 4798 | - {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, |
| 4799 | - {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, |
| 4800 | - {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, |
| 4801 | - {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, |
| 4802 | - {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, |
| 4803 | - {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, |
| 4804 | - {0x0000a5b0, 0x34825643, 0x34825643, 0x2a800e20, 0x2a800e20}, |
| 4805 | - {0x0000a5b4, 0x38825a44, 0x38825a44, 0x2e800e22, 0x2e800e22}, |
| 4806 | - {0x0000a5b8, 0x3b825e45, 0x3b825e45, 0x31800e24, 0x31800e24}, |
| 4807 | - {0x0000a5bc, 0x41825e4a, 0x41825e4a, 0x34801640, 0x34801640}, |
| 4808 | - {0x0000a5c0, 0x48825e6c, 0x48825e6c, 0x38801660, 0x38801660}, |
| 4809 | - {0x0000a5c4, 0x4e825e8e, 0x4e825e8e, 0x3b801861, 0x3b801861}, |
| 4810 | - {0x0000a5c8, 0x53825eb2, 0x53825eb2, 0x3e801a81, 0x3e801a81}, |
| 4811 | - {0x0000a5cc, 0x59825eb5, 0x59825eb5, 0x42801a83, 0x42801a83}, |
| 4812 | - {0x0000a5d0, 0x5f825ef6, 0x5f825ef6, 0x44801c84, 0x44801c84}, |
| 4813 | - {0x0000a5d4, 0x62825f56, 0x62825f56, 0x48801ce3, 0x48801ce3}, |
| 4814 | - {0x0000a5d8, 0x66827f56, 0x66827f56, 0x4c801ce5, 0x4c801ce5}, |
| 4815 | - {0x0000a5dc, 0x6a829f56, 0x6a829f56, 0x50801ce9, 0x50801ce9}, |
| 4816 | - {0x0000a5e0, 0x70849f56, 0x70849f56, 0x54801ceb, 0x54801ceb}, |
| 4817 | - {0x0000a5e4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4818 | - {0x0000a5e8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4819 | - {0x0000a5ec, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4820 | - {0x0000a5f0, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4821 | - {0x0000a5f4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4822 | - {0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4823 | - {0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, |
| 4824 | - {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 4825 | - {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 4826 | - {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 4827 | - {0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 4828 | - {0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 4829 | - {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 4830 | - {0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
| 4831 | - {0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
| 4832 | - {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 4833 | -}; |
| 4834 | - |
| 4835 | -static const u32 ar9300Common_rx_gain_table_2p0[][2] = { |
| 4836 | - /* Addr allmodes */ |
| 4837 | - {0x0000a000, 0x00010000}, |
| 4838 | - {0x0000a004, 0x00030002}, |
| 4839 | - {0x0000a008, 0x00050004}, |
| 4840 | - {0x0000a00c, 0x00810080}, |
| 4841 | - {0x0000a010, 0x00830082}, |
| 4842 | - {0x0000a014, 0x01810180}, |
| 4843 | - {0x0000a018, 0x01830182}, |
| 4844 | - {0x0000a01c, 0x01850184}, |
| 4845 | - {0x0000a020, 0x01890188}, |
| 4846 | - {0x0000a024, 0x018b018a}, |
| 4847 | - {0x0000a028, 0x018d018c}, |
| 4848 | - {0x0000a02c, 0x01910190}, |
| 4849 | - {0x0000a030, 0x01930192}, |
| 4850 | - {0x0000a034, 0x01950194}, |
| 4851 | - {0x0000a038, 0x038a0196}, |
| 4852 | - {0x0000a03c, 0x038c038b}, |
| 4853 | - {0x0000a040, 0x0390038d}, |
| 4854 | - {0x0000a044, 0x03920391}, |
| 4855 | - {0x0000a048, 0x03940393}, |
| 4856 | - {0x0000a04c, 0x03960395}, |
| 4857 | - {0x0000a050, 0x00000000}, |
| 4858 | - {0x0000a054, 0x00000000}, |
| 4859 | - {0x0000a058, 0x00000000}, |
| 4860 | - {0x0000a05c, 0x00000000}, |
| 4861 | - {0x0000a060, 0x00000000}, |
| 4862 | - {0x0000a064, 0x00000000}, |
| 4863 | - {0x0000a068, 0x00000000}, |
| 4864 | - {0x0000a06c, 0x00000000}, |
| 4865 | - {0x0000a070, 0x00000000}, |
| 4866 | - {0x0000a074, 0x00000000}, |
| 4867 | - {0x0000a078, 0x00000000}, |
| 4868 | - {0x0000a07c, 0x00000000}, |
| 4869 | - {0x0000a080, 0x22222229}, |
| 4870 | - {0x0000a084, 0x1d1d1d1d}, |
| 4871 | - {0x0000a088, 0x1d1d1d1d}, |
| 4872 | - {0x0000a08c, 0x1d1d1d1d}, |
| 4873 | - {0x0000a090, 0x171d1d1d}, |
| 4874 | - {0x0000a094, 0x11111717}, |
| 4875 | - {0x0000a098, 0x00030311}, |
| 4876 | - {0x0000a09c, 0x00000000}, |
| 4877 | - {0x0000a0a0, 0x00000000}, |
| 4878 | - {0x0000a0a4, 0x00000000}, |
| 4879 | - {0x0000a0a8, 0x00000000}, |
| 4880 | - {0x0000a0ac, 0x00000000}, |
| 4881 | - {0x0000a0b0, 0x00000000}, |
| 4882 | - {0x0000a0b4, 0x00000000}, |
| 4883 | - {0x0000a0b8, 0x00000000}, |
| 4884 | - {0x0000a0bc, 0x00000000}, |
| 4885 | - {0x0000a0c0, 0x001f0000}, |
| 4886 | - {0x0000a0c4, 0x01000101}, |
| 4887 | - {0x0000a0c8, 0x011e011f}, |
| 4888 | - {0x0000a0cc, 0x011c011d}, |
| 4889 | - {0x0000a0d0, 0x02030204}, |
| 4890 | - {0x0000a0d4, 0x02010202}, |
| 4891 | - {0x0000a0d8, 0x021f0200}, |
| 4892 | - {0x0000a0dc, 0x0302021e}, |
| 4893 | - {0x0000a0e0, 0x03000301}, |
| 4894 | - {0x0000a0e4, 0x031e031f}, |
| 4895 | - {0x0000a0e8, 0x0402031d}, |
| 4896 | - {0x0000a0ec, 0x04000401}, |
| 4897 | - {0x0000a0f0, 0x041e041f}, |
| 4898 | - {0x0000a0f4, 0x0502041d}, |
| 4899 | - {0x0000a0f8, 0x05000501}, |
| 4900 | - {0x0000a0fc, 0x051e051f}, |
| 4901 | - {0x0000a100, 0x06010602}, |
| 4902 | - {0x0000a104, 0x061f0600}, |
| 4903 | - {0x0000a108, 0x061d061e}, |
| 4904 | - {0x0000a10c, 0x07020703}, |
| 4905 | - {0x0000a110, 0x07000701}, |
| 4906 | - {0x0000a114, 0x00000000}, |
| 4907 | - {0x0000a118, 0x00000000}, |
| 4908 | - {0x0000a11c, 0x00000000}, |
| 4909 | - {0x0000a120, 0x00000000}, |
| 4910 | - {0x0000a124, 0x00000000}, |
| 4911 | - {0x0000a128, 0x00000000}, |
| 4912 | - {0x0000a12c, 0x00000000}, |
| 4913 | - {0x0000a130, 0x00000000}, |
| 4914 | - {0x0000a134, 0x00000000}, |
| 4915 | - {0x0000a138, 0x00000000}, |
| 4916 | - {0x0000a13c, 0x00000000}, |
| 4917 | - {0x0000a140, 0x001f0000}, |
| 4918 | - {0x0000a144, 0x01000101}, |
| 4919 | - {0x0000a148, 0x011e011f}, |
| 4920 | - {0x0000a14c, 0x011c011d}, |
| 4921 | - {0x0000a150, 0x02030204}, |
| 4922 | - {0x0000a154, 0x02010202}, |
| 4923 | - {0x0000a158, 0x021f0200}, |
| 4924 | - {0x0000a15c, 0x0302021e}, |
| 4925 | - {0x0000a160, 0x03000301}, |
| 4926 | - {0x0000a164, 0x031e031f}, |
| 4927 | - {0x0000a168, 0x0402031d}, |
| 4928 | - {0x0000a16c, 0x04000401}, |
| 4929 | - {0x0000a170, 0x041e041f}, |
| 4930 | - {0x0000a174, 0x0502041d}, |
| 4931 | - {0x0000a178, 0x05000501}, |
| 4932 | - {0x0000a17c, 0x051e051f}, |
| 4933 | - {0x0000a180, 0x06010602}, |
| 4934 | - {0x0000a184, 0x061f0600}, |
| 4935 | - {0x0000a188, 0x061d061e}, |
| 4936 | - {0x0000a18c, 0x07020703}, |
| 4937 | - {0x0000a190, 0x07000701}, |
| 4938 | - {0x0000a194, 0x00000000}, |
| 4939 | - {0x0000a198, 0x00000000}, |
| 4940 | - {0x0000a19c, 0x00000000}, |
| 4941 | - {0x0000a1a0, 0x00000000}, |
| 4942 | - {0x0000a1a4, 0x00000000}, |
| 4943 | - {0x0000a1a8, 0x00000000}, |
| 4944 | - {0x0000a1ac, 0x00000000}, |
| 4945 | - {0x0000a1b0, 0x00000000}, |
| 4946 | - {0x0000a1b4, 0x00000000}, |
| 4947 | - {0x0000a1b8, 0x00000000}, |
| 4948 | - {0x0000a1bc, 0x00000000}, |
| 4949 | - {0x0000a1c0, 0x00000000}, |
| 4950 | - {0x0000a1c4, 0x00000000}, |
| 4951 | - {0x0000a1c8, 0x00000000}, |
| 4952 | - {0x0000a1cc, 0x00000000}, |
| 4953 | - {0x0000a1d0, 0x00000000}, |
| 4954 | - {0x0000a1d4, 0x00000000}, |
| 4955 | - {0x0000a1d8, 0x00000000}, |
| 4956 | - {0x0000a1dc, 0x00000000}, |
| 4957 | - {0x0000a1e0, 0x00000000}, |
| 4958 | - {0x0000a1e4, 0x00000000}, |
| 4959 | - {0x0000a1e8, 0x00000000}, |
| 4960 | - {0x0000a1ec, 0x00000000}, |
| 4961 | - {0x0000a1f0, 0x00000396}, |
| 4962 | - {0x0000a1f4, 0x00000396}, |
| 4963 | - {0x0000a1f8, 0x00000396}, |
| 4964 | - {0x0000a1fc, 0x00000196}, |
| 4965 | - {0x0000b000, 0x00010000}, |
| 4966 | - {0x0000b004, 0x00030002}, |
| 4967 | - {0x0000b008, 0x00050004}, |
| 4968 | - {0x0000b00c, 0x00810080}, |
| 4969 | - {0x0000b010, 0x00830082}, |
| 4970 | - {0x0000b014, 0x01810180}, |
| 4971 | - {0x0000b018, 0x01830182}, |
| 4972 | - {0x0000b01c, 0x01850184}, |
| 4973 | - {0x0000b020, 0x02810280}, |
| 4974 | - {0x0000b024, 0x02830282}, |
| 4975 | - {0x0000b028, 0x02850284}, |
| 4976 | - {0x0000b02c, 0x02890288}, |
| 4977 | - {0x0000b030, 0x028b028a}, |
| 4978 | - {0x0000b034, 0x0388028c}, |
| 4979 | - {0x0000b038, 0x038a0389}, |
| 4980 | - {0x0000b03c, 0x038c038b}, |
| 4981 | - {0x0000b040, 0x0390038d}, |
| 4982 | - {0x0000b044, 0x03920391}, |
| 4983 | - {0x0000b048, 0x03940393}, |
| 4984 | - {0x0000b04c, 0x03960395}, |
| 4985 | - {0x0000b050, 0x00000000}, |
| 4986 | - {0x0000b054, 0x00000000}, |
| 4987 | - {0x0000b058, 0x00000000}, |
| 4988 | - {0x0000b05c, 0x00000000}, |
| 4989 | - {0x0000b060, 0x00000000}, |
| 4990 | - {0x0000b064, 0x00000000}, |
| 4991 | - {0x0000b068, 0x00000000}, |
| 4992 | - {0x0000b06c, 0x00000000}, |
| 4993 | - {0x0000b070, 0x00000000}, |
| 4994 | - {0x0000b074, 0x00000000}, |
| 4995 | - {0x0000b078, 0x00000000}, |
| 4996 | - {0x0000b07c, 0x00000000}, |
| 4997 | - {0x0000b080, 0x32323232}, |
| 4998 | - {0x0000b084, 0x2f2f3232}, |
| 4999 | - {0x0000b088, 0x23282a2d}, |
| 5000 | - {0x0000b08c, 0x1c1e2123}, |
| 5001 | - {0x0000b090, 0x14171919}, |
| 5002 | - {0x0000b094, 0x0e0e1214}, |
| 5003 | - {0x0000b098, 0x03050707}, |
| 5004 | - {0x0000b09c, 0x00030303}, |
| 5005 | - {0x0000b0a0, 0x00000000}, |
| 5006 | - {0x0000b0a4, 0x00000000}, |
| 5007 | - {0x0000b0a8, 0x00000000}, |
| 5008 | - {0x0000b0ac, 0x00000000}, |
| 5009 | - {0x0000b0b0, 0x00000000}, |
| 5010 | - {0x0000b0b4, 0x00000000}, |
| 5011 | - {0x0000b0b8, 0x00000000}, |
| 5012 | - {0x0000b0bc, 0x00000000}, |
| 5013 | - {0x0000b0c0, 0x003f0020}, |
| 5014 | - {0x0000b0c4, 0x00400041}, |
| 5015 | - {0x0000b0c8, 0x0140005f}, |
| 5016 | - {0x0000b0cc, 0x0160015f}, |
| 5017 | - {0x0000b0d0, 0x017e017f}, |
| 5018 | - {0x0000b0d4, 0x02410242}, |
| 5019 | - {0x0000b0d8, 0x025f0240}, |
| 5020 | - {0x0000b0dc, 0x027f0260}, |
| 5021 | - {0x0000b0e0, 0x0341027e}, |
| 5022 | - {0x0000b0e4, 0x035f0340}, |
| 5023 | - {0x0000b0e8, 0x037f0360}, |
| 5024 | - {0x0000b0ec, 0x04400441}, |
| 5025 | - {0x0000b0f0, 0x0460045f}, |
| 5026 | - {0x0000b0f4, 0x0541047f}, |
| 5027 | - {0x0000b0f8, 0x055f0540}, |
| 5028 | - {0x0000b0fc, 0x057f0560}, |
| 5029 | - {0x0000b100, 0x06400641}, |
| 5030 | - {0x0000b104, 0x0660065f}, |
| 5031 | - {0x0000b108, 0x067e067f}, |
| 5032 | - {0x0000b10c, 0x07410742}, |
| 5033 | - {0x0000b110, 0x075f0740}, |
| 5034 | - {0x0000b114, 0x077f0760}, |
| 5035 | - {0x0000b118, 0x07800781}, |
| 5036 | - {0x0000b11c, 0x07a0079f}, |
| 5037 | - {0x0000b120, 0x07c107bf}, |
| 5038 | - {0x0000b124, 0x000007c0}, |
| 5039 | - {0x0000b128, 0x00000000}, |
| 5040 | - {0x0000b12c, 0x00000000}, |
| 5041 | - {0x0000b130, 0x00000000}, |
| 5042 | - {0x0000b134, 0x00000000}, |
| 5043 | - {0x0000b138, 0x00000000}, |
| 5044 | - {0x0000b13c, 0x00000000}, |
| 5045 | - {0x0000b140, 0x003f0020}, |
| 5046 | - {0x0000b144, 0x00400041}, |
| 5047 | - {0x0000b148, 0x0140005f}, |
| 5048 | - {0x0000b14c, 0x0160015f}, |
| 5049 | - {0x0000b150, 0x017e017f}, |
| 5050 | - {0x0000b154, 0x02410242}, |
| 5051 | - {0x0000b158, 0x025f0240}, |
| 5052 | - {0x0000b15c, 0x027f0260}, |
| 5053 | - {0x0000b160, 0x0341027e}, |
| 5054 | - {0x0000b164, 0x035f0340}, |
| 5055 | - {0x0000b168, 0x037f0360}, |
| 5056 | - {0x0000b16c, 0x04400441}, |
| 5057 | - {0x0000b170, 0x0460045f}, |
| 5058 | - {0x0000b174, 0x0541047f}, |
| 5059 | - {0x0000b178, 0x055f0540}, |
| 5060 | - {0x0000b17c, 0x057f0560}, |
| 5061 | - {0x0000b180, 0x06400641}, |
| 5062 | - {0x0000b184, 0x0660065f}, |
| 5063 | - {0x0000b188, 0x067e067f}, |
| 5064 | - {0x0000b18c, 0x07410742}, |
| 5065 | - {0x0000b190, 0x075f0740}, |
| 5066 | - {0x0000b194, 0x077f0760}, |
| 5067 | - {0x0000b198, 0x07800781}, |
| 5068 | - {0x0000b19c, 0x07a0079f}, |
| 5069 | - {0x0000b1a0, 0x07c107bf}, |
| 5070 | - {0x0000b1a4, 0x000007c0}, |
| 5071 | - {0x0000b1a8, 0x00000000}, |
| 5072 | - {0x0000b1ac, 0x00000000}, |
| 5073 | - {0x0000b1b0, 0x00000000}, |
| 5074 | - {0x0000b1b4, 0x00000000}, |
| 5075 | - {0x0000b1b8, 0x00000000}, |
| 5076 | - {0x0000b1bc, 0x00000000}, |
| 5077 | - {0x0000b1c0, 0x00000000}, |
| 5078 | - {0x0000b1c4, 0x00000000}, |
| 5079 | - {0x0000b1c8, 0x00000000}, |
| 5080 | - {0x0000b1cc, 0x00000000}, |
| 5081 | - {0x0000b1d0, 0x00000000}, |
| 5082 | - {0x0000b1d4, 0x00000000}, |
| 5083 | - {0x0000b1d8, 0x00000000}, |
| 5084 | - {0x0000b1dc, 0x00000000}, |
| 5085 | - {0x0000b1e0, 0x00000000}, |
| 5086 | - {0x0000b1e4, 0x00000000}, |
| 5087 | - {0x0000b1e8, 0x00000000}, |
| 5088 | - {0x0000b1ec, 0x00000000}, |
| 5089 | - {0x0000b1f0, 0x00000396}, |
| 5090 | - {0x0000b1f4, 0x00000396}, |
| 5091 | - {0x0000b1f8, 0x00000396}, |
| 5092 | - {0x0000b1fc, 0x00000196}, |
| 5093 | -}; |
| 5094 | - |
| 5095 | -static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p0[][5] = { |
| 5096 | - /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
| 5097 | - {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
| 5098 | - {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
| 5099 | - {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, |
| 5100 | - {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, |
| 5101 | - {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, |
| 5102 | - {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, |
| 5103 | - {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, |
| 5104 | - {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402}, |
| 5105 | - {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404}, |
| 5106 | - {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, |
| 5107 | - {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, |
| 5108 | - {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, |
| 5109 | - {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, |
| 5110 | - {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, |
| 5111 | - {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, |
| 5112 | - {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, |
| 5113 | - {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, |
| 5114 | - {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, |
| 5115 | - {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, |
| 5116 | - {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, |
| 5117 | - {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83}, |
| 5118 | - {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84}, |
| 5119 | - {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3}, |
| 5120 | - {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5}, |
| 5121 | - {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9}, |
| 5122 | - {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb}, |
| 5123 | - {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 5124 | - {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 5125 | - {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 5126 | - {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 5127 | - {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 5128 | - {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 5129 | - {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, |
| 5130 | - {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, |
| 5131 | - {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, |
| 5132 | - {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, |
| 5133 | - {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, |
| 5134 | - {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, |
| 5135 | - {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, |
| 5136 | - {0x0000a598, 0x21820220, 0x21820220, 0x16800402, 0x16800402}, |
| 5137 | - {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404}, |
| 5138 | - {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, |
| 5139 | - {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, |
| 5140 | - {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, |
| 5141 | - {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, |
| 5142 | - {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, |
| 5143 | - {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, |
| 5144 | - {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, |
| 5145 | - {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, |
| 5146 | - {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, |
| 5147 | - {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, |
| 5148 | - {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, |
| 5149 | - {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x47801a83, 0x47801a83}, |
| 5150 | - {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4a801c84, 0x4a801c84}, |
| 5151 | - {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4e801ce3, 0x4e801ce3}, |
| 5152 | - {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x52801ce5, 0x52801ce5}, |
| 5153 | - {0x0000a5dc, 0x7086308c, 0x7086308c, 0x56801ce9, 0x56801ce9}, |
| 5154 | - {0x0000a5e0, 0x738a308a, 0x738a308a, 0x5a801ceb, 0x5a801ceb}, |
| 5155 | - {0x0000a5e4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 5156 | - {0x0000a5e8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 5157 | - {0x0000a5ec, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 5158 | - {0x0000a5f0, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 5159 | - {0x0000a5f4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 5160 | - {0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 5161 | - {0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, |
| 5162 | - {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 5163 | - {0x00016048, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, |
| 5164 | - {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 5165 | - {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 5166 | - {0x00016448, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, |
| 5167 | - {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 5168 | - {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
| 5169 | - {0x00016848, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, |
| 5170 | - {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
| 5171 | -}; |
| 5172 | - |
| 5173 | -static const u32 ar9300_2p0_mac_core[][2] = { |
| 5174 | - /* Addr allmodes */ |
| 5175 | - {0x00000008, 0x00000000}, |
| 5176 | - {0x00000030, 0x00020085}, |
| 5177 | - {0x00000034, 0x00000005}, |
| 5178 | - {0x00000040, 0x00000000}, |
| 5179 | - {0x00000044, 0x00000000}, |
| 5180 | - {0x00000048, 0x00000008}, |
| 5181 | - {0x0000004c, 0x00000010}, |
| 5182 | - {0x00000050, 0x00000000}, |
| 5183 | - {0x00001040, 0x002ffc0f}, |
| 5184 | - {0x00001044, 0x002ffc0f}, |
| 5185 | - {0x00001048, 0x002ffc0f}, |
| 5186 | - {0x0000104c, 0x002ffc0f}, |
| 5187 | - {0x00001050, 0x002ffc0f}, |
| 5188 | - {0x00001054, 0x002ffc0f}, |
| 5189 | - {0x00001058, 0x002ffc0f}, |
| 5190 | - {0x0000105c, 0x002ffc0f}, |
| 5191 | - {0x00001060, 0x002ffc0f}, |
| 5192 | - {0x00001064, 0x002ffc0f}, |
| 5193 | - {0x000010f0, 0x00000100}, |
| 5194 | - {0x00001270, 0x00000000}, |
| 5195 | - {0x000012b0, 0x00000000}, |
| 5196 | - {0x000012f0, 0x00000000}, |
| 5197 | - {0x0000143c, 0x00000000}, |
| 5198 | - {0x0000147c, 0x00000000}, |
| 5199 | - {0x00008000, 0x00000000}, |
| 5200 | - {0x00008004, 0x00000000}, |
| 5201 | - {0x00008008, 0x00000000}, |
| 5202 | - {0x0000800c, 0x00000000}, |
| 5203 | - {0x00008018, 0x00000000}, |
| 5204 | - {0x00008020, 0x00000000}, |
| 5205 | - {0x00008038, 0x00000000}, |
| 5206 | - {0x0000803c, 0x00000000}, |
| 5207 | - {0x00008040, 0x00000000}, |
| 5208 | - {0x00008044, 0x00000000}, |
| 5209 | - {0x00008048, 0x00000000}, |
| 5210 | - {0x0000804c, 0xffffffff}, |
| 5211 | - {0x00008054, 0x00000000}, |
| 5212 | - {0x00008058, 0x00000000}, |
| 5213 | - {0x0000805c, 0x000fc78f}, |
| 5214 | - {0x00008060, 0x0000000f}, |
| 5215 | - {0x00008064, 0x00000000}, |
| 5216 | - {0x00008070, 0x00000310}, |
| 5217 | - {0x00008074, 0x00000020}, |
| 5218 | - {0x00008078, 0x00000000}, |
| 5219 | - {0x0000809c, 0x0000000f}, |
| 5220 | - {0x000080a0, 0x00000000}, |
| 5221 | - {0x000080a4, 0x02ff0000}, |
| 5222 | - {0x000080a8, 0x0e070605}, |
| 5223 | - {0x000080ac, 0x0000000d}, |
| 5224 | - {0x000080b0, 0x00000000}, |
| 5225 | - {0x000080b4, 0x00000000}, |
| 5226 | - {0x000080b8, 0x00000000}, |
| 5227 | - {0x000080bc, 0x00000000}, |
| 5228 | - {0x000080c0, 0x2a800000}, |
| 5229 | - {0x000080c4, 0x06900168}, |
| 5230 | - {0x000080c8, 0x13881c20}, |
| 5231 | - {0x000080cc, 0x01f40000}, |
| 5232 | - {0x000080d0, 0x00252500}, |
| 5233 | - {0x000080d4, 0x00a00000}, |
| 5234 | - {0x000080d8, 0x00400000}, |
| 5235 | - {0x000080dc, 0x00000000}, |
| 5236 | - {0x000080e0, 0xffffffff}, |
| 5237 | - {0x000080e4, 0x0000ffff}, |
| 5238 | - {0x000080e8, 0x3f3f3f3f}, |
| 5239 | - {0x000080ec, 0x00000000}, |
| 5240 | - {0x000080f0, 0x00000000}, |
| 5241 | - {0x000080f4, 0x00000000}, |
| 5242 | - {0x000080fc, 0x00020000}, |
| 5243 | - {0x00008100, 0x00000000}, |
| 5244 | - {0x00008108, 0x00000052}, |
| 5245 | - {0x0000810c, 0x00000000}, |
| 5246 | - {0x00008110, 0x00000000}, |
| 5247 | - {0x00008114, 0x000007ff}, |
| 5248 | - {0x00008118, 0x000000aa}, |
| 5249 | - {0x0000811c, 0x00003210}, |
| 5250 | - {0x00008124, 0x00000000}, |
| 5251 | - {0x00008128, 0x00000000}, |
| 5252 | - {0x0000812c, 0x00000000}, |
| 5253 | - {0x00008130, 0x00000000}, |
| 5254 | - {0x00008134, 0x00000000}, |
| 5255 | - {0x00008138, 0x00000000}, |
| 5256 | - {0x0000813c, 0x0000ffff}, |
| 5257 | - {0x00008144, 0xffffffff}, |
| 5258 | - {0x00008168, 0x00000000}, |
| 5259 | - {0x0000816c, 0x00000000}, |
| 5260 | - {0x00008170, 0x18486200}, |
| 5261 | - {0x00008174, 0x33332210}, |
| 5262 | - {0x00008178, 0x00000000}, |
| 5263 | - {0x0000817c, 0x00020000}, |
| 5264 | - {0x000081c0, 0x00000000}, |
| 5265 | - {0x000081c4, 0x33332210}, |
| 5266 | - {0x000081c8, 0x00000000}, |
| 5267 | - {0x000081cc, 0x00000000}, |
| 5268 | - {0x000081d4, 0x00000000}, |
| 5269 | - {0x000081ec, 0x00000000}, |
| 5270 | - {0x000081f0, 0x00000000}, |
| 5271 | - {0x000081f4, 0x00000000}, |
| 5272 | - {0x000081f8, 0x00000000}, |
| 5273 | - {0x000081fc, 0x00000000}, |
| 5274 | - {0x00008240, 0x00100000}, |
| 5275 | - {0x00008244, 0x0010f424}, |
| 5276 | - {0x00008248, 0x00000800}, |
| 5277 | - {0x0000824c, 0x0001e848}, |
| 5278 | - {0x00008250, 0x00000000}, |
| 5279 | - {0x00008254, 0x00000000}, |
| 5280 | - {0x00008258, 0x00000000}, |
| 5281 | - {0x0000825c, 0x40000000}, |
| 5282 | - {0x00008260, 0x00080922}, |
| 5283 | - {0x00008264, 0x98a00010}, |
| 5284 | - {0x00008268, 0xffffffff}, |
| 5285 | - {0x0000826c, 0x0000ffff}, |
| 5286 | - {0x00008270, 0x00000000}, |
| 5287 | - {0x00008274, 0x40000000}, |
| 5288 | - {0x00008278, 0x003e4180}, |
| 5289 | - {0x0000827c, 0x00000004}, |
| 5290 | - {0x00008284, 0x0000002c}, |
| 5291 | - {0x00008288, 0x0000002c}, |
| 5292 | - {0x0000828c, 0x000000ff}, |
| 5293 | - {0x00008294, 0x00000000}, |
| 5294 | - {0x00008298, 0x00000000}, |
| 5295 | - {0x0000829c, 0x00000000}, |
| 5296 | - {0x00008300, 0x00000140}, |
| 5297 | - {0x00008314, 0x00000000}, |
| 5298 | - {0x0000831c, 0x0000010d}, |
| 5299 | - {0x00008328, 0x00000000}, |
| 5300 | - {0x0000832c, 0x00000007}, |
| 5301 | - {0x00008330, 0x00000302}, |
| 5302 | - {0x00008334, 0x00000700}, |
| 5303 | - {0x00008338, 0x00ff0000}, |
| 5304 | - {0x0000833c, 0x02400000}, |
| 5305 | - {0x00008340, 0x000107ff}, |
| 5306 | - {0x00008344, 0xaa48105b}, |
| 5307 | - {0x00008348, 0x008f0000}, |
| 5308 | - {0x0000835c, 0x00000000}, |
| 5309 | - {0x00008360, 0xffffffff}, |
| 5310 | - {0x00008364, 0xffffffff}, |
| 5311 | - {0x00008368, 0x00000000}, |
| 5312 | - {0x00008370, 0x00000000}, |
| 5313 | - {0x00008374, 0x000000ff}, |
| 5314 | - {0x00008378, 0x00000000}, |
| 5315 | - {0x0000837c, 0x00000000}, |
| 5316 | - {0x00008380, 0xffffffff}, |
| 5317 | - {0x00008384, 0xffffffff}, |
| 5318 | - {0x00008390, 0xffffffff}, |
| 5319 | - {0x00008394, 0xffffffff}, |
| 5320 | - {0x00008398, 0x00000000}, |
| 5321 | - {0x0000839c, 0x00000000}, |
| 5322 | - {0x000083a0, 0x00000000}, |
| 5323 | - {0x000083a4, 0x0000fa14}, |
| 5324 | - {0x000083a8, 0x000f0c00}, |
| 5325 | - {0x000083ac, 0x33332210}, |
| 5326 | - {0x000083b0, 0x33332210}, |
| 5327 | - {0x000083b4, 0x33332210}, |
| 5328 | - {0x000083b8, 0x33332210}, |
| 5329 | - {0x000083bc, 0x00000000}, |
| 5330 | - {0x000083c0, 0x00000000}, |
| 5331 | - {0x000083c4, 0x00000000}, |
| 5332 | - {0x000083c8, 0x00000000}, |
| 5333 | - {0x000083cc, 0x00000200}, |
| 5334 | - {0x000083d0, 0x000301ff}, |
| 5335 | -}; |
| 5336 | - |
| 5337 | -static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = { |
| 5338 | - /* Addr allmodes */ |
| 5339 | - {0x0000a000, 0x00010000}, |
| 5340 | - {0x0000a004, 0x00030002}, |
| 5341 | - {0x0000a008, 0x00050004}, |
| 5342 | - {0x0000a00c, 0x00810080}, |
| 5343 | - {0x0000a010, 0x00830082}, |
| 5344 | - {0x0000a014, 0x01810180}, |
| 5345 | - {0x0000a018, 0x01830182}, |
| 5346 | - {0x0000a01c, 0x01850184}, |
| 5347 | - {0x0000a020, 0x01890188}, |
| 5348 | - {0x0000a024, 0x018b018a}, |
| 5349 | - {0x0000a028, 0x018d018c}, |
| 5350 | - {0x0000a02c, 0x03820190}, |
| 5351 | - {0x0000a030, 0x03840383}, |
| 5352 | - {0x0000a034, 0x03880385}, |
| 5353 | - {0x0000a038, 0x038a0389}, |
| 5354 | - {0x0000a03c, 0x038c038b}, |
| 5355 | - {0x0000a040, 0x0390038d}, |
| 5356 | - {0x0000a044, 0x03920391}, |
| 5357 | - {0x0000a048, 0x03940393}, |
| 5358 | - {0x0000a04c, 0x03960395}, |
| 5359 | - {0x0000a050, 0x00000000}, |
| 5360 | - {0x0000a054, 0x00000000}, |
| 5361 | - {0x0000a058, 0x00000000}, |
| 5362 | - {0x0000a05c, 0x00000000}, |
| 5363 | - {0x0000a060, 0x00000000}, |
| 5364 | - {0x0000a064, 0x00000000}, |
| 5365 | - {0x0000a068, 0x00000000}, |
| 5366 | - {0x0000a06c, 0x00000000}, |
| 5367 | - {0x0000a070, 0x00000000}, |
| 5368 | - {0x0000a074, 0x00000000}, |
| 5369 | - {0x0000a078, 0x00000000}, |
| 5370 | - {0x0000a07c, 0x00000000}, |
| 5371 | - {0x0000a080, 0x29292929}, |
| 5372 | - {0x0000a084, 0x29292929}, |
| 5373 | - {0x0000a088, 0x29292929}, |
| 5374 | - {0x0000a08c, 0x29292929}, |
| 5375 | - {0x0000a090, 0x22292929}, |
| 5376 | - {0x0000a094, 0x1d1d2222}, |
| 5377 | - {0x0000a098, 0x0c111117}, |
| 5378 | - {0x0000a09c, 0x00030303}, |
| 5379 | - {0x0000a0a0, 0x00000000}, |
| 5380 | - {0x0000a0a4, 0x00000000}, |
| 5381 | - {0x0000a0a8, 0x00000000}, |
| 5382 | - {0x0000a0ac, 0x00000000}, |
| 5383 | - {0x0000a0b0, 0x00000000}, |
| 5384 | - {0x0000a0b4, 0x00000000}, |
| 5385 | - {0x0000a0b8, 0x00000000}, |
| 5386 | - {0x0000a0bc, 0x00000000}, |
| 5387 | - {0x0000a0c0, 0x001f0000}, |
| 5388 | - {0x0000a0c4, 0x01000101}, |
| 5389 | - {0x0000a0c8, 0x011e011f}, |
| 5390 | - {0x0000a0cc, 0x011c011d}, |
| 5391 | - {0x0000a0d0, 0x02030204}, |
| 5392 | - {0x0000a0d4, 0x02010202}, |
| 5393 | - {0x0000a0d8, 0x021f0200}, |
| 5394 | - {0x0000a0dc, 0x0302021e}, |
| 5395 | - {0x0000a0e0, 0x03000301}, |
| 5396 | - {0x0000a0e4, 0x031e031f}, |
| 5397 | - {0x0000a0e8, 0x0402031d}, |
| 5398 | - {0x0000a0ec, 0x04000401}, |
| 5399 | - {0x0000a0f0, 0x041e041f}, |
| 5400 | - {0x0000a0f4, 0x0502041d}, |
| 5401 | - {0x0000a0f8, 0x05000501}, |
| 5402 | - {0x0000a0fc, 0x051e051f}, |
| 5403 | - {0x0000a100, 0x06010602}, |
| 5404 | - {0x0000a104, 0x061f0600}, |
| 5405 | - {0x0000a108, 0x061d061e}, |
| 5406 | - {0x0000a10c, 0x07020703}, |
| 5407 | - {0x0000a110, 0x07000701}, |
| 5408 | - {0x0000a114, 0x00000000}, |
| 5409 | - {0x0000a118, 0x00000000}, |
| 5410 | - {0x0000a11c, 0x00000000}, |
| 5411 | - {0x0000a120, 0x00000000}, |
| 5412 | - {0x0000a124, 0x00000000}, |
| 5413 | - {0x0000a128, 0x00000000}, |
| 5414 | - {0x0000a12c, 0x00000000}, |
| 5415 | - {0x0000a130, 0x00000000}, |
| 5416 | - {0x0000a134, 0x00000000}, |
| 5417 | - {0x0000a138, 0x00000000}, |
| 5418 | - {0x0000a13c, 0x00000000}, |
| 5419 | - {0x0000a140, 0x001f0000}, |
| 5420 | - {0x0000a144, 0x01000101}, |
| 5421 | - {0x0000a148, 0x011e011f}, |
| 5422 | - {0x0000a14c, 0x011c011d}, |
| 5423 | - {0x0000a150, 0x02030204}, |
| 5424 | - {0x0000a154, 0x02010202}, |
| 5425 | - {0x0000a158, 0x021f0200}, |
| 5426 | - {0x0000a15c, 0x0302021e}, |
| 5427 | - {0x0000a160, 0x03000301}, |
| 5428 | - {0x0000a164, 0x031e031f}, |
| 5429 | - {0x0000a168, 0x0402031d}, |
| 5430 | - {0x0000a16c, 0x04000401}, |
| 5431 | - {0x0000a170, 0x041e041f}, |
| 5432 | - {0x0000a174, 0x0502041d}, |
| 5433 | - {0x0000a178, 0x05000501}, |
| 5434 | - {0x0000a17c, 0x051e051f}, |
| 5435 | - {0x0000a180, 0x06010602}, |
| 5436 | - {0x0000a184, 0x061f0600}, |
| 5437 | - {0x0000a188, 0x061d061e}, |
| 5438 | - {0x0000a18c, 0x07020703}, |
| 5439 | - {0x0000a190, 0x07000701}, |
| 5440 | - {0x0000a194, 0x00000000}, |
| 5441 | - {0x0000a198, 0x00000000}, |
| 5442 | - {0x0000a19c, 0x00000000}, |
| 5443 | - {0x0000a1a0, 0x00000000}, |
| 5444 | - {0x0000a1a4, 0x00000000}, |
| 5445 | - {0x0000a1a8, 0x00000000}, |
| 5446 | - {0x0000a1ac, 0x00000000}, |
| 5447 | - {0x0000a1b0, 0x00000000}, |
| 5448 | - {0x0000a1b4, 0x00000000}, |
| 5449 | - {0x0000a1b8, 0x00000000}, |
| 5450 | - {0x0000a1bc, 0x00000000}, |
| 5451 | - {0x0000a1c0, 0x00000000}, |
| 5452 | - {0x0000a1c4, 0x00000000}, |
| 5453 | - {0x0000a1c8, 0x00000000}, |
| 5454 | - {0x0000a1cc, 0x00000000}, |
| 5455 | - {0x0000a1d0, 0x00000000}, |
| 5456 | - {0x0000a1d4, 0x00000000}, |
| 5457 | - {0x0000a1d8, 0x00000000}, |
| 5458 | - {0x0000a1dc, 0x00000000}, |
| 5459 | - {0x0000a1e0, 0x00000000}, |
| 5460 | - {0x0000a1e4, 0x00000000}, |
| 5461 | - {0x0000a1e8, 0x00000000}, |
| 5462 | - {0x0000a1ec, 0x00000000}, |
| 5463 | - {0x0000a1f0, 0x00000396}, |
| 5464 | - {0x0000a1f4, 0x00000396}, |
| 5465 | - {0x0000a1f8, 0x00000396}, |
| 5466 | - {0x0000a1fc, 0x00000196}, |
| 5467 | - {0x0000b000, 0x00010000}, |
| 5468 | - {0x0000b004, 0x00030002}, |
| 5469 | - {0x0000b008, 0x00050004}, |
| 5470 | - {0x0000b00c, 0x00810080}, |
| 5471 | - {0x0000b010, 0x00830082}, |
| 5472 | - {0x0000b014, 0x01810180}, |
| 5473 | - {0x0000b018, 0x01830182}, |
| 5474 | - {0x0000b01c, 0x01850184}, |
| 5475 | - {0x0000b020, 0x02810280}, |
| 5476 | - {0x0000b024, 0x02830282}, |
| 5477 | - {0x0000b028, 0x02850284}, |
| 5478 | - {0x0000b02c, 0x02890288}, |
| 5479 | - {0x0000b030, 0x028b028a}, |
| 5480 | - {0x0000b034, 0x0388028c}, |
| 5481 | - {0x0000b038, 0x038a0389}, |
| 5482 | - {0x0000b03c, 0x038c038b}, |
| 5483 | - {0x0000b040, 0x0390038d}, |
| 5484 | - {0x0000b044, 0x03920391}, |
| 5485 | - {0x0000b048, 0x03940393}, |
| 5486 | - {0x0000b04c, 0x03960395}, |
| 5487 | - {0x0000b050, 0x00000000}, |
| 5488 | - {0x0000b054, 0x00000000}, |
| 5489 | - {0x0000b058, 0x00000000}, |
| 5490 | - {0x0000b05c, 0x00000000}, |
| 5491 | - {0x0000b060, 0x00000000}, |
| 5492 | - {0x0000b064, 0x00000000}, |
| 5493 | - {0x0000b068, 0x00000000}, |
| 5494 | - {0x0000b06c, 0x00000000}, |
| 5495 | - {0x0000b070, 0x00000000}, |
| 5496 | - {0x0000b074, 0x00000000}, |
| 5497 | - {0x0000b078, 0x00000000}, |
| 5498 | - {0x0000b07c, 0x00000000}, |
| 5499 | - {0x0000b080, 0x32323232}, |
| 5500 | - {0x0000b084, 0x2f2f3232}, |
| 5501 | - {0x0000b088, 0x23282a2d}, |
| 5502 | - {0x0000b08c, 0x1c1e2123}, |
| 5503 | - {0x0000b090, 0x14171919}, |
| 5504 | - {0x0000b094, 0x0e0e1214}, |
| 5505 | - {0x0000b098, 0x03050707}, |
| 5506 | - {0x0000b09c, 0x00030303}, |
| 5507 | - {0x0000b0a0, 0x00000000}, |
| 5508 | - {0x0000b0a4, 0x00000000}, |
| 5509 | - {0x0000b0a8, 0x00000000}, |
| 5510 | - {0x0000b0ac, 0x00000000}, |
| 5511 | - {0x0000b0b0, 0x00000000}, |
| 5512 | - {0x0000b0b4, 0x00000000}, |
| 5513 | - {0x0000b0b8, 0x00000000}, |
| 5514 | - {0x0000b0bc, 0x00000000}, |
| 5515 | - {0x0000b0c0, 0x003f0020}, |
| 5516 | - {0x0000b0c4, 0x00400041}, |
| 5517 | - {0x0000b0c8, 0x0140005f}, |
| 5518 | - {0x0000b0cc, 0x0160015f}, |
| 5519 | - {0x0000b0d0, 0x017e017f}, |
| 5520 | - {0x0000b0d4, 0x02410242}, |
| 5521 | - {0x0000b0d8, 0x025f0240}, |
| 5522 | - {0x0000b0dc, 0x027f0260}, |
| 5523 | - {0x0000b0e0, 0x0341027e}, |
| 5524 | - {0x0000b0e4, 0x035f0340}, |
| 5525 | - {0x0000b0e8, 0x037f0360}, |
| 5526 | - {0x0000b0ec, 0x04400441}, |
| 5527 | - {0x0000b0f0, 0x0460045f}, |
| 5528 | - {0x0000b0f4, 0x0541047f}, |
| 5529 | - {0x0000b0f8, 0x055f0540}, |
| 5530 | - {0x0000b0fc, 0x057f0560}, |
| 5531 | - {0x0000b100, 0x06400641}, |
| 5532 | - {0x0000b104, 0x0660065f}, |
| 5533 | - {0x0000b108, 0x067e067f}, |
| 5534 | - {0x0000b10c, 0x07410742}, |
| 5535 | - {0x0000b110, 0x075f0740}, |
| 5536 | - {0x0000b114, 0x077f0760}, |
| 5537 | - {0x0000b118, 0x07800781}, |
| 5538 | - {0x0000b11c, 0x07a0079f}, |
| 5539 | - {0x0000b120, 0x07c107bf}, |
| 5540 | - {0x0000b124, 0x000007c0}, |
| 5541 | - {0x0000b128, 0x00000000}, |
| 5542 | - {0x0000b12c, 0x00000000}, |
| 5543 | - {0x0000b130, 0x00000000}, |
| 5544 | - {0x0000b134, 0x00000000}, |
| 5545 | - {0x0000b138, 0x00000000}, |
| 5546 | - {0x0000b13c, 0x00000000}, |
| 5547 | - {0x0000b140, 0x003f0020}, |
| 5548 | - {0x0000b144, 0x00400041}, |
| 5549 | - {0x0000b148, 0x0140005f}, |
| 5550 | - {0x0000b14c, 0x0160015f}, |
| 5551 | - {0x0000b150, 0x017e017f}, |
| 5552 | - {0x0000b154, 0x02410242}, |
| 5553 | - {0x0000b158, 0x025f0240}, |
| 5554 | - {0x0000b15c, 0x027f0260}, |
| 5555 | - {0x0000b160, 0x0341027e}, |
| 5556 | - {0x0000b164, 0x035f0340}, |
| 5557 | - {0x0000b168, 0x037f0360}, |
| 5558 | - {0x0000b16c, 0x04400441}, |
| 5559 | - {0x0000b170, 0x0460045f}, |
| 5560 | - {0x0000b174, 0x0541047f}, |
| 5561 | - {0x0000b178, 0x055f0540}, |
| 5562 | - {0x0000b17c, 0x057f0560}, |
| 5563 | - {0x0000b180, 0x06400641}, |
| 5564 | - {0x0000b184, 0x0660065f}, |
| 5565 | - {0x0000b188, 0x067e067f}, |
| 5566 | - {0x0000b18c, 0x07410742}, |
| 5567 | - {0x0000b190, 0x075f0740}, |
| 5568 | - {0x0000b194, 0x077f0760}, |
| 5569 | - {0x0000b198, 0x07800781}, |
| 5570 | - {0x0000b19c, 0x07a0079f}, |
| 5571 | - {0x0000b1a0, 0x07c107bf}, |
| 5572 | - {0x0000b1a4, 0x000007c0}, |
| 5573 | - {0x0000b1a8, 0x00000000}, |
| 5574 | - {0x0000b1ac, 0x00000000}, |
| 5575 | - {0x0000b1b0, 0x00000000}, |
| 5576 | - {0x0000b1b4, 0x00000000}, |
| 5577 | - {0x0000b1b8, 0x00000000}, |
| 5578 | - {0x0000b1bc, 0x00000000}, |
| 5579 | - {0x0000b1c0, 0x00000000}, |
| 5580 | - {0x0000b1c4, 0x00000000}, |
| 5581 | - {0x0000b1c8, 0x00000000}, |
| 5582 | - {0x0000b1cc, 0x00000000}, |
| 5583 | - {0x0000b1d0, 0x00000000}, |
| 5584 | - {0x0000b1d4, 0x00000000}, |
| 5585 | - {0x0000b1d8, 0x00000000}, |
| 5586 | - {0x0000b1dc, 0x00000000}, |
| 5587 | - {0x0000b1e0, 0x00000000}, |
| 5588 | - {0x0000b1e4, 0x00000000}, |
| 5589 | - {0x0000b1e8, 0x00000000}, |
| 5590 | - {0x0000b1ec, 0x00000000}, |
| 5591 | - {0x0000b1f0, 0x00000396}, |
| 5592 | - {0x0000b1f4, 0x00000396}, |
| 5593 | - {0x0000b1f8, 0x00000396}, |
| 5594 | - {0x0000b1fc, 0x00000196}, |
| 5595 | -}; |
| 5596 | - |
| 5597 | -static const u32 ar9300_2p0_soc_preamble[][2] = { |
| 5598 | - /* Addr allmodes */ |
| 5599 | - {0x000040a4, 0x00a0c1c9}, |
| 5600 | - {0x00007008, 0x00000000}, |
| 5601 | - {0x00007020, 0x00000000}, |
| 5602 | - {0x00007034, 0x00000002}, |
| 5603 | - {0x00007038, 0x000004c2}, |
| 5604 | -}; |
| 5605 | - |
| 5606 | -static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0[][2] = { |
| 5607 | - /* Addr allmodes */ |
| 5608 | - {0x00004040, 0x08212e5e}, |
| 5609 | - {0x00004040, 0x0008003b}, |
| 5610 | - {0x00004044, 0x00000000}, |
| 5611 | -}; |
| 5612 | - |
| 5613 | -static const u32 ar9300PciePhy_clkreq_enable_L1_2p0[][2] = { |
| 5614 | - /* Addr allmodes */ |
| 5615 | - {0x00004040, 0x08253e5e}, |
| 5616 | - {0x00004040, 0x0008003b}, |
| 5617 | - {0x00004044, 0x00000000}, |
| 5618 | -}; |
| 5619 | - |
| 5620 | -static const u32 ar9300PciePhy_clkreq_disable_L1_2p0[][2] = { |
| 5621 | - /* Addr allmodes */ |
| 5622 | - {0x00004040, 0x08213e5e}, |
| 5623 | - {0x00004040, 0x0008003b}, |
| 5624 | - {0x00004044, 0x00000000}, |
| 5625 | -}; |
| 5626 | - |
| 5627 | -#endif /* INITVALS_9003_H */ |
| 5628 | --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c |
| 5629 | @@ -90,6 +90,8 @@ static bool ar9003_hw_get_isr(struct ath |
| 5630 | MAP_ISR_S2_CST); |
| 5631 | mask2 |= ((isr2 & AR_ISR_S2_TSFOOR) >> |
| 5632 | MAP_ISR_S2_TSFOOR); |
| 5633 | + mask2 |= ((isr2 & AR_ISR_S2_BB_WATCHDOG) >> |
| 5634 | + MAP_ISR_S2_BB_WATCHDOG); |
| 5635 | |
| 5636 | if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { |
| 5637 | REG_WRITE(ah, AR_ISR_S2, isr2); |
| 5638 | @@ -167,6 +169,9 @@ static bool ar9003_hw_get_isr(struct ath |
| 5639 | |
| 5640 | (void) REG_READ(ah, AR_ISR); |
| 5641 | } |
| 5642 | + |
| 5643 | + if (*masked & ATH9K_INT_BB_WATCHDOG) |
| 5644 | + ar9003_hw_bb_watchdog_read(ah); |
| 5645 | } |
| 5646 | |
| 5647 | if (sync_cause) { |
| 5648 | @@ -229,7 +234,8 @@ static void ar9003_hw_fill_txdesc(struct |
| 5649 | } |
| 5650 | |
| 5651 | static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds, |
| 5652 | - struct ath_tx_status *ts) |
| 5653 | + struct ath_tx_status *ts, |
| 5654 | + void *txs_desc) |
| 5655 | { |
| 5656 | struct ar9003_txs *ads; |
| 5657 | |
| 5658 | @@ -300,6 +306,7 @@ static int ar9003_hw_proc_txdesc(struct |
| 5659 | |
| 5660 | ts->tid = MS(ads->status8, AR_TxTid); |
| 5661 | |
| 5662 | + memcpy(txs_desc, ads, sizeof(*ads)); |
| 5663 | memset(ads, 0, sizeof(*ads)); |
| 5664 | |
| 5665 | return 0; |
| 5666 | --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.h |
| 5667 | @@ -47,6 +47,7 @@ |
| 5668 | #define MAP_ISR_S2_DTIMSYNC 7 |
| 5669 | #define MAP_ISR_S2_DTIM 7 |
| 5670 | #define MAP_ISR_S2_TSFOOR 4 |
| 5671 | +#define MAP_ISR_S2_BB_WATCHDOG 6 |
| 5672 | |
| 5673 | #define AR9003TXC_CONST(_ds) ((const struct ar9003_txc *) _ds) |
| 5674 | |
| 5675 | --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c |
| 5676 | @@ -1132,3 +1132,122 @@ void ar9003_hw_attach_phy_ops(struct ath |
| 5677 | priv_ops->do_getnf = ar9003_hw_do_getnf; |
| 5678 | priv_ops->loadnf = ar9003_hw_loadnf; |
| 5679 | } |
| 5680 | + |
| 5681 | +void ar9003_hw_bb_watchdog_config(struct ath_hw *ah) |
| 5682 | +{ |
| 5683 | + struct ath_common *common = ath9k_hw_common(ah); |
| 5684 | + u32 idle_tmo_ms = ah->bb_watchdog_timeout_ms; |
| 5685 | + u32 val, idle_count; |
| 5686 | + |
| 5687 | + if (!idle_tmo_ms) { |
| 5688 | + /* disable IRQ, disable chip-reset for BB panic */ |
| 5689 | + REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_2, |
| 5690 | + REG_READ(ah, AR_PHY_WATCHDOG_CTL_2) & |
| 5691 | + ~(AR_PHY_WATCHDOG_RST_ENABLE | |
| 5692 | + AR_PHY_WATCHDOG_IRQ_ENABLE)); |
| 5693 | + |
| 5694 | + /* disable watchdog in non-IDLE mode, disable in IDLE mode */ |
| 5695 | + REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_1, |
| 5696 | + REG_READ(ah, AR_PHY_WATCHDOG_CTL_1) & |
| 5697 | + ~(AR_PHY_WATCHDOG_NON_IDLE_ENABLE | |
| 5698 | + AR_PHY_WATCHDOG_IDLE_ENABLE)); |
| 5699 | + |
| 5700 | + ath_print(common, ATH_DBG_RESET, "Disabled BB Watchdog\n"); |
| 5701 | + return; |
| 5702 | + } |
| 5703 | + |
| 5704 | + /* enable IRQ, disable chip-reset for BB watchdog */ |
| 5705 | + val = REG_READ(ah, AR_PHY_WATCHDOG_CTL_2) & AR_PHY_WATCHDOG_CNTL2_MASK; |
| 5706 | + REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_2, |
| 5707 | + (val | AR_PHY_WATCHDOG_IRQ_ENABLE) & |
| 5708 | + ~AR_PHY_WATCHDOG_RST_ENABLE); |
| 5709 | + |
| 5710 | + /* bound limit to 10 secs */ |
| 5711 | + if (idle_tmo_ms > 10000) |
| 5712 | + idle_tmo_ms = 10000; |
| 5713 | + |
| 5714 | + /* |
| 5715 | + * The time unit for watchdog event is 2^15 44/88MHz cycles. |
| 5716 | + * |
| 5717 | + * For HT20 we have a time unit of 2^15/44 MHz = .74 ms per tick |
| 5718 | + * For HT40 we have a time unit of 2^15/88 MHz = .37 ms per tick |
| 5719 | + * |
| 5720 | + * Given we use fast clock now in 5 GHz, these time units should |
| 5721 | + * be common for both 2 GHz and 5 GHz. |
| 5722 | + */ |
| 5723 | + idle_count = (100 * idle_tmo_ms) / 74; |
| 5724 | + if (ah->curchan && IS_CHAN_HT40(ah->curchan)) |
| 5725 | + idle_count = (100 * idle_tmo_ms) / 37; |
| 5726 | + |
| 5727 | + /* |
| 5728 | + * enable watchdog in non-IDLE mode, disable in IDLE mode, |
| 5729 | + * set idle time-out. |
| 5730 | + */ |
| 5731 | + REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_1, |
| 5732 | + AR_PHY_WATCHDOG_NON_IDLE_ENABLE | |
| 5733 | + AR_PHY_WATCHDOG_IDLE_MASK | |
| 5734 | + (AR_PHY_WATCHDOG_NON_IDLE_MASK & (idle_count << 2))); |
| 5735 | + |
| 5736 | + ath_print(common, ATH_DBG_RESET, |
| 5737 | + "Enabled BB Watchdog timeout (%u ms)\n", |
| 5738 | + idle_tmo_ms); |
| 5739 | +} |
| 5740 | + |
| 5741 | +void ar9003_hw_bb_watchdog_read(struct ath_hw *ah) |
| 5742 | +{ |
| 5743 | + /* |
| 5744 | + * we want to avoid printing in ISR context so we save the |
| 5745 | + * watchdog status to be printed later in bottom half context. |
| 5746 | + */ |
| 5747 | + ah->bb_watchdog_last_status = REG_READ(ah, AR_PHY_WATCHDOG_STATUS); |
| 5748 | + |
| 5749 | + /* |
| 5750 | + * the watchdog timer should reset on status read but to be sure |
| 5751 | + * sure we write 0 to the watchdog status bit. |
| 5752 | + */ |
| 5753 | + REG_WRITE(ah, AR_PHY_WATCHDOG_STATUS, |
| 5754 | + ah->bb_watchdog_last_status & ~AR_PHY_WATCHDOG_STATUS_CLR); |
| 5755 | +} |
| 5756 | + |
| 5757 | +void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah) |
| 5758 | +{ |
| 5759 | + struct ath_common *common = ath9k_hw_common(ah); |
| 5760 | + u32 rxc_pcnt = 0, rxf_pcnt = 0, txf_pcnt = 0, status; |
| 5761 | + |
| 5762 | + if (likely(!(common->debug_mask & ATH_DBG_RESET))) |
| 5763 | + return; |
| 5764 | + |
| 5765 | + status = ah->bb_watchdog_last_status; |
| 5766 | + ath_print(common, ATH_DBG_RESET, |
| 5767 | + "\n==== BB update: BB status=0x%08x ====\n", status); |
| 5768 | + ath_print(common, ATH_DBG_RESET, |
| 5769 | + "** BB state: wd=%u det=%u rdar=%u rOFDM=%d " |
| 5770 | + "rCCK=%u tOFDM=%u tCCK=%u agc=%u src=%u **\n", |
| 5771 | + MS(status, AR_PHY_WATCHDOG_INFO), |
| 5772 | + MS(status, AR_PHY_WATCHDOG_DET_HANG), |
| 5773 | + MS(status, AR_PHY_WATCHDOG_RADAR_SM), |
| 5774 | + MS(status, AR_PHY_WATCHDOG_RX_OFDM_SM), |
| 5775 | + MS(status, AR_PHY_WATCHDOG_RX_CCK_SM), |
| 5776 | + MS(status, AR_PHY_WATCHDOG_TX_OFDM_SM), |
| 5777 | + MS(status, AR_PHY_WATCHDOG_TX_CCK_SM), |
| 5778 | + MS(status, AR_PHY_WATCHDOG_AGC_SM), |
| 5779 | + MS(status,AR_PHY_WATCHDOG_SRCH_SM)); |
| 5780 | + |
| 5781 | + ath_print(common, ATH_DBG_RESET, |
| 5782 | + "** BB WD cntl: cntl1=0x%08x cntl2=0x%08x **\n", |
| 5783 | + REG_READ(ah, AR_PHY_WATCHDOG_CTL_1), |
| 5784 | + REG_READ(ah, AR_PHY_WATCHDOG_CTL_2)); |
| 5785 | + ath_print(common, ATH_DBG_RESET, |
| 5786 | + "** BB mode: BB_gen_controls=0x%08x **\n", |
| 5787 | + REG_READ(ah, AR_PHY_GEN_CTRL)); |
| 5788 | + |
| 5789 | + if (ath9k_hw_GetMibCycleCountsPct(ah, &rxc_pcnt, &rxf_pcnt, &txf_pcnt)) |
| 5790 | + ath_print(common, ATH_DBG_RESET, |
| 5791 | + "** BB busy times: rx_clear=%d%%, " |
| 5792 | + "rx_frame=%d%%, tx_frame=%d%% **\n", |
| 5793 | + rxc_pcnt, rxf_pcnt, txf_pcnt); |
| 5794 | + |
| 5795 | + ath_print(common, ATH_DBG_RESET, |
| 5796 | + "==== BB update: done ====\n\n"); |
| 5797 | +} |
| 5798 | +EXPORT_SYMBOL(ar9003_hw_bb_watchdog_dbg_info); |
| 5799 | --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h |
| 5800 | @@ -483,10 +483,10 @@ |
| 5801 | #define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + 0x48c) |
| 5802 | #define AR_PHY_TX_IQCAL_CORR_COEFF_01_B0 (AR_SM_BASE + 0x450) |
| 5803 | |
| 5804 | -#define AR_PHY_PANIC_WD_STATUS (AR_SM_BASE + 0x5c0) |
| 5805 | -#define AR_PHY_PANIC_WD_CTL_1 (AR_SM_BASE + 0x5c4) |
| 5806 | -#define AR_PHY_PANIC_WD_CTL_2 (AR_SM_BASE + 0x5c8) |
| 5807 | -#define AR_PHY_BT_CTL (AR_SM_BASE + 0x5cc) |
| 5808 | +#define AR_PHY_WATCHDOG_STATUS (AR_SM_BASE + 0x5c0) |
| 5809 | +#define AR_PHY_WATCHDOG_CTL_1 (AR_SM_BASE + 0x5c4) |
| 5810 | +#define AR_PHY_WATCHDOG_CTL_2 (AR_SM_BASE + 0x5c8) |
| 5811 | +#define AR_PHY_WATCHDOG_CTL (AR_SM_BASE + 0x5cc) |
| 5812 | #define AR_PHY_ONLY_WARMRESET (AR_SM_BASE + 0x5d0) |
| 5813 | #define AR_PHY_ONLY_CTL (AR_SM_BASE + 0x5d4) |
| 5814 | #define AR_PHY_ECO_CTRL (AR_SM_BASE + 0x5dc) |
| 5815 | @@ -812,35 +812,35 @@ |
| 5816 | #define AR_PHY_CAL_MEAS_2_9300_10(_i) (AR_PHY_IQ_ADC_MEAS_2_B0_9300_10 + (AR_PHY_CHAIN_OFFSET * (_i))) |
| 5817 | #define AR_PHY_CAL_MEAS_3_9300_10(_i) (AR_PHY_IQ_ADC_MEAS_3_B0_9300_10 + (AR_PHY_CHAIN_OFFSET * (_i))) |
| 5818 | |
| 5819 | -#define AR_PHY_BB_PANIC_NON_IDLE_ENABLE 0x00000001 |
| 5820 | -#define AR_PHY_BB_PANIC_IDLE_ENABLE 0x00000002 |
| 5821 | -#define AR_PHY_BB_PANIC_IDLE_MASK 0xFFFF0000 |
| 5822 | -#define AR_PHY_BB_PANIC_NON_IDLE_MASK 0x0000FFFC |
| 5823 | - |
| 5824 | -#define AR_PHY_BB_PANIC_RST_ENABLE 0x00000002 |
| 5825 | -#define AR_PHY_BB_PANIC_IRQ_ENABLE 0x00000004 |
| 5826 | -#define AR_PHY_BB_PANIC_CNTL2_MASK 0xFFFFFFF9 |
| 5827 | - |
| 5828 | -#define AR_PHY_BB_WD_STATUS 0x00000007 |
| 5829 | -#define AR_PHY_BB_WD_STATUS_S 0 |
| 5830 | -#define AR_PHY_BB_WD_DET_HANG 0x00000008 |
| 5831 | -#define AR_PHY_BB_WD_DET_HANG_S 3 |
| 5832 | -#define AR_PHY_BB_WD_RADAR_SM 0x000000F0 |
| 5833 | -#define AR_PHY_BB_WD_RADAR_SM_S 4 |
| 5834 | -#define AR_PHY_BB_WD_RX_OFDM_SM 0x00000F00 |
| 5835 | -#define AR_PHY_BB_WD_RX_OFDM_SM_S 8 |
| 5836 | -#define AR_PHY_BB_WD_RX_CCK_SM 0x0000F000 |
| 5837 | -#define AR_PHY_BB_WD_RX_CCK_SM_S 12 |
| 5838 | -#define AR_PHY_BB_WD_TX_OFDM_SM 0x000F0000 |
| 5839 | -#define AR_PHY_BB_WD_TX_OFDM_SM_S 16 |
| 5840 | -#define AR_PHY_BB_WD_TX_CCK_SM 0x00F00000 |
| 5841 | -#define AR_PHY_BB_WD_TX_CCK_SM_S 20 |
| 5842 | -#define AR_PHY_BB_WD_AGC_SM 0x0F000000 |
| 5843 | -#define AR_PHY_BB_WD_AGC_SM_S 24 |
| 5844 | -#define AR_PHY_BB_WD_SRCH_SM 0xF0000000 |
| 5845 | -#define AR_PHY_BB_WD_SRCH_SM_S 28 |
| 5846 | +#define AR_PHY_WATCHDOG_NON_IDLE_ENABLE 0x00000001 |
| 5847 | +#define AR_PHY_WATCHDOG_IDLE_ENABLE 0x00000002 |
| 5848 | +#define AR_PHY_WATCHDOG_IDLE_MASK 0xFFFF0000 |
| 5849 | +#define AR_PHY_WATCHDOG_NON_IDLE_MASK 0x0000FFFC |
| 5850 | + |
| 5851 | +#define AR_PHY_WATCHDOG_RST_ENABLE 0x00000002 |
| 5852 | +#define AR_PHY_WATCHDOG_IRQ_ENABLE 0x00000004 |
| 5853 | +#define AR_PHY_WATCHDOG_CNTL2_MASK 0xFFFFFFF9 |
| 5854 | + |
| 5855 | +#define AR_PHY_WATCHDOG_INFO 0x00000007 |
| 5856 | +#define AR_PHY_WATCHDOG_INFO_S 0 |
| 5857 | +#define AR_PHY_WATCHDOG_DET_HANG 0x00000008 |
| 5858 | +#define AR_PHY_WATCHDOG_DET_HANG_S 3 |
| 5859 | +#define AR_PHY_WATCHDOG_RADAR_SM 0x000000F0 |
| 5860 | +#define AR_PHY_WATCHDOG_RADAR_SM_S 4 |
| 5861 | +#define AR_PHY_WATCHDOG_RX_OFDM_SM 0x00000F00 |
| 5862 | +#define AR_PHY_WATCHDOG_RX_OFDM_SM_S 8 |
| 5863 | +#define AR_PHY_WATCHDOG_RX_CCK_SM 0x0000F000 |
| 5864 | +#define AR_PHY_WATCHDOG_RX_CCK_SM_S 12 |
| 5865 | +#define AR_PHY_WATCHDOG_TX_OFDM_SM 0x000F0000 |
| 5866 | +#define AR_PHY_WATCHDOG_TX_OFDM_SM_S 16 |
| 5867 | +#define AR_PHY_WATCHDOG_TX_CCK_SM 0x00F00000 |
| 5868 | +#define AR_PHY_WATCHDOG_TX_CCK_SM_S 20 |
| 5869 | +#define AR_PHY_WATCHDOG_AGC_SM 0x0F000000 |
| 5870 | +#define AR_PHY_WATCHDOG_AGC_SM_S 24 |
| 5871 | +#define AR_PHY_WATCHDOG_SRCH_SM 0xF0000000 |
| 5872 | +#define AR_PHY_WATCHDOG_SRCH_SM_S 28 |
| 5873 | |
| 5874 | -#define AR_PHY_BB_WD_STATUS_CLR 0x00000008 |
| 5875 | +#define AR_PHY_WATCHDOG_STATUS_CLR 0x00000008 |
| 5876 | |
| 5877 | void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx); |
| 5878 | |
| 5879 | --- a/drivers/net/wireless/ath/ath9k/ath9k.h |
| 5880 | @@ -23,6 +23,7 @@ |
| 5881 | |
| 5882 | #include "debug.h" |
| 5883 | #include "common.h" |
| 5884 | +#include "pktlog.h" |
| 5885 | |
| 5886 | /* |
| 5887 | * Header for the ath9k.ko driver core *only* -- hw code nor any other driver |
| 5888 | @@ -206,6 +207,69 @@ struct ath_txq { |
| 5889 | u8 txq_tailidx; |
| 5890 | }; |
| 5891 | |
| 5892 | +struct ath_atx_ac { |
| 5893 | + int sched; |
| 5894 | + int qnum; |
| 5895 | + struct list_head list; |
| 5896 | + struct list_head tid_q; |
| 5897 | +}; |
| 5898 | + |
| 5899 | +struct ath_buf_state { |
| 5900 | + int bfs_nframes; |
| 5901 | + u16 bfs_al; |
| 5902 | + u16 bfs_frmlen; |
| 5903 | + int bfs_seqno; |
| 5904 | + int bfs_tidno; |
| 5905 | + int bfs_retries; |
| 5906 | + u8 bf_type; |
| 5907 | + u32 bfs_keyix; |
| 5908 | + enum ath9k_key_type bfs_keytype; |
| 5909 | +}; |
| 5910 | + |
| 5911 | +struct ath_buf { |
| 5912 | + struct list_head list; |
| 5913 | + struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or |
| 5914 | + an aggregate) */ |
| 5915 | + struct ath_buf *bf_next; /* next subframe in the aggregate */ |
| 5916 | + struct sk_buff *bf_mpdu; /* enclosing frame structure */ |
| 5917 | + void *bf_desc; /* virtual addr of desc */ |
| 5918 | + dma_addr_t bf_daddr; /* physical addr of desc */ |
| 5919 | + dma_addr_t bf_buf_addr; /* physical addr of data buffer */ |
| 5920 | + bool bf_stale; |
| 5921 | + bool bf_isnullfunc; |
| 5922 | + bool bf_tx_aborted; |
| 5923 | + u16 bf_flags; |
| 5924 | + struct ath_buf_state bf_state; |
| 5925 | + dma_addr_t bf_dmacontext; |
| 5926 | + struct ath_wiphy *aphy; |
| 5927 | +}; |
| 5928 | + |
| 5929 | +struct ath_atx_tid { |
| 5930 | + struct list_head list; |
| 5931 | + struct list_head buf_q; |
| 5932 | + struct ath_node *an; |
| 5933 | + struct ath_atx_ac *ac; |
| 5934 | + struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; |
| 5935 | + u16 seq_start; |
| 5936 | + u16 seq_next; |
| 5937 | + u16 baw_size; |
| 5938 | + int tidno; |
| 5939 | + int baw_head; /* first un-acked tx buffer */ |
| 5940 | + int baw_tail; /* next unused tx buffer slot */ |
| 5941 | + int sched; |
| 5942 | + int paused; |
| 5943 | + u8 state; |
| 5944 | +}; |
| 5945 | + |
| 5946 | +struct ath_node { |
| 5947 | + struct ath_common *common; |
| 5948 | + struct ath_atx_tid tid[WME_NUM_TID]; |
| 5949 | + struct ath_atx_ac ac[WME_NUM_AC]; |
| 5950 | + u16 maxampdu; |
| 5951 | + u8 mpdudensity; |
| 5952 | + int last_rssi; |
| 5953 | +}; |
| 5954 | + |
| 5955 | #define AGGR_CLEANUP BIT(1) |
| 5956 | #define AGGR_ADDBA_COMPLETE BIT(2) |
| 5957 | #define AGGR_ADDBA_PROGRESS BIT(3) |
| 5958 | @@ -446,6 +510,7 @@ void ath_deinit_leds(struct ath_softc *s |
| 5959 | #define SC_OP_TSF_RESET BIT(11) |
| 5960 | #define SC_OP_BT_PRIORITY_DETECTED BIT(12) |
| 5961 | #define SC_OP_BT_SCAN BIT(13) |
| 5962 | +#define SC_OP_PKTLOGGING BIT(14) |
| 5963 | |
| 5964 | /* Powersave flags */ |
| 5965 | #define PS_WAIT_FOR_BEACON BIT(0) |
| 5966 | @@ -523,6 +588,10 @@ struct ath_softc { |
| 5967 | #ifdef CONFIG_ATH9K_DEBUGFS |
| 5968 | struct ath9k_debug debug; |
| 5969 | #endif |
| 5970 | +#ifdef CONFIG_ATH9K_PKTLOG |
| 5971 | + struct ath_pktlog_debugfs pktlog; |
| 5972 | +#endif |
| 5973 | + bool is_pkt_logging; |
| 5974 | struct ath_beacon_config cur_beacon_conf; |
| 5975 | struct delayed_work tx_complete_work; |
| 5976 | struct ath_btcoex btcoex; |
| 5977 | --- a/drivers/net/wireless/ath/ath9k/beacon.c |
| 5978 | @@ -76,22 +76,13 @@ static void ath_beacon_setup(struct ath_ |
| 5979 | ds = bf->bf_desc; |
| 5980 | flags = ATH9K_TXDESC_NOACK; |
| 5981 | |
| 5982 | - if (((sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) || |
| 5983 | - (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) && |
| 5984 | - (ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) { |
| 5985 | - ds->ds_link = bf->bf_daddr; /* self-linked */ |
| 5986 | - flags |= ATH9K_TXDESC_VEOL; |
| 5987 | - /* Let hardware handle antenna switching. */ |
| 5988 | - antenna = 0; |
| 5989 | - } else { |
| 5990 | - ds->ds_link = 0; |
| 5991 | - /* |
| 5992 | - * Switch antenna every beacon. |
| 5993 | - * Should only switch every beacon period, not for every SWBA |
| 5994 | - * XXX assumes two antennae |
| 5995 | - */ |
| 5996 | - antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1); |
| 5997 | - } |
| 5998 | + ds->ds_link = 0; |
| 5999 | + /* |
| 6000 | + * Switch antenna every beacon. |
| 6001 | + * Should only switch every beacon period, not for every SWBA |
| 6002 | + * XXX assumes two antennae |
| 6003 | + */ |
| 6004 | + antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1); |
| 6005 | |
| 6006 | sband = &sc->sbands[common->hw->conf.channel->band]; |
| 6007 | rate = sband->bitrates[rateidx].hw_value; |
| 6008 | @@ -215,36 +206,6 @@ static struct ath_buf *ath_beacon_genera |
| 6009 | return bf; |
| 6010 | } |
| 6011 | |
| 6012 | -/* |
| 6013 | - * Startup beacon transmission for adhoc mode when they are sent entirely |
| 6014 | - * by the hardware using the self-linked descriptor + veol trick. |
| 6015 | -*/ |
| 6016 | -static void ath_beacon_start_adhoc(struct ath_softc *sc, |
| 6017 | - struct ieee80211_vif *vif) |
| 6018 | -{ |
| 6019 | - struct ath_hw *ah = sc->sc_ah; |
| 6020 | - struct ath_common *common = ath9k_hw_common(ah); |
| 6021 | - struct ath_buf *bf; |
| 6022 | - struct ath_vif *avp; |
| 6023 | - struct sk_buff *skb; |
| 6024 | - |
| 6025 | - avp = (void *)vif->drv_priv; |
| 6026 | - |
| 6027 | - if (avp->av_bcbuf == NULL) |
| 6028 | - return; |
| 6029 | - |
| 6030 | - bf = avp->av_bcbuf; |
| 6031 | - skb = bf->bf_mpdu; |
| 6032 | - |
| 6033 | - ath_beacon_setup(sc, avp, bf, 0); |
| 6034 | - |
| 6035 | - /* NB: caller is known to have already stopped tx dma */ |
| 6036 | - ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr); |
| 6037 | - ath9k_hw_txstart(ah, sc->beacon.beaconq); |
| 6038 | - ath_print(common, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n", |
| 6039 | - sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc); |
| 6040 | -} |
| 6041 | - |
| 6042 | int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) |
| 6043 | { |
| 6044 | struct ath_softc *sc = aphy->sc; |
| 6045 | @@ -265,7 +226,8 @@ int ath_beacon_alloc(struct ath_wiphy *a |
| 6046 | list_del(&avp->av_bcbuf->list); |
| 6047 | |
| 6048 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP || |
| 6049 | - !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) { |
| 6050 | + sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC || |
| 6051 | + sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT) { |
| 6052 | int slot; |
| 6053 | /* |
| 6054 | * Assign the vif to a beacon xmit slot. As |
| 6055 | @@ -274,17 +236,11 @@ int ath_beacon_alloc(struct ath_wiphy *a |
| 6056 | avp->av_bslot = 0; |
| 6057 | for (slot = 0; slot < ATH_BCBUF; slot++) |
| 6058 | if (sc->beacon.bslot[slot] == NULL) { |
| 6059 | - /* |
| 6060 | - * XXX hack, space out slots to better |
| 6061 | - * deal with misses |
| 6062 | - */ |
| 6063 | - if (slot+1 < ATH_BCBUF && |
| 6064 | - sc->beacon.bslot[slot+1] == NULL) { |
| 6065 | - avp->av_bslot = slot+1; |
| 6066 | - break; |
| 6067 | - } |
| 6068 | avp->av_bslot = slot; |
| 6069 | + |
| 6070 | /* NB: keep looking for a double slot */ |
| 6071 | + if (slot == 0 || !sc->beacon.bslot[slot-1]) |
| 6072 | + break; |
| 6073 | } |
| 6074 | BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL); |
| 6075 | sc->beacon.bslot[avp->av_bslot] = vif; |
| 6076 | @@ -721,8 +677,7 @@ static void ath_beacon_config_adhoc(stru |
| 6077 | * self-linked tx descriptor and let the hardware deal with things. |
| 6078 | */ |
| 6079 | intval |= ATH9K_BEACON_ENA; |
| 6080 | - if (!(ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) |
| 6081 | - ah->imask |= ATH9K_INT_SWBA; |
| 6082 | + ah->imask |= ATH9K_INT_SWBA; |
| 6083 | |
| 6084 | ath_beaconq_config(sc); |
| 6085 | |
| 6086 | @@ -732,10 +687,6 @@ static void ath_beacon_config_adhoc(stru |
| 6087 | ath9k_beacon_init(sc, nexttbtt, intval); |
| 6088 | sc->beacon.bmisscnt = 0; |
| 6089 | ath9k_hw_set_interrupts(ah, ah->imask); |
| 6090 | - |
| 6091 | - /* FIXME: Handle properly when vif is NULL */ |
| 6092 | - if (vif && ah->caps.hw_caps & ATH9K_HW_CAP_VEOL) |
| 6093 | - ath_beacon_start_adhoc(sc, vif); |
| 6094 | } |
| 6095 | |
| 6096 | void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif) |
| 6097 | --- a/drivers/net/wireless/ath/ath9k/common.c |
| 6098 | @@ -27,270 +27,6 @@ MODULE_AUTHOR("Atheros Communications"); |
| 6099 | MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards."); |
| 6100 | MODULE_LICENSE("Dual BSD/GPL"); |
| 6101 | |
| 6102 | -/* Common RX processing */ |
| 6103 | - |
| 6104 | -/* Assumes you've already done the endian to CPU conversion */ |
| 6105 | -static bool ath9k_rx_accept(struct ath_common *common, |
| 6106 | - struct sk_buff *skb, |
| 6107 | - struct ieee80211_rx_status *rxs, |
| 6108 | - struct ath_rx_status *rx_stats, |
| 6109 | - bool *decrypt_error) |
| 6110 | -{ |
| 6111 | - struct ath_hw *ah = common->ah; |
| 6112 | - struct ieee80211_hdr *hdr; |
| 6113 | - __le16 fc; |
| 6114 | - |
| 6115 | - hdr = (struct ieee80211_hdr *) skb->data; |
| 6116 | - fc = hdr->frame_control; |
| 6117 | - |
| 6118 | - if (!rx_stats->rs_datalen) |
| 6119 | - return false; |
| 6120 | - /* |
| 6121 | - * rs_status follows rs_datalen so if rs_datalen is too large |
| 6122 | - * we can take a hint that hardware corrupted it, so ignore |
| 6123 | - * those frames. |
| 6124 | - */ |
| 6125 | - if (rx_stats->rs_datalen > common->rx_bufsize) |
| 6126 | - return false; |
| 6127 | - |
| 6128 | - /* |
| 6129 | - * rs_more indicates chained descriptors which can be used |
| 6130 | - * to link buffers together for a sort of scatter-gather |
| 6131 | - * operation. |
| 6132 | - * reject the frame, we don't support scatter-gather yet and |
| 6133 | - * the frame is probably corrupt anyway |
| 6134 | - */ |
| 6135 | - if (rx_stats->rs_more) |
| 6136 | - return false; |
| 6137 | - |
| 6138 | - /* |
| 6139 | - * The rx_stats->rs_status will not be set until the end of the |
| 6140 | - * chained descriptors so it can be ignored if rs_more is set. The |
| 6141 | - * rs_more will be false at the last element of the chained |
| 6142 | - * descriptors. |
| 6143 | - */ |
| 6144 | - if (rx_stats->rs_status != 0) { |
| 6145 | - if (rx_stats->rs_status & ATH9K_RXERR_CRC) |
| 6146 | - rxs->flag |= RX_FLAG_FAILED_FCS_CRC; |
| 6147 | - if (rx_stats->rs_status & ATH9K_RXERR_PHY) |
| 6148 | - return false; |
| 6149 | - |
| 6150 | - if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) { |
| 6151 | - *decrypt_error = true; |
| 6152 | - } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) { |
| 6153 | - if (ieee80211_is_ctl(fc)) |
| 6154 | - /* |
| 6155 | - * Sometimes, we get invalid |
| 6156 | - * MIC failures on valid control frames. |
| 6157 | - * Remove these mic errors. |
| 6158 | - */ |
| 6159 | - rx_stats->rs_status &= ~ATH9K_RXERR_MIC; |
| 6160 | - else |
| 6161 | - rxs->flag |= RX_FLAG_MMIC_ERROR; |
| 6162 | - } |
| 6163 | - /* |
| 6164 | - * Reject error frames with the exception of |
| 6165 | - * decryption and MIC failures. For monitor mode, |
| 6166 | - * we also ignore the CRC error. |
| 6167 | - */ |
| 6168 | - if (ah->opmode == NL80211_IFTYPE_MONITOR) { |
| 6169 | - if (rx_stats->rs_status & |
| 6170 | - ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | |
| 6171 | - ATH9K_RXERR_CRC)) |
| 6172 | - return false; |
| 6173 | - } else { |
| 6174 | - if (rx_stats->rs_status & |
| 6175 | - ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { |
| 6176 | - return false; |
| 6177 | - } |
| 6178 | - } |
| 6179 | - } |
| 6180 | - return true; |
| 6181 | -} |
| 6182 | - |
| 6183 | -static int ath9k_process_rate(struct ath_common *common, |
| 6184 | - struct ieee80211_hw *hw, |
| 6185 | - struct ath_rx_status *rx_stats, |
| 6186 | - struct ieee80211_rx_status *rxs, |
| 6187 | - struct sk_buff *skb) |
| 6188 | -{ |
| 6189 | - struct ieee80211_supported_band *sband; |
| 6190 | - enum ieee80211_band band; |
| 6191 | - unsigned int i = 0; |
| 6192 | - |
| 6193 | - band = hw->conf.channel->band; |
| 6194 | - sband = hw->wiphy->bands[band]; |
| 6195 | - |
| 6196 | - if (rx_stats->rs_rate & 0x80) { |
| 6197 | - /* HT rate */ |
| 6198 | - rxs->flag |= RX_FLAG_HT; |
| 6199 | - if (rx_stats->rs_flags & ATH9K_RX_2040) |
| 6200 | - rxs->flag |= RX_FLAG_40MHZ; |
| 6201 | - if (rx_stats->rs_flags & ATH9K_RX_GI) |
| 6202 | - rxs->flag |= RX_FLAG_SHORT_GI; |
| 6203 | - rxs->rate_idx = rx_stats->rs_rate & 0x7f; |
| 6204 | - return 0; |
| 6205 | - } |
| 6206 | - |
| 6207 | - for (i = 0; i < sband->n_bitrates; i++) { |
| 6208 | - if (sband->bitrates[i].hw_value == rx_stats->rs_rate) { |
| 6209 | - rxs->rate_idx = i; |
| 6210 | - return 0; |
| 6211 | - } |
| 6212 | - if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) { |
| 6213 | - rxs->flag |= RX_FLAG_SHORTPRE; |
| 6214 | - rxs->rate_idx = i; |
| 6215 | - return 0; |
| 6216 | - } |
| 6217 | - } |
| 6218 | - |
| 6219 | - /* |
| 6220 | - * No valid hardware bitrate found -- we should not get here |
| 6221 | - * because hardware has already validated this frame as OK. |
| 6222 | - */ |
| 6223 | - ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected " |
| 6224 | - "0x%02x using 1 Mbit\n", rx_stats->rs_rate); |
| 6225 | - if ((common->debug_mask & ATH_DBG_XMIT)) |
| 6226 | - print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len); |
| 6227 | - |
| 6228 | - return -EINVAL; |
| 6229 | -} |
| 6230 | - |
| 6231 | -static void ath9k_process_rssi(struct ath_common *common, |
| 6232 | - struct ieee80211_hw *hw, |
| 6233 | - struct sk_buff *skb, |
| 6234 | - struct ath_rx_status *rx_stats) |
| 6235 | -{ |
| 6236 | - struct ath_hw *ah = common->ah; |
| 6237 | - struct ieee80211_sta *sta; |
| 6238 | - struct ieee80211_hdr *hdr; |
| 6239 | - struct ath_node *an; |
| 6240 | - int last_rssi = ATH_RSSI_DUMMY_MARKER; |
| 6241 | - __le16 fc; |
| 6242 | - |
| 6243 | - hdr = (struct ieee80211_hdr *)skb->data; |
| 6244 | - fc = hdr->frame_control; |
| 6245 | - |
| 6246 | - rcu_read_lock(); |
| 6247 | - /* |
| 6248 | - * XXX: use ieee80211_find_sta! This requires quite a bit of work |
| 6249 | - * under the current ath9k virtual wiphy implementation as we have |
| 6250 | - * no way of tying a vif to wiphy. Typically vifs are attached to |
| 6251 | - * at least one sdata of a wiphy on mac80211 but with ath9k virtual |
| 6252 | - * wiphy you'd have to iterate over every wiphy and each sdata. |
| 6253 | - */ |
| 6254 | - sta = ieee80211_find_sta_by_hw(hw, hdr->addr2); |
| 6255 | - if (sta) { |
| 6256 | - an = (struct ath_node *) sta->drv_priv; |
| 6257 | - if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && |
| 6258 | - !rx_stats->rs_moreaggr) |
| 6259 | - ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi); |
| 6260 | - last_rssi = an->last_rssi; |
| 6261 | - } |
| 6262 | - rcu_read_unlock(); |
| 6263 | - |
| 6264 | - if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) |
| 6265 | - rx_stats->rs_rssi = ATH_EP_RND(last_rssi, |
| 6266 | - ATH_RSSI_EP_MULTIPLIER); |
| 6267 | - if (rx_stats->rs_rssi < 0) |
| 6268 | - rx_stats->rs_rssi = 0; |
| 6269 | - |
| 6270 | - /* Update Beacon RSSI, this is used by ANI. */ |
| 6271 | - if (ieee80211_is_beacon(fc)) |
| 6272 | - ah->stats.avgbrssi = rx_stats->rs_rssi; |
| 6273 | -} |
| 6274 | - |
| 6275 | -/* |
| 6276 | - * For Decrypt or Demic errors, we only mark packet status here and always push |
| 6277 | - * up the frame up to let mac80211 handle the actual error case, be it no |
| 6278 | - * decryption key or real decryption error. This let us keep statistics there. |
| 6279 | - */ |
| 6280 | -int ath9k_cmn_rx_skb_preprocess(struct ath_common *common, |
| 6281 | - struct ieee80211_hw *hw, |
| 6282 | - struct sk_buff *skb, |
| 6283 | - struct ath_rx_status *rx_stats, |
| 6284 | - struct ieee80211_rx_status *rx_status, |
| 6285 | - bool *decrypt_error) |
| 6286 | -{ |
| 6287 | - struct ath_hw *ah = common->ah; |
| 6288 | - |
| 6289 | - memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); |
| 6290 | - |
| 6291 | - /* |
| 6292 | - * everything but the rate is checked here, the rate check is done |
| 6293 | - * separately to avoid doing two lookups for a rate for each frame. |
| 6294 | - */ |
| 6295 | - if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error)) |
| 6296 | - return -EINVAL; |
| 6297 | - |
| 6298 | - ath9k_process_rssi(common, hw, skb, rx_stats); |
| 6299 | - |
| 6300 | - if (ath9k_process_rate(common, hw, rx_stats, rx_status, skb)) |
| 6301 | - return -EINVAL; |
| 6302 | - |
| 6303 | - rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp); |
| 6304 | - rx_status->band = hw->conf.channel->band; |
| 6305 | - rx_status->freq = hw->conf.channel->center_freq; |
| 6306 | - rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi; |
| 6307 | - rx_status->antenna = rx_stats->rs_antenna; |
| 6308 | - rx_status->flag |= RX_FLAG_TSFT; |
| 6309 | - |
| 6310 | - return 0; |
| 6311 | -} |
| 6312 | -EXPORT_SYMBOL(ath9k_cmn_rx_skb_preprocess); |
| 6313 | - |
| 6314 | -void ath9k_cmn_rx_skb_postprocess(struct ath_common *common, |
| 6315 | - struct sk_buff *skb, |
| 6316 | - struct ath_rx_status *rx_stats, |
| 6317 | - struct ieee80211_rx_status *rxs, |
| 6318 | - bool decrypt_error) |
| 6319 | -{ |
| 6320 | - struct ath_hw *ah = common->ah; |
| 6321 | - struct ieee80211_hdr *hdr; |
| 6322 | - int hdrlen, padpos, padsize; |
| 6323 | - u8 keyix; |
| 6324 | - __le16 fc; |
| 6325 | - |
| 6326 | - /* see if any padding is done by the hw and remove it */ |
| 6327 | - hdr = (struct ieee80211_hdr *) skb->data; |
| 6328 | - hdrlen = ieee80211_get_hdrlen_from_skb(skb); |
| 6329 | - fc = hdr->frame_control; |
| 6330 | - padpos = ath9k_cmn_padpos(hdr->frame_control); |
| 6331 | - |
| 6332 | - /* The MAC header is padded to have 32-bit boundary if the |
| 6333 | - * packet payload is non-zero. The general calculation for |
| 6334 | - * padsize would take into account odd header lengths: |
| 6335 | - * padsize = (4 - padpos % 4) % 4; However, since only |
| 6336 | - * even-length headers are used, padding can only be 0 or 2 |
| 6337 | - * bytes and we can optimize this a bit. In addition, we must |
| 6338 | - * not try to remove padding from short control frames that do |
| 6339 | - * not have payload. */ |
| 6340 | - padsize = padpos & 3; |
| 6341 | - if (padsize && skb->len>=padpos+padsize+FCS_LEN) { |
| 6342 | - memmove(skb->data + padsize, skb->data, padpos); |
| 6343 | - skb_pull(skb, padsize); |
| 6344 | - } |
| 6345 | - |
| 6346 | - keyix = rx_stats->rs_keyix; |
| 6347 | - |
| 6348 | - if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error && |
| 6349 | - ieee80211_has_protected(fc)) { |
| 6350 | - rxs->flag |= RX_FLAG_DECRYPTED; |
| 6351 | - } else if (ieee80211_has_protected(fc) |
| 6352 | - && !decrypt_error && skb->len >= hdrlen + 4) { |
| 6353 | - keyix = skb->data[hdrlen + 3] >> 6; |
| 6354 | - |
| 6355 | - if (test_bit(keyix, common->keymap)) |
| 6356 | - rxs->flag |= RX_FLAG_DECRYPTED; |
| 6357 | - } |
| 6358 | - if (ah->sw_mgmt_crypto && |
| 6359 | - (rxs->flag & RX_FLAG_DECRYPTED) && |
| 6360 | - ieee80211_is_mgmt(fc)) |
| 6361 | - /* Use software decrypt for management frames. */ |
| 6362 | - rxs->flag &= ~RX_FLAG_DECRYPTED; |
| 6363 | -} |
| 6364 | -EXPORT_SYMBOL(ath9k_cmn_rx_skb_postprocess); |
| 6365 | - |
| 6366 | int ath9k_cmn_padpos(__le16 frame_control) |
| 6367 | { |
| 6368 | int padpos = 24; |
| 6369 | --- a/drivers/net/wireless/ath/ath9k/common.h |
| 6370 | @@ -52,82 +52,6 @@ |
| 6371 | #define ATH_EP_RND(x, mul) \ |
| 6372 | ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) |
| 6373 | |
| 6374 | -struct ath_atx_ac { |
| 6375 | - int sched; |
| 6376 | - int qnum; |
| 6377 | - struct list_head list; |
| 6378 | - struct list_head tid_q; |
| 6379 | -}; |
| 6380 | - |
| 6381 | -struct ath_buf_state { |
| 6382 | - int bfs_nframes; |
| 6383 | - u16 bfs_al; |
| 6384 | - u16 bfs_frmlen; |
| 6385 | - int bfs_seqno; |
| 6386 | - int bfs_tidno; |
| 6387 | - int bfs_retries; |
| 6388 | - u8 bf_type; |
| 6389 | - u32 bfs_keyix; |
| 6390 | - enum ath9k_key_type bfs_keytype; |
| 6391 | -}; |
| 6392 | - |
| 6393 | -struct ath_buf { |
| 6394 | - struct list_head list; |
| 6395 | - struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or |
| 6396 | - an aggregate) */ |
| 6397 | - struct ath_buf *bf_next; /* next subframe in the aggregate */ |
| 6398 | - struct sk_buff *bf_mpdu; /* enclosing frame structure */ |
| 6399 | - void *bf_desc; /* virtual addr of desc */ |
| 6400 | - dma_addr_t bf_daddr; /* physical addr of desc */ |
| 6401 | - dma_addr_t bf_buf_addr; /* physical addr of data buffer */ |
| 6402 | - bool bf_stale; |
| 6403 | - bool bf_isnullfunc; |
| 6404 | - bool bf_tx_aborted; |
| 6405 | - u16 bf_flags; |
| 6406 | - struct ath_buf_state bf_state; |
| 6407 | - dma_addr_t bf_dmacontext; |
| 6408 | - struct ath_wiphy *aphy; |
| 6409 | -}; |
| 6410 | - |
| 6411 | -struct ath_atx_tid { |
| 6412 | - struct list_head list; |
| 6413 | - struct list_head buf_q; |
| 6414 | - struct ath_node *an; |
| 6415 | - struct ath_atx_ac *ac; |
| 6416 | - struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; |
| 6417 | - u16 seq_start; |
| 6418 | - u16 seq_next; |
| 6419 | - u16 baw_size; |
| 6420 | - int tidno; |
| 6421 | - int baw_head; /* first un-acked tx buffer */ |
| 6422 | - int baw_tail; /* next unused tx buffer slot */ |
| 6423 | - int sched; |
| 6424 | - int paused; |
| 6425 | - u8 state; |
| 6426 | -}; |
| 6427 | - |
| 6428 | -struct ath_node { |
| 6429 | - struct ath_common *common; |
| 6430 | - struct ath_atx_tid tid[WME_NUM_TID]; |
| 6431 | - struct ath_atx_ac ac[WME_NUM_AC]; |
| 6432 | - u16 maxampdu; |
| 6433 | - u8 mpdudensity; |
| 6434 | - int last_rssi; |
| 6435 | -}; |
| 6436 | - |
| 6437 | -int ath9k_cmn_rx_skb_preprocess(struct ath_common *common, |
| 6438 | - struct ieee80211_hw *hw, |
| 6439 | - struct sk_buff *skb, |
| 6440 | - struct ath_rx_status *rx_stats, |
| 6441 | - struct ieee80211_rx_status *rx_status, |
| 6442 | - bool *decrypt_error); |
| 6443 | - |
| 6444 | -void ath9k_cmn_rx_skb_postprocess(struct ath_common *common, |
| 6445 | - struct sk_buff *skb, |
| 6446 | - struct ath_rx_status *rx_stats, |
| 6447 | - struct ieee80211_rx_status *rxs, |
| 6448 | - bool decrypt_error); |
| 6449 | - |
| 6450 | int ath9k_cmn_padpos(__le16 frame_control); |
| 6451 | int ath9k_cmn_get_hw_crypto_keytype(struct sk_buff *skb); |
| 6452 | void ath9k_cmn_update_ichannel(struct ieee80211_hw *hw, |
| 6453 | --- a/drivers/net/wireless/ath/ath9k/debug.c |
| 6454 | @@ -15,6 +15,7 @@ |
| 6455 | */ |
| 6456 | |
| 6457 | #include <linux/slab.h> |
| 6458 | +#include <linux/vmalloc.h> |
| 6459 | #include <asm/unaligned.h> |
| 6460 | |
| 6461 | #include "ath9k.h" |
| 6462 | @@ -32,6 +33,19 @@ static int ath9k_debugfs_open(struct ino |
| 6463 | return 0; |
| 6464 | } |
| 6465 | |
| 6466 | +static ssize_t ath9k_debugfs_read_buf(struct file *file, char __user *user_buf, |
| 6467 | + size_t count, loff_t *ppos) |
| 6468 | +{ |
| 6469 | + u8 *buf = file->private_data; |
| 6470 | + return simple_read_from_buffer(user_buf, count, ppos, buf, strlen(buf)); |
| 6471 | +} |
| 6472 | + |
| 6473 | +static int ath9k_debugfs_release_buf (struct inode *inode, struct file *file) |
| 6474 | +{ |
| 6475 | + vfree(file->private_data); |
| 6476 | + return 0; |
| 6477 | +} |
| 6478 | + |
| 6479 | #ifdef CONFIG_ATH_DEBUG |
| 6480 | |
| 6481 | static ssize_t read_file_debug(struct file *file, char __user *user_buf, |
| 6482 | @@ -269,6 +283,8 @@ void ath_debug_stat_interrupt(struct ath |
| 6483 | sc->debug.stats.istats.rxlp++; |
| 6484 | if (status & ATH9K_INT_RXHP) |
| 6485 | sc->debug.stats.istats.rxhp++; |
| 6486 | + if (status & ATH9K_INT_BB_WATCHDOG) |
| 6487 | + sc->debug.stats.istats.bb_watchdog++; |
| 6488 | } else { |
| 6489 | if (status & ATH9K_INT_RX) |
| 6490 | sc->debug.stats.istats.rxok++; |
| 6491 | @@ -319,6 +335,9 @@ static ssize_t read_file_interrupt(struc |
| 6492 | "%8s: %10u\n", "RXLP", sc->debug.stats.istats.rxlp); |
| 6493 | len += snprintf(buf + len, sizeof(buf) - len, |
| 6494 | "%8s: %10u\n", "RXHP", sc->debug.stats.istats.rxhp); |
| 6495 | + len += snprintf(buf + len, sizeof(buf) - len, |
| 6496 | + "%8s: %10u\n", "WATCHDOG", |
| 6497 | + sc->debug.stats.istats.bb_watchdog); |
| 6498 | } else { |
| 6499 | len += snprintf(buf + len, sizeof(buf) - len, |
| 6500 | "%8s: %10u\n", "RX", sc->debug.stats.istats.rxok); |
| 6501 | @@ -871,7 +890,38 @@ static ssize_t write_file_regval(struct |
| 6502 | static const struct file_operations fops_regval = { |
| 6503 | .read = read_file_regval, |
| 6504 | .write = write_file_regval, |
| 6505 | - .open = ath9k_debugfs_open, |
| 6506 | +}; |
| 6507 | + |
| 6508 | +#define REGDUMP_LINE_SIZE 20 |
| 6509 | +#define REGDUMP_NUM_REGS (0x16bd4 / 4 + 1) |
| 6510 | +#define REGDUMP_DATA_LEN (REGDUMP_NUM_REGS * REGDUMP_LINE_SIZE + 1) |
| 6511 | + |
| 6512 | +static int open_file_regdump(struct inode *inode, struct file *file) |
| 6513 | +{ |
| 6514 | + struct ath_softc *sc = inode->i_private; |
| 6515 | + unsigned int len = 0; |
| 6516 | + u8 *buf; |
| 6517 | + int i; |
| 6518 | + |
| 6519 | + buf = vmalloc(REGDUMP_DATA_LEN); |
| 6520 | + if (!buf) |
| 6521 | + return -ENOMEM; |
| 6522 | + |
| 6523 | + ath9k_ps_wakeup(sc); |
| 6524 | + for (i = 0; i < REGDUMP_NUM_REGS; i++) |
| 6525 | + len += scnprintf(buf + len, REGDUMP_DATA_LEN - len, |
| 6526 | + "0x%06x 0x%08x\n", i << 2, REG_READ(sc->sc_ah, i << 2)); |
| 6527 | + ath9k_ps_restore(sc); |
| 6528 | + |
| 6529 | + file->private_data = buf; |
| 6530 | + |
| 6531 | + return 0; |
| 6532 | +} |
| 6533 | + |
| 6534 | +static const struct file_operations fops_regdump = { |
| 6535 | + .open = open_file_regdump, |
| 6536 | + .read = ath9k_debugfs_read_buf, |
| 6537 | + .release = ath9k_debugfs_release_buf, |
| 6538 | .owner = THIS_MODULE |
| 6539 | }; |
| 6540 | |
| 6541 | @@ -935,6 +985,16 @@ int ath9k_init_debug(struct ath_hw *ah) |
| 6542 | goto err; |
| 6543 | |
| 6544 | sc->debug.regidx = 0; |
| 6545 | + |
| 6546 | + if (!debugfs_create_file("regdump", S_IRUSR, sc->debug.debugfs_phy, |
| 6547 | + sc, &fops_regdump)) |
| 6548 | + goto err; |
| 6549 | + |
| 6550 | +#ifdef CONFIG_ATH9K_PKTLOG |
| 6551 | + if (ath9k_init_pktlog(sc) != 0) |
| 6552 | + goto err; |
| 6553 | +#endif |
| 6554 | + |
| 6555 | return 0; |
| 6556 | err: |
| 6557 | ath9k_exit_debug(ah); |
| 6558 | @@ -946,6 +1006,10 @@ void ath9k_exit_debug(struct ath_hw *ah) |
| 6559 | struct ath_common *common = ath9k_hw_common(ah); |
| 6560 | struct ath_softc *sc = (struct ath_softc *) common->priv; |
| 6561 | |
| 6562 | +#ifdef CONFIG_ATH9K_PKTLOG |
| 6563 | + ath9k_deinit_pktlog(sc); |
| 6564 | +#endif |
| 6565 | + debugfs_remove(sc->debug.debugfs_regdump); |
| 6566 | debugfs_remove_recursive(sc->debug.debugfs_phy); |
| 6567 | } |
| 6568 | |
| 6569 | --- a/drivers/net/wireless/ath/ath9k/debug.h |
| 6570 | @@ -53,6 +53,7 @@ struct ath_buf; |
| 6571 | * @cabend: RX End of CAB traffic |
| 6572 | * @dtimsync: DTIM sync lossage |
| 6573 | * @dtim: RX Beacon with DTIM |
| 6574 | + * @bb_watchdog: Baseband watchdog |
| 6575 | */ |
| 6576 | struct ath_interrupt_stats { |
| 6577 | u32 total; |
| 6578 | @@ -76,6 +77,7 @@ struct ath_interrupt_stats { |
| 6579 | u32 cabend; |
| 6580 | u32 dtimsync; |
| 6581 | u32 dtim; |
| 6582 | + u32 bb_watchdog; |
| 6583 | }; |
| 6584 | |
| 6585 | struct ath_rc_stats { |
| 6586 | @@ -154,6 +156,14 @@ struct ath_stats { |
| 6587 | struct ath9k_debug { |
| 6588 | struct dentry *debugfs_phy; |
| 6589 | u32 regidx; |
| 6590 | + struct dentry *debugfs_debug; |
| 6591 | + struct dentry *debugfs_dma; |
| 6592 | + struct dentry *debugfs_interrupt; |
| 6593 | + struct dentry *debugfs_rcstat; |
| 6594 | + struct dentry *debugfs_wiphy; |
| 6595 | + struct dentry *debugfs_xmit; |
| 6596 | + struct dentry *debugfs_recv; |
| 6597 | + struct dentry *debugfs_regdump; |
| 6598 | struct ath_stats stats; |
| 6599 | }; |
| 6600 | |
| 6601 | --- a/drivers/net/wireless/ath/ath9k/hw-ops.h |
| 6602 | @@ -67,9 +67,10 @@ static inline void ath9k_hw_filltxdesc(s |
| 6603 | } |
| 6604 | |
| 6605 | static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, |
| 6606 | - struct ath_tx_status *ts) |
| 6607 | + struct ath_tx_status *ts, |
| 6608 | + void *txs_desc) |
| 6609 | { |
| 6610 | - return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts); |
| 6611 | + return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts, txs_desc); |
| 6612 | } |
| 6613 | |
| 6614 | static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds, |
| 6615 | --- a/drivers/net/wireless/ath/ath9k/hw.c |
| 6616 | @@ -395,12 +395,6 @@ static void ath9k_hw_init_config(struct |
| 6617 | ah->config.rx_intr_mitigation = true; |
| 6618 | |
| 6619 | /* |
| 6620 | - * Tx IQ Calibration (ah->config.tx_iq_calibration) is only |
| 6621 | - * used by AR9003, but it is showing reliability issues. |
| 6622 | - * It will take a while to fix so this is currently disabled. |
| 6623 | - */ |
| 6624 | - |
| 6625 | - /* |
| 6626 | * We need this for PCI devices only (Cardbus, PCI, miniPCI) |
| 6627 | * _and_ if on non-uniprocessor systems (Multiprocessor/HT). |
| 6628 | * This means we use it for all AR5416 devices, and the few |
| 6629 | @@ -639,6 +633,7 @@ static int __ath9k_hw_init(struct ath_hw |
| 6630 | ar9003_hw_set_nf_limits(ah); |
| 6631 | |
| 6632 | ath9k_init_nfcal_hist_buffer(ah); |
| 6633 | + ah->bb_watchdog_timeout_ms = 25; |
| 6634 | |
| 6635 | common->state = ATH_HW_INITIALIZED; |
| 6636 | |
| 6637 | @@ -1453,6 +1448,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st |
| 6638 | if (AR_SREV_9300_20_OR_LATER(ah)) { |
| 6639 | ath9k_hw_loadnf(ah, curchan); |
| 6640 | ath9k_hw_start_nfcal(ah); |
| 6641 | + ar9003_hw_bb_watchdog_config(ah); |
| 6642 | } |
| 6643 | |
| 6644 | return 0; |
| 6645 | @@ -2177,7 +2173,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw |
| 6646 | pCap->hw_caps |= ATH9K_HW_CAP_RFSILENT; |
| 6647 | } |
| 6648 | #endif |
| 6649 | - if (AR_SREV_9271(ah)) |
| 6650 | + if (AR_SREV_9271(ah) || AR_SREV_9300_20_OR_LATER(ah)) |
| 6651 | pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP; |
| 6652 | else |
| 6653 | pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP; |
| 6654 | @@ -2244,6 +2240,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw |
| 6655 | if (AR_SREV_9300_20_OR_LATER(ah)) |
| 6656 | pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED; |
| 6657 | |
| 6658 | + if (AR_SREV_9287_10_OR_LATER(ah)) |
| 6659 | + pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; |
| 6660 | + |
| 6661 | return 0; |
| 6662 | } |
| 6663 | |
| 6664 | @@ -2478,7 +2477,7 @@ void ath9k_hw_setrxfilter(struct ath_hw |
| 6665 | phybits |= AR_PHY_ERR_RADAR; |
| 6666 | if (bits & ATH9K_RX_FILTER_PHYERR) |
| 6667 | phybits |= AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING; |
| 6668 | - REG_WRITE(ah, AR_PHY_ERR, phybits); |
| 6669 | + REG_WRITE(ah, AR_PHY_ERR, 0xffffffff); |
| 6670 | |
| 6671 | if (phybits) |
| 6672 | REG_WRITE(ah, AR_RXCFG, |
| 6673 | --- a/drivers/net/wireless/ath/ath9k/hw.h |
| 6674 | @@ -199,6 +199,7 @@ enum ath9k_hw_caps { |
| 6675 | ATH9K_HW_CAP_RAC_SUPPORTED = BIT(18), |
| 6676 | ATH9K_HW_CAP_LDPC = BIT(19), |
| 6677 | ATH9K_HW_CAP_FASTCLOCK = BIT(20), |
| 6678 | + ATH9K_HW_CAP_SGI_20 = BIT(21), |
| 6679 | }; |
| 6680 | |
| 6681 | enum ath9k_capability_type { |
| 6682 | @@ -262,7 +263,6 @@ struct ath9k_ops_config { |
| 6683 | #define AR_BASE_FREQ_5GHZ 4900 |
| 6684 | #define AR_SPUR_FEEQ_BOUND_HT40 19 |
| 6685 | #define AR_SPUR_FEEQ_BOUND_HT20 10 |
| 6686 | - bool tx_iq_calibration; /* Only available for >= AR9003 */ |
| 6687 | int spurmode; |
| 6688 | u16 spurchans[AR_EEPROM_MODAL_SPURS][2]; |
| 6689 | u8 max_txtrig_level; |
| 6690 | @@ -279,6 +279,7 @@ enum ath9k_int { |
| 6691 | ATH9K_INT_TX = 0x00000040, |
| 6692 | ATH9K_INT_TXDESC = 0x00000080, |
| 6693 | ATH9K_INT_TIM_TIMER = 0x00000100, |
| 6694 | + ATH9K_INT_BB_WATCHDOG = 0x00000400, |
| 6695 | ATH9K_INT_TXURN = 0x00000800, |
| 6696 | ATH9K_INT_MIB = 0x00001000, |
| 6697 | ATH9K_INT_RXPHY = 0x00004000, |
| 6698 | @@ -581,7 +582,7 @@ struct ath_hw_ops { |
| 6699 | const void *ds0, dma_addr_t buf_addr, |
| 6700 | unsigned int qcu); |
| 6701 | int (*proc_txdesc)(struct ath_hw *ah, void *ds, |
| 6702 | - struct ath_tx_status *ts); |
| 6703 | + struct ath_tx_status *ts, void* txs_desc); |
| 6704 | void (*set11n_txdesc)(struct ath_hw *ah, void *ds, |
| 6705 | u32 pktLen, enum ath9k_pkt_type type, |
| 6706 | u32 txPower, u32 keyIx, |
| 6707 | @@ -789,6 +790,11 @@ struct ath_hw { |
| 6708 | u32 ts_paddr_end; |
| 6709 | u16 ts_tail; |
| 6710 | u8 ts_size; |
| 6711 | + |
| 6712 | + u32 bb_watchdog_last_status; |
| 6713 | + u32 bb_watchdog_timeout_ms; /* in ms, 0 to disable */ |
| 6714 | + |
| 6715 | + bool is_pkt_logging; |
| 6716 | }; |
| 6717 | |
| 6718 | static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah) |
| 6719 | @@ -910,10 +916,13 @@ void ar9002_hw_enable_async_fifo(struct |
| 6720 | void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah); |
| 6721 | |
| 6722 | /* |
| 6723 | - * Code specifric to AR9003, we stuff these here to avoid callbacks |
| 6724 | + * Code specific to AR9003, we stuff these here to avoid callbacks |
| 6725 | * for older families |
| 6726 | */ |
| 6727 | void ar9003_hw_set_nf_limits(struct ath_hw *ah); |
| 6728 | +void ar9003_hw_bb_watchdog_config(struct ath_hw *ah); |
| 6729 | +void ar9003_hw_bb_watchdog_read(struct ath_hw *ah); |
| 6730 | +void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah); |
| 6731 | |
| 6732 | /* Hardware family op attach helpers */ |
| 6733 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah); |
| 6734 | --- a/drivers/net/wireless/ath/ath9k/init.c |
| 6735 | @@ -209,6 +209,9 @@ static void setup_ht_cap(struct ath_soft |
| 6736 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_LDPC) |
| 6737 | ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING; |
| 6738 | |
| 6739 | + if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) |
| 6740 | + ht_info->cap |= IEEE80211_HT_CAP_SGI_20; |
| 6741 | + |
| 6742 | ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
| 6743 | ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; |
| 6744 | |
| 6745 | --- a/drivers/net/wireless/ath/ath9k/main.c |
| 6746 | @@ -521,6 +521,12 @@ irqreturn_t ath_isr(int irq, void *dev) |
| 6747 | !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) |
| 6748 | goto chip_reset; |
| 6749 | |
| 6750 | + if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && |
| 6751 | + (status & ATH9K_INT_BB_WATCHDOG)) { |
| 6752 | + ar9003_hw_bb_watchdog_dbg_info(ah); |
| 6753 | + goto chip_reset; |
| 6754 | + } |
| 6755 | + |
| 6756 | if (status & ATH9K_INT_SWBA) |
| 6757 | tasklet_schedule(&sc->bcon_tasklet); |
| 6758 | |
| 6759 | @@ -1196,7 +1202,9 @@ static int ath9k_start(struct ieee80211_ |
| 6760 | ATH9K_INT_GLOBAL; |
| 6761 | |
| 6762 | if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) |
| 6763 | - ah->imask |= ATH9K_INT_RXHP | ATH9K_INT_RXLP; |
| 6764 | + ah->imask |= ATH9K_INT_RXHP | |
| 6765 | + ATH9K_INT_RXLP | |
| 6766 | + ATH9K_INT_BB_WATCHDOG; |
| 6767 | else |
| 6768 | ah->imask |= ATH9K_INT_RX; |
| 6769 | |
| 6770 | @@ -1275,7 +1283,8 @@ static int ath9k_tx(struct ieee80211_hw |
| 6771 | * completed and if needed, also for RX of buffered frames. |
| 6772 | */ |
| 6773 | ath9k_ps_wakeup(sc); |
| 6774 | - ath9k_hw_setrxabort(sc->sc_ah, 0); |
| 6775 | + if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) |
| 6776 | + ath9k_hw_setrxabort(sc->sc_ah, 0); |
| 6777 | if (ieee80211_is_pspoll(hdr->frame_control)) { |
| 6778 | ath_print(common, ATH_DBG_PS, |
| 6779 | "Sending PS-Poll to pick a buffered frame\n"); |
| 6780 | @@ -1539,8 +1548,8 @@ void ath9k_enable_ps(struct ath_softc *s |
| 6781 | ah->imask |= ATH9K_INT_TIM_TIMER; |
| 6782 | ath9k_hw_set_interrupts(ah, ah->imask); |
| 6783 | } |
| 6784 | + ath9k_hw_setrxabort(ah, 1); |
| 6785 | } |
| 6786 | - ath9k_hw_setrxabort(ah, 1); |
| 6787 | } |
| 6788 | |
| 6789 | static int ath9k_config(struct ieee80211_hw *hw, u32 changed) |
| 6790 | --- a/drivers/net/wireless/ath/ath9k/pci.c |
| 6791 | @@ -29,6 +29,7 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_i |
| 6792 | { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */ |
| 6793 | { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */ |
| 6794 | { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */ |
| 6795 | + { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */ |
| 6796 | { 0 } |
| 6797 | }; |
| 6798 | |
| 6799 | --- /dev/null |
| 6800 | @@ -0,0 +1,783 @@ |
| 6801 | + |
| 6802 | +#include <linux/vmalloc.h> |
| 6803 | +#include <linux/highmem.h> |
| 6804 | +#include "ath9k.h" |
| 6805 | + |
| 6806 | +static int ath9k_debugfs_open(struct inode *inode, struct file *file) |
| 6807 | +{ |
| 6808 | + file->private_data = inode->i_private; |
| 6809 | + return 0; |
| 6810 | +} |
| 6811 | + |
| 6812 | +static struct page *pktlog_virt_to_logical(void *addr) |
| 6813 | +{ |
| 6814 | + struct page *page; |
| 6815 | + unsigned long vpage = 0UL; |
| 6816 | + |
| 6817 | + page = vmalloc_to_page(addr); |
| 6818 | + if (page) { |
| 6819 | + vpage = (unsigned long) page_address(page); |
| 6820 | + vpage |= ((unsigned long) addr & (PAGE_SIZE - 1)); |
| 6821 | + } |
| 6822 | + return virt_to_page((void *) vpage); |
| 6823 | +} |
| 6824 | + |
| 6825 | +static void ath_pktlog_release(struct ath_pktlog *pktlog) |
| 6826 | +{ |
| 6827 | + unsigned long page_cnt, vaddr; |
| 6828 | + struct page *page; |
| 6829 | + |
| 6830 | + page_cnt = |
| 6831 | + ((sizeof(*(pktlog->pktlog_buf)) + |
| 6832 | + pktlog->pktlog_buf_size) / PAGE_SIZE) + 1; |
| 6833 | + |
| 6834 | + for (vaddr = (unsigned long) (pktlog->pktlog_buf); vaddr < |
| 6835 | + (unsigned long) (pktlog->pktlog_buf) + |
| 6836 | + (page_cnt * PAGE_SIZE); |
| 6837 | + vaddr += PAGE_SIZE) { |
| 6838 | + page = pktlog_virt_to_logical((void *) vaddr); |
| 6839 | + clear_bit(PG_reserved, &page->flags); |
| 6840 | + } |
| 6841 | + |
| 6842 | + vfree(pktlog->pktlog_buf); |
| 6843 | + pktlog->pktlog_buf = NULL; |
| 6844 | +} |
| 6845 | + |
| 6846 | +static int ath_alloc_pktlog_buf(struct ath_softc *sc) |
| 6847 | +{ |
| 6848 | + u32 page_cnt; |
| 6849 | + unsigned long vaddr; |
| 6850 | + struct page *page; |
| 6851 | + struct ath_pktlog *pktlog = &sc->pktlog.pktlog; |
| 6852 | + |
| 6853 | + if (pktlog->pktlog_buf_size == 0) |
| 6854 | + return -EINVAL; |
| 6855 | + |
| 6856 | + page_cnt = (sizeof(*(pktlog->pktlog_buf)) + |
| 6857 | + pktlog->pktlog_buf_size) / PAGE_SIZE; |
| 6858 | + |
| 6859 | + pktlog->pktlog_buf = vmalloc((page_cnt + 2) * PAGE_SIZE); |
| 6860 | + if (pktlog->pktlog_buf == NULL) { |
| 6861 | + printk(KERN_ERR "Failed to allocate memory for pktlog"); |
| 6862 | + return -ENOMEM; |
| 6863 | + } |
| 6864 | + |
| 6865 | + pktlog->pktlog_buf = (struct ath_pktlog_buf *) |
| 6866 | + (((unsigned long) |
| 6867 | + (pktlog->pktlog_buf) |
| 6868 | + + PAGE_SIZE - 1) & PAGE_MASK); |
| 6869 | + |
| 6870 | + for (vaddr = (unsigned long) (pktlog->pktlog_buf); |
| 6871 | + vaddr < ((unsigned long) (pktlog->pktlog_buf) |
| 6872 | + + (page_cnt * PAGE_SIZE)); vaddr += PAGE_SIZE) { |
| 6873 | + page = pktlog_virt_to_logical((void *)vaddr); |
| 6874 | + set_bit(PG_reserved, &page->flags); |
| 6875 | + } |
| 6876 | + |
| 6877 | + return 0; |
| 6878 | +} |
| 6879 | + |
| 6880 | +static void ath_init_pktlog_buf(struct ath_pktlog *pktlog) |
| 6881 | +{ |
| 6882 | + pktlog->pktlog_buf->bufhdr.magic_num = PKTLOG_MAGIC_NUM; |
| 6883 | + pktlog->pktlog_buf->bufhdr.version = CUR_PKTLOG_VER; |
| 6884 | + pktlog->pktlog_buf->rd_offset = -1; |
| 6885 | + pktlog->pktlog_buf->wr_offset = 0; |
| 6886 | + if (pktlog->pktlog_filter == 0) |
| 6887 | + pktlog->pktlog_filter = ATH_PKTLOG_FILTER_DEFAULT; |
| 6888 | +} |
| 6889 | + |
| 6890 | +static char *ath_pktlog_getbuf(struct ath_pktlog *pl_info, |
| 6891 | + u16 log_type, size_t log_size, |
| 6892 | + u32 flags) |
| 6893 | +{ |
| 6894 | + struct ath_pktlog_buf *log_buf; |
| 6895 | + struct ath_pktlog_hdr *log_hdr; |
| 6896 | + int32_t cur_wr_offset, buf_size; |
| 6897 | + char *log_ptr; |
| 6898 | + |
| 6899 | + log_buf = pl_info->pktlog_buf; |
| 6900 | + buf_size = pl_info->pktlog_buf_size; |
| 6901 | + |
| 6902 | + spin_lock_bh(&pl_info->pktlog_lock); |
| 6903 | + cur_wr_offset = log_buf->wr_offset; |
| 6904 | + /* Move read offset to the next entry if there is a buffer overlap */ |
| 6905 | + if (log_buf->rd_offset >= 0) { |
| 6906 | + if ((cur_wr_offset <= log_buf->rd_offset) |
| 6907 | + && (cur_wr_offset + |
| 6908 | + sizeof(struct ath_pktlog_hdr)) > |
| 6909 | + log_buf->rd_offset) |
| 6910 | + PKTLOG_MOV_RD_IDX(log_buf->rd_offset, log_buf, |
| 6911 | + buf_size); |
| 6912 | + } else { |
| 6913 | + log_buf->rd_offset = cur_wr_offset; |
| 6914 | + } |
| 6915 | + |
| 6916 | + log_hdr = |
| 6917 | + (struct ath_pktlog_hdr *) (log_buf->log_data + cur_wr_offset); |
| 6918 | + log_hdr->log_type = log_type; |
| 6919 | + log_hdr->flags = flags; |
| 6920 | + log_hdr->timestamp = jiffies; |
| 6921 | + log_hdr->size = (u16) log_size; |
| 6922 | + |
| 6923 | + cur_wr_offset += sizeof(*log_hdr); |
| 6924 | + |
| 6925 | + if ((buf_size - cur_wr_offset) < log_size) { |
| 6926 | + while ((cur_wr_offset <= log_buf->rd_offset) |
| 6927 | + && (log_buf->rd_offset < buf_size)) |
| 6928 | + PKTLOG_MOV_RD_IDX(log_buf->rd_offset, log_buf, |
| 6929 | + buf_size); |
| 6930 | + cur_wr_offset = 0; |
| 6931 | + } |
| 6932 | + |
| 6933 | + while ((cur_wr_offset <= log_buf->rd_offset) |
| 6934 | + && (cur_wr_offset + log_size) > log_buf->rd_offset) |
| 6935 | + PKTLOG_MOV_RD_IDX(log_buf->rd_offset, log_buf, buf_size); |
| 6936 | + |
| 6937 | + log_ptr = &(log_buf->log_data[cur_wr_offset]); |
| 6938 | + |
| 6939 | + cur_wr_offset += log_hdr->size; |
| 6940 | + |
| 6941 | + log_buf->wr_offset = |
| 6942 | + ((buf_size - cur_wr_offset) >= |
| 6943 | + sizeof(struct ath_pktlog_hdr)) ? cur_wr_offset : 0; |
| 6944 | + spin_unlock_bh(&pl_info->pktlog_lock); |
| 6945 | + |
| 6946 | + return log_ptr; |
| 6947 | +} |
| 6948 | + |
| 6949 | +static void ath9k_hw_get_descinfo(struct ath_hw *ah, struct ath_desc_info *desc_info) |
| 6950 | +{ |
| 6951 | + desc_info->txctl_numwords = TXCTL_NUMWORDS(ah); |
| 6952 | + desc_info->txctl_offset = TXCTL_OFFSET(ah); |
| 6953 | + desc_info->txstatus_numwords = TXSTATUS_NUMWORDS(ah); |
| 6954 | + desc_info->txstatus_offset = TXSTATUS_OFFSET(ah); |
| 6955 | + |
| 6956 | + desc_info->rxctl_numwords = RXCTL_NUMWORDS(ah); |
| 6957 | + desc_info->rxctl_offset = RXCTL_OFFSET(ah); |
| 6958 | + desc_info->rxstatus_numwords = RXSTATUS_NUMWORDS(ah); |
| 6959 | + desc_info->rxstatus_offset = RXSTATUS_OFFSET(ah); |
| 6960 | +} |
| 6961 | + |
| 6962 | +static int pktlog_pgfault(struct vm_area_struct *vma, struct vm_fault *vmf) |
| 6963 | +{ |
| 6964 | + unsigned long address = (unsigned long) vmf->virtual_address; |
| 6965 | + |
| 6966 | + if (address == 0UL) |
| 6967 | + return VM_FAULT_NOPAGE; |
| 6968 | + |
| 6969 | + if (vmf->pgoff > vma->vm_end) |
| 6970 | + return VM_FAULT_SIGBUS; |
| 6971 | + |
| 6972 | + get_page(virt_to_page(address)); |
| 6973 | + vmf->page = virt_to_page(address); |
| 6974 | + return VM_FAULT_MINOR; |
| 6975 | +} |
| 6976 | + |
| 6977 | +static struct vm_operations_struct pktlog_vmops = { |
| 6978 | + .fault = pktlog_pgfault |
| 6979 | +}; |
| 6980 | + |
| 6981 | +static int ath_pktlog_mmap(struct file *file, struct vm_area_struct *vma) |
| 6982 | +{ |
| 6983 | + struct ath_softc *sc = file->private_data; |
| 6984 | + |
| 6985 | + /* entire buffer should be mapped */ |
| 6986 | + if (vma->vm_pgoff != 0) |
| 6987 | + return -EINVAL; |
| 6988 | + |
| 6989 | + if (!sc->pktlog.pktlog.pktlog_buf) { |
| 6990 | + printk(KERN_ERR "Can't allocate pktlog buf"); |
| 6991 | + return -ENOMEM; |
| 6992 | + } |
| 6993 | + |
| 6994 | + vma->vm_flags |= VM_LOCKED; |
| 6995 | + vma->vm_ops = &pktlog_vmops; |
| 6996 | + |
| 6997 | + return 0; |
| 6998 | +} |
| 6999 | + |
| 7000 | +static ssize_t ath_pktlog_read(struct file *file, char __user *userbuf, |
| 7001 | + size_t count, loff_t *ppos) |
| 7002 | +{ |
| 7003 | + size_t bufhdr_size; |
| 7004 | + size_t nbytes = 0, ret_val = 0; |
| 7005 | + int rem_len; |
| 7006 | + int start_offset, end_offset; |
| 7007 | + int fold_offset, ppos_data, cur_rd_offset; |
| 7008 | + struct ath_softc *sc = file->private_data; |
| 7009 | + struct ath_pktlog *pktlog_info = &sc->pktlog.pktlog; |
| 7010 | + struct ath_pktlog_buf *log_buf = pktlog_info->pktlog_buf; |
| 7011 | + |
| 7012 | + if (log_buf == NULL) |
| 7013 | + return 0; |
| 7014 | + |
| 7015 | + bufhdr_size = sizeof(log_buf->bufhdr); |
| 7016 | + |
| 7017 | + /* copy valid log entries from circular buffer into user space */ |
| 7018 | + rem_len = count; |
| 7019 | + |
| 7020 | + nbytes = 0; |
| 7021 | + |
| 7022 | + if (*ppos < bufhdr_size) { |
| 7023 | + nbytes = min((int) (bufhdr_size - *ppos), rem_len); |
| 7024 | + if (copy_to_user(userbuf, |
| 7025 | + ((char *) &log_buf->bufhdr) + *ppos, nbytes)) |
| 7026 | + return -EFAULT; |
| 7027 | + rem_len -= nbytes; |
| 7028 | + ret_val += nbytes; |
| 7029 | + } |
| 7030 | + |
| 7031 | + start_offset = log_buf->rd_offset; |
| 7032 | + |
| 7033 | + if ((rem_len == 0) || (start_offset < 0)) |
| 7034 | + goto read_done; |
| 7035 | + |
| 7036 | + fold_offset = -1; |
| 7037 | + cur_rd_offset = start_offset; |
| 7038 | + |
| 7039 | + /* Find the last offset and fold-offset if the buffer is folded */ |
| 7040 | + do { |
| 7041 | + struct ath_pktlog_hdr *log_hdr; |
| 7042 | + int log_data_offset; |
| 7043 | + |
| 7044 | + log_hdr = |
| 7045 | + (struct ath_pktlog_hdr *) (log_buf->log_data + |
| 7046 | + cur_rd_offset); |
| 7047 | + |
| 7048 | + log_data_offset = cur_rd_offset + sizeof(struct ath_pktlog_hdr); |
| 7049 | + |
| 7050 | + if ((fold_offset == -1) |
| 7051 | + && ((pktlog_info->pktlog_buf_size - |
| 7052 | + log_data_offset) <= log_hdr->size)) |
| 7053 | + fold_offset = log_data_offset - 1; |
| 7054 | + |
| 7055 | + PKTLOG_MOV_RD_IDX(cur_rd_offset, log_buf, |
| 7056 | + pktlog_info->pktlog_buf_size); |
| 7057 | + |
| 7058 | + if ((fold_offset == -1) && (cur_rd_offset == 0) |
| 7059 | + && (cur_rd_offset != log_buf->wr_offset)) |
| 7060 | + fold_offset = log_data_offset + log_hdr->size - 1; |
| 7061 | + |
| 7062 | + end_offset = log_data_offset + log_hdr->size - 1; |
| 7063 | + } while (cur_rd_offset != log_buf->wr_offset); |
| 7064 | + |
| 7065 | + ppos_data = *ppos + ret_val - bufhdr_size + start_offset; |
| 7066 | + |
| 7067 | + if (fold_offset == -1) { |
| 7068 | + if (ppos_data > end_offset) |
| 7069 | + goto read_done; |
| 7070 | + |
| 7071 | + nbytes = min(rem_len, end_offset - ppos_data + 1); |
| 7072 | + if (copy_to_user(userbuf + ret_val, |
| 7073 | + log_buf->log_data + ppos_data, nbytes)) |
| 7074 | + return -EFAULT; |
| 7075 | + ret_val += nbytes; |
| 7076 | + rem_len -= nbytes; |
| 7077 | + } else { |
| 7078 | + if (ppos_data <= fold_offset) { |
| 7079 | + nbytes = min(rem_len, fold_offset - ppos_data + 1); |
| 7080 | + if (copy_to_user(userbuf + ret_val, |
| 7081 | + log_buf->log_data + ppos_data, |
| 7082 | + nbytes)) |
| 7083 | + return -EFAULT; |
| 7084 | + ret_val += nbytes; |
| 7085 | + rem_len -= nbytes; |
| 7086 | + } |
| 7087 | + |
| 7088 | + if (rem_len == 0) |
| 7089 | + goto read_done; |
| 7090 | + |
| 7091 | + ppos_data = |
| 7092 | + *ppos + ret_val - (bufhdr_size + |
| 7093 | + (fold_offset - start_offset + 1)); |
| 7094 | + |
| 7095 | + if (ppos_data <= end_offset) { |
| 7096 | + nbytes = min(rem_len, end_offset - ppos_data + 1); |
| 7097 | + if (copy_to_user(userbuf + ret_val, log_buf->log_data |
| 7098 | + + ppos_data, |
| 7099 | + nbytes)) |
| 7100 | + return -EFAULT; |
| 7101 | + ret_val += nbytes; |
| 7102 | + rem_len -= nbytes; |
| 7103 | + } |
| 7104 | + } |
| 7105 | + |
| 7106 | +read_done: |
| 7107 | + *ppos += ret_val; |
| 7108 | + |
| 7109 | + return ret_val; |
| 7110 | +} |
| 7111 | + |
| 7112 | +static const struct file_operations fops_pktlog_dump = { |
| 7113 | + .read = ath_pktlog_read, |
| 7114 | + .mmap = ath_pktlog_mmap, |
| 7115 | + .open = ath9k_debugfs_open |
| 7116 | +}; |
| 7117 | + |
| 7118 | +static ssize_t write_pktlog_start(struct file *file, const char __user *ubuf, |
| 7119 | + size_t count, loff_t *ppos) |
| 7120 | +{ |
| 7121 | + struct ath_softc *sc = file->private_data; |
| 7122 | + struct ath_pktlog *pktlog = &sc->pktlog.pktlog; |
| 7123 | + char buf[32]; |
| 7124 | + int buf_size; |
| 7125 | + int start_pktlog, err; |
| 7126 | + |
| 7127 | + buf_size = min(count, sizeof(buf) - 1); |
| 7128 | + if (copy_from_user(buf, ubuf, buf_size)) |
| 7129 | + return -EFAULT; |
| 7130 | + |
| 7131 | + sscanf(buf, "%d", &start_pktlog); |
| 7132 | + if (start_pktlog) { |
| 7133 | + if (pktlog->pktlog_buf != NULL) |
| 7134 | + ath_pktlog_release(pktlog); |
| 7135 | + |
| 7136 | + err = ath_alloc_pktlog_buf(sc); |
| 7137 | + if (err != 0) |
| 7138 | + return err; |
| 7139 | + |
| 7140 | + ath_init_pktlog_buf(pktlog); |
| 7141 | + pktlog->pktlog_buf->rd_offset = -1; |
| 7142 | + pktlog->pktlog_buf->wr_offset = 0; |
| 7143 | + sc->is_pkt_logging = 1; |
| 7144 | + } else { |
| 7145 | + sc->is_pkt_logging = 0; |
| 7146 | + } |
| 7147 | + |
| 7148 | + sc->sc_ah->is_pkt_logging = sc->is_pkt_logging; |
| 7149 | + return count; |
| 7150 | +} |
| 7151 | + |
| 7152 | +static ssize_t read_pktlog_start(struct file *file, char __user *ubuf, |
| 7153 | + size_t count, loff_t *ppos) |
| 7154 | +{ |
| 7155 | + char buf[32]; |
| 7156 | + struct ath_softc *sc = file->private_data; |
| 7157 | + int len = 0; |
| 7158 | + |
| 7159 | + len = scnprintf(buf, sizeof(buf) - len, "%d", sc->is_pkt_logging); |
| 7160 | + return simple_read_from_buffer(ubuf, count, ppos, buf, len); |
| 7161 | +} |
| 7162 | + |
| 7163 | +static const struct file_operations fops_pktlog_start = { |
| 7164 | + .read = read_pktlog_start, |
| 7165 | + .write = write_pktlog_start, |
| 7166 | + .open = ath9k_debugfs_open |
| 7167 | +}; |
| 7168 | + |
| 7169 | +static ssize_t pktlog_size_write(struct file *file, const char __user *ubuf, |
| 7170 | + size_t count, loff_t *ppos) |
| 7171 | +{ |
| 7172 | + struct ath_softc *sc = file->private_data; |
| 7173 | + char buf[32]; |
| 7174 | + u32 pktlog_size; |
| 7175 | + int buf_size; |
| 7176 | + |
| 7177 | + buf_size = min(count, sizeof(buf) - 1); |
| 7178 | + if (copy_from_user(buf, ubuf, buf_size)) |
| 7179 | + return -EFAULT; |
| 7180 | + |
| 7181 | + sscanf(buf, "%d", &pktlog_size); |
| 7182 | + |
| 7183 | + if (pktlog_size == sc->pktlog.pktlog.pktlog_buf_size) |
| 7184 | + return count; |
| 7185 | + |
| 7186 | + if (sc->is_pkt_logging) { |
| 7187 | + printk(KERN_DEBUG "Stop packet logging before" |
| 7188 | + " changing the pktlog size \n"); |
| 7189 | + return -EINVAL; |
| 7190 | + } |
| 7191 | + |
| 7192 | + sc->pktlog.pktlog.pktlog_buf_size = pktlog_size; |
| 7193 | + |
| 7194 | + return count; |
| 7195 | +} |
| 7196 | + |
| 7197 | +static ssize_t pktlog_size_read(struct file *file, char __user *ubuf, |
| 7198 | + size_t count, loff_t *ppos) |
| 7199 | +{ |
| 7200 | + char buf[32]; |
| 7201 | + struct ath_softc *sc = file->private_data; |
| 7202 | + int len = 0; |
| 7203 | + |
| 7204 | + len = scnprintf(buf, sizeof(buf) - len, "%ul", |
| 7205 | + sc->pktlog.pktlog.pktlog_buf_size); |
| 7206 | + return simple_read_from_buffer(ubuf, count, ppos, buf, len); |
| 7207 | +} |
| 7208 | + |
| 7209 | +static const struct file_operations fops_pktlog_size = { |
| 7210 | + .read = pktlog_size_read, |
| 7211 | + .write = pktlog_size_write, |
| 7212 | + .open = ath9k_debugfs_open |
| 7213 | +}; |
| 7214 | + |
| 7215 | +static ssize_t pktlog_filter_write(struct file *file, const char __user *ubuf, |
| 7216 | + size_t count, loff_t *ppos) |
| 7217 | +{ |
| 7218 | + char buf[32]; |
| 7219 | + struct ath_softc *sc = file->private_data; |
| 7220 | + u32 filter; |
| 7221 | + int buf_count; |
| 7222 | + |
| 7223 | + buf_count = min(count, sizeof(buf) - 1); |
| 7224 | + if (copy_from_user(buf, ubuf, buf_count)) |
| 7225 | + return -EFAULT; |
| 7226 | + |
| 7227 | + if (sscanf(buf, "%x", &filter)) |
| 7228 | + sc->pktlog.pktlog.pktlog_filter = filter; |
| 7229 | + else |
| 7230 | + sc->pktlog.pktlog.pktlog_filter = 0; |
| 7231 | + |
| 7232 | + return count; |
| 7233 | +} |
| 7234 | + |
| 7235 | +static ssize_t pktlog_filter_read(struct file *file, char __user *ubuf, |
| 7236 | + size_t count, loff_t *ppos) |
| 7237 | +{ |
| 7238 | + char buf[32]; |
| 7239 | + struct ath_softc *sc = file->private_data; |
| 7240 | + int len = 0; |
| 7241 | + |
| 7242 | + len = scnprintf(buf, sizeof(buf) - len, "%ul", |
| 7243 | + sc->pktlog.pktlog.pktlog_filter); |
| 7244 | + |
| 7245 | + return simple_read_from_buffer(ubuf, count, ppos, buf, len); |
| 7246 | +} |
| 7247 | + |
| 7248 | +static const struct file_operations fops_pktlog_filter = { |
| 7249 | + .read = pktlog_filter_read, |
| 7250 | + .write = pktlog_filter_write, |
| 7251 | + .open = ath9k_debugfs_open |
| 7252 | +}; |
| 7253 | + |
| 7254 | +void ath_pktlog_txctl(struct ath_softc *sc, struct ath_buf *bf) |
| 7255 | +{ |
| 7256 | + struct ath_pktlog_txctl *tx_log; |
| 7257 | + struct ath_pktlog *pl_info; |
| 7258 | + struct ieee80211_hdr *hdr; |
| 7259 | + struct ath_desc_info desc_info; |
| 7260 | + int i; |
| 7261 | + u32 *ds_words, flags = 0; |
| 7262 | + |
| 7263 | + pl_info = &sc->pktlog.pktlog; |
| 7264 | + |
| 7265 | + if ((pl_info->pktlog_filter & ATH_PKTLOG_TX) == 0 || |
| 7266 | + bf->bf_mpdu == NULL || !sc->is_pkt_logging) |
| 7267 | + return; |
| 7268 | + |
| 7269 | + flags |= (((sc->sc_ah->hw_version.macRev << |
| 7270 | + PHFLAGS_MACREV_SFT) & PHFLAGS_MACREV_MASK) | |
| 7271 | + ((sc->sc_ah->hw_version.macVersion << PHFLAGS_MACVERSION_SFT) |
| 7272 | + & PHFLAGS_MACVERSION_MASK)); |
| 7273 | + |
| 7274 | + tx_log = (struct ath_pktlog_txctl *)ath_pktlog_getbuf(pl_info, |
| 7275 | + PKTLOG_TYPE_TXCTL, sizeof(*tx_log), flags); |
| 7276 | + |
| 7277 | + memset(tx_log, 0, sizeof(*tx_log)); |
| 7278 | + |
| 7279 | + hdr = (struct ieee80211_hdr *) bf->bf_mpdu->data; |
| 7280 | + tx_log->framectrl = hdr->frame_control; |
| 7281 | + tx_log->seqctrl = hdr->seq_ctrl; |
| 7282 | + |
| 7283 | + if (ieee80211_has_tods(tx_log->framectrl)) { |
| 7284 | + tx_log->bssid_tail = (hdr->addr1[ETH_ALEN - 2] << 8) | |
| 7285 | + (hdr->addr1[ETH_ALEN - 1]); |
| 7286 | + tx_log->sa_tail = (hdr->addr2[ETH_ALEN - 2] << 8) | |
| 7287 | + (hdr->addr2[ETH_ALEN - 1]); |
| 7288 | + tx_log->da_tail = (hdr->addr3[ETH_ALEN - 2] << 8) | |
| 7289 | + (hdr->addr3[ETH_ALEN - 1]); |
| 7290 | + } else if (ieee80211_has_fromds(tx_log->framectrl)) { |
| 7291 | + tx_log->bssid_tail = (hdr->addr2[ETH_ALEN - 2] << 8) | |
| 7292 | + (hdr->addr2[ETH_ALEN - 1]); |
| 7293 | + tx_log->sa_tail = (hdr->addr3[ETH_ALEN - 2] << 8) | |
| 7294 | + (hdr->addr3[ETH_ALEN - 1]); |
| 7295 | + tx_log->da_tail = (hdr->addr1[ETH_ALEN - 2] << 8) | |
| 7296 | + (hdr->addr1[ETH_ALEN - 1]); |
| 7297 | + } else { |
| 7298 | + tx_log->bssid_tail = (hdr->addr3[ETH_ALEN - 2] << 8) | |
| 7299 | + (hdr->addr3[ETH_ALEN - 1]); |
| 7300 | + tx_log->sa_tail = (hdr->addr2[ETH_ALEN - 2] << 8) | |
| 7301 | + (hdr->addr2[ETH_ALEN - 1]); |
| 7302 | + tx_log->da_tail = (hdr->addr1[ETH_ALEN - 2] << 8) | |
| 7303 | + (hdr->addr1[ETH_ALEN - 1]); |
| 7304 | + } |
| 7305 | + |
| 7306 | + ath9k_hw_get_descinfo(sc->sc_ah, &desc_info); |
| 7307 | + |
| 7308 | + ds_words = (u32 *)(bf->bf_desc) + desc_info.txctl_offset; |
| 7309 | + for (i = 0; i < desc_info.txctl_numwords; i++) |
| 7310 | + tx_log->txdesc_ctl[i] = ds_words[i]; |
| 7311 | +} |
| 7312 | + |
| 7313 | +void ath_pktlog_txstatus(struct ath_softc *sc, void *ds) |
| 7314 | +{ |
| 7315 | + struct ath_pktlog_txstatus *tx_log; |
| 7316 | + struct ath_pktlog *pl_info; |
| 7317 | + struct ath_desc_info desc_info; |
| 7318 | + int i; |
| 7319 | + u32 *ds_words, flags = 0; |
| 7320 | + |
| 7321 | + pl_info = &sc->pktlog.pktlog; |
| 7322 | + |
| 7323 | + if ((pl_info->pktlog_filter & ATH_PKTLOG_TX) == 0 || |
| 7324 | + !sc->is_pkt_logging) |
| 7325 | + return; |
| 7326 | + |
| 7327 | + flags |= (((sc->sc_ah->hw_version.macRev << |
| 7328 | + PHFLAGS_MACREV_SFT) & PHFLAGS_MACREV_MASK) | |
| 7329 | + ((sc->sc_ah->hw_version.macVersion << PHFLAGS_MACVERSION_SFT) |
| 7330 | + & PHFLAGS_MACVERSION_MASK)); |
| 7331 | + tx_log = (struct ath_pktlog_txstatus *)ath_pktlog_getbuf(pl_info, |
| 7332 | + PKTLOG_TYPE_TXSTATUS, sizeof(*tx_log), flags); |
| 7333 | + |
| 7334 | + memset(tx_log, 0, sizeof(*tx_log)); |
| 7335 | + |
| 7336 | + ath9k_hw_get_descinfo(sc->sc_ah, &desc_info); |
| 7337 | + |
| 7338 | + ds_words = (u32 *)(ds) + desc_info.txstatus_offset; |
| 7339 | + |
| 7340 | + for (i = 0; i < desc_info.txstatus_numwords; i++) |
| 7341 | + tx_log->txdesc_status[i] = ds_words[i]; |
| 7342 | +} |
| 7343 | + |
| 7344 | +void ath_pktlog_rx(struct ath_softc *sc, void *desc, struct sk_buff *skb) |
| 7345 | +{ |
| 7346 | + struct ath_pktlog_rx *rx_log; |
| 7347 | + struct ath_pktlog *pl_info; |
| 7348 | + struct ieee80211_hdr *hdr; |
| 7349 | + struct ath_desc_info desc_info; |
| 7350 | + int i; |
| 7351 | + u32 *ds_words, flags = 0; |
| 7352 | + |
| 7353 | + pl_info = &sc->pktlog.pktlog; |
| 7354 | + |
| 7355 | + if ((pl_info->pktlog_filter & ATH_PKTLOG_RX) == 0 || |
| 7356 | + !sc->is_pkt_logging) |
| 7357 | + return; |
| 7358 | + |
| 7359 | + flags |= (((sc->sc_ah->hw_version.macRev << |
| 7360 | + PHFLAGS_MACREV_SFT) & PHFLAGS_MACREV_MASK) | |
| 7361 | + ((sc->sc_ah->hw_version.macVersion << |
| 7362 | + PHFLAGS_MACVERSION_SFT) & PHFLAGS_MACVERSION_MASK)); |
| 7363 | + |
| 7364 | + rx_log = (struct ath_pktlog_rx *)ath_pktlog_getbuf(pl_info, PKTLOG_TYPE_RX, |
| 7365 | + sizeof(*rx_log), flags); |
| 7366 | + |
| 7367 | + memset(rx_log, 0, sizeof(*rx_log)); |
| 7368 | + |
| 7369 | + if (skb->len > sizeof(struct ieee80211_hdr)) { |
| 7370 | + hdr = (struct ieee80211_hdr *) skb->data; |
| 7371 | + rx_log->framectrl = hdr->frame_control; |
| 7372 | + rx_log->seqctrl = hdr->seq_ctrl; |
| 7373 | + |
| 7374 | + if (ieee80211_has_tods(rx_log->framectrl)) { |
| 7375 | + rx_log->bssid_tail = (hdr->addr1[ETH_ALEN - 2] << 8) | |
| 7376 | + (hdr->addr1[ETH_ALEN - 1]); |
| 7377 | + rx_log->sa_tail = (hdr->addr2[ETH_ALEN - 2] << 8) | |
| 7378 | + (hdr->addr2[ETH_ALEN - 1]); |
| 7379 | + rx_log->da_tail = (hdr->addr3[ETH_ALEN - 2] << 8) | |
| 7380 | + (hdr->addr3[ETH_ALEN - 1]); |
| 7381 | + } else if (ieee80211_has_fromds(rx_log->framectrl)) { |
| 7382 | + rx_log->bssid_tail = (hdr->addr2[ETH_ALEN - 2] << 8) | |
| 7383 | + (hdr->addr2[ETH_ALEN - 1]); |
| 7384 | + rx_log->sa_tail = (hdr->addr3[ETH_ALEN - 2] << 8) | |
| 7385 | + (hdr->addr3[ETH_ALEN - 1]); |
| 7386 | + rx_log->da_tail = (hdr->addr1[ETH_ALEN - 2] << 8) | |
| 7387 | + (hdr->addr1[ETH_ALEN - 1]); |
| 7388 | + } else { |
| 7389 | + rx_log->bssid_tail = (hdr->addr3[ETH_ALEN - 2] << 8) | |
| 7390 | + (hdr->addr3[ETH_ALEN - 1]); |
| 7391 | + rx_log->sa_tail = (hdr->addr2[ETH_ALEN - 2] << 8) | |
| 7392 | + (hdr->addr2[ETH_ALEN - 1]); |
| 7393 | + rx_log->da_tail = (hdr->addr1[ETH_ALEN - 2] << 8) | |
| 7394 | + (hdr->addr1[ETH_ALEN - 1]); |
| 7395 | + } |
| 7396 | + } else { |
| 7397 | + hdr = (struct ieee80211_hdr *) skb->data; |
| 7398 | + |
| 7399 | + if (ieee80211_is_ctl(hdr->frame_control)) { |
| 7400 | + rx_log->framectrl = hdr->frame_control; |
| 7401 | + rx_log->da_tail = (hdr->addr1[ETH_ALEN - 2] << 8) | |
| 7402 | + (hdr->addr1[ETH_ALEN - 1]); |
| 7403 | + if (skb->len < sizeof(struct ieee80211_rts)) { |
| 7404 | + rx_log->sa_tail = 0; |
| 7405 | + } else { |
| 7406 | + rx_log->sa_tail = (hdr->addr2[ETH_ALEN - 2] |
| 7407 | + << 8) | |
| 7408 | + (hdr->addr2[ETH_ALEN - 1]); |
| 7409 | + } |
| 7410 | + } else { |
| 7411 | + rx_log->framectrl = 0xFFFF; |
| 7412 | + rx_log->da_tail = 0; |
| 7413 | + rx_log->sa_tail = 0; |
| 7414 | + } |
| 7415 | + |
| 7416 | + rx_log->seqctrl = 0; |
| 7417 | + rx_log->bssid_tail = 0; |
| 7418 | + } |
| 7419 | + |
| 7420 | + ath9k_hw_get_descinfo(sc->sc_ah, &desc_info); |
| 7421 | + |
| 7422 | + ds_words = (u32 *)(desc) + desc_info.rxstatus_offset; |
| 7423 | + |
| 7424 | + for (i = 0; i < desc_info.rxstatus_numwords; i++) |
| 7425 | + rx_log->rxdesc_status[i] = ds_words[i]; |
| 7426 | +} |
| 7427 | + |
| 7428 | +void ath9k_pktlog_rc(struct ath_softc *sc, struct ath_rate_priv *ath_rc_priv, |
| 7429 | + int8_t ratecode, u8 rate, int8_t is_probing, u16 ac) |
| 7430 | +{ |
| 7431 | + struct ath_pktlog_rcfind *rcf_log; |
| 7432 | + struct ath_pktlog *pl_info; |
| 7433 | + u32 flags = 0; |
| 7434 | + |
| 7435 | + pl_info = &sc->pktlog.pktlog; |
| 7436 | + |
| 7437 | + if ((pl_info->pktlog_filter & ATH_PKTLOG_RCFIND) == 0 || |
| 7438 | + !sc->is_pkt_logging) |
| 7439 | + return; |
| 7440 | + |
| 7441 | + flags |= (((sc->sc_ah->hw_version.macRev << |
| 7442 | + PHFLAGS_MACREV_SFT) & PHFLAGS_MACREV_MASK) | |
| 7443 | + ((sc->sc_ah->hw_version.macVersion << |
| 7444 | + PHFLAGS_MACVERSION_SFT) & PHFLAGS_MACVERSION_MASK)); |
| 7445 | + rcf_log = (struct ath_pktlog_rcfind *)ath_pktlog_getbuf(pl_info, |
| 7446 | + PKTLOG_TYPE_RCFIND, sizeof(*rcf_log), flags); |
| 7447 | + |
| 7448 | + rcf_log->rate = rate; |
| 7449 | + rcf_log->rateCode = ratecode; |
| 7450 | + rcf_log->rcProbeRate = is_probing ? ath_rc_priv->probe_rate : 0; |
| 7451 | + rcf_log->isProbing = is_probing; |
| 7452 | + rcf_log->ac = ac; |
| 7453 | + rcf_log->rcRateMax = ath_rc_priv->rate_max_phy; |
| 7454 | + rcf_log->rcRateTableSize = ath_rc_priv->rate_table_size; |
| 7455 | +} |
| 7456 | + |
| 7457 | +void ath9k_pktlog_rcupdate(struct ath_softc *sc, struct ath_rate_priv *ath_rc_priv, u8 tx_rate, |
| 7458 | + u8 rate_code, u8 xretries, u8 retries, int8_t rssi, u16 ac) |
| 7459 | +{ |
| 7460 | + struct ath_pktlog_rcupdate *rcu_log; |
| 7461 | + struct ath_pktlog *pl_info; |
| 7462 | + int i; |
| 7463 | + u32 flags = 0; |
| 7464 | + |
| 7465 | + pl_info = &sc->pktlog.pktlog; |
| 7466 | + |
| 7467 | + if ((pl_info->pktlog_filter & ATH_PKTLOG_RCUPDATE) == 0 || |
| 7468 | + !sc->is_pkt_logging) |
| 7469 | + return; |
| 7470 | + |
| 7471 | + flags |= (((sc->sc_ah->hw_version.macRev << |
| 7472 | + PHFLAGS_MACREV_SFT) & PHFLAGS_MACREV_MASK) | |
| 7473 | + ((sc->sc_ah->hw_version.macVersion << |
| 7474 | + PHFLAGS_MACVERSION_SFT) & PHFLAGS_MACVERSION_MASK)); |
| 7475 | + rcu_log = (struct ath_pktlog_rcupdate *)ath_pktlog_getbuf(pl_info, |
| 7476 | + PKTLOG_TYPE_RCUPDATE, |
| 7477 | + sizeof(*rcu_log), flags); |
| 7478 | + |
| 7479 | + memset(rcu_log, 0, sizeof(*rcu_log)); |
| 7480 | + |
| 7481 | + rcu_log->txRate = tx_rate; |
| 7482 | + rcu_log->rateCode = rate_code; |
| 7483 | + rcu_log->Xretries = xretries; |
| 7484 | + rcu_log->retries = retries; |
| 7485 | + rcu_log->rssiAck = rssi; |
| 7486 | + rcu_log->ac = ac; |
| 7487 | + rcu_log->rcProbeRate = ath_rc_priv->probe_rate; |
| 7488 | + rcu_log->rcRateMax = ath_rc_priv->rate_max_phy; |
| 7489 | + |
| 7490 | + for (i = 0; i < RATE_TABLE_SIZE; i++) { |
| 7491 | + rcu_log->rcPer[i] = ath_rc_priv->per[i]; |
| 7492 | + } |
| 7493 | +} |
| 7494 | + |
| 7495 | +void ath9k_pktlog_txcomplete(struct ath_softc *sc, struct list_head *bf_head, |
| 7496 | + struct ath_buf *bf, struct ath_buf *bf_last) |
| 7497 | +{ |
| 7498 | + struct log_tx ; |
| 7499 | + struct ath_buf *tbf; |
| 7500 | + |
| 7501 | + list_for_each_entry(tbf, bf_head, list) |
| 7502 | + ath_pktlog_txctl(sc, tbf); |
| 7503 | + |
| 7504 | + if (bf->bf_next == NULL && bf_last->bf_stale) |
| 7505 | + ath_pktlog_txctl(sc, bf_last); |
| 7506 | +} |
| 7507 | + |
| 7508 | +void ath9k_pktlog_txctrl(struct ath_softc *sc, struct list_head *bf_head, struct ath_buf *lastbf) |
| 7509 | +{ |
| 7510 | + struct log_tx ; |
| 7511 | + struct ath_buf *tbf; |
| 7512 | + |
| 7513 | + list_for_each_entry(tbf, bf_head, list) |
| 7514 | + ath_pktlog_txctl(sc, tbf); |
| 7515 | + |
| 7516 | + /* log the last descriptor. */ |
| 7517 | + ath_pktlog_txctl(sc, lastbf); |
| 7518 | +} |
| 7519 | + |
| 7520 | +static void pktlog_init(struct ath_softc *sc) |
| 7521 | +{ |
| 7522 | + spin_lock_init(&sc->pktlog.pktlog.pktlog_lock); |
| 7523 | + sc->pktlog.pktlog.pktlog_buf_size = ATH_DEBUGFS_PKTLOG_SIZE_DEFAULT; |
| 7524 | + sc->pktlog.pktlog.pktlog_buf = NULL; |
| 7525 | + sc->pktlog.pktlog.pktlog_filter = 0; |
| 7526 | +} |
| 7527 | + |
| 7528 | +int ath9k_init_pktlog(struct ath_softc *sc) |
| 7529 | +{ |
| 7530 | + sc->pktlog.debugfs_pktlog = debugfs_create_dir("pktlog", |
| 7531 | + sc->debug.debugfs_phy); |
| 7532 | + if (!sc->pktlog.debugfs_pktlog) |
| 7533 | + goto err; |
| 7534 | + |
| 7535 | + sc->pktlog.pktlog_start = debugfs_create_file("pktlog_start", |
| 7536 | + S_IRUGO | S_IWUSR, |
| 7537 | + sc->pktlog.debugfs_pktlog, |
| 7538 | + sc, &fops_pktlog_start); |
| 7539 | + if (!sc->pktlog.pktlog_start) |
| 7540 | + goto err; |
| 7541 | + |
| 7542 | + sc->pktlog.pktlog_size = debugfs_create_file("pktlog_size", |
| 7543 | + S_IRUGO | S_IWUSR, |
| 7544 | + sc->pktlog.debugfs_pktlog, |
| 7545 | + sc, &fops_pktlog_size); |
| 7546 | + if (!sc->pktlog.pktlog_size) |
| 7547 | + goto err; |
| 7548 | + |
| 7549 | + sc->pktlog.pktlog_filter = debugfs_create_file("pktlog_filter", |
| 7550 | + S_IRUGO | S_IWUSR, |
| 7551 | + sc->pktlog.debugfs_pktlog, |
| 7552 | + sc, &fops_pktlog_filter); |
| 7553 | + if (!sc->pktlog.pktlog_filter) |
| 7554 | + goto err; |
| 7555 | + |
| 7556 | + sc->pktlog.pktlog_dump = debugfs_create_file("pktlog_dump", |
| 7557 | + S_IRUGO, |
| 7558 | + sc->pktlog.debugfs_pktlog, |
| 7559 | + sc, &fops_pktlog_dump); |
| 7560 | + if (!sc->pktlog.pktlog_dump) |
| 7561 | + goto err; |
| 7562 | + |
| 7563 | + pktlog_init(sc); |
| 7564 | + |
| 7565 | + return 0; |
| 7566 | + |
| 7567 | +err: |
| 7568 | + return -ENOMEM; |
| 7569 | +} |
| 7570 | + |
| 7571 | +void ath9k_deinit_pktlog(struct ath_softc *sc) |
| 7572 | +{ |
| 7573 | + struct ath_pktlog *pktlog = &sc->pktlog.pktlog; |
| 7574 | + |
| 7575 | + if (pktlog->pktlog_buf != NULL) |
| 7576 | + ath_pktlog_release(pktlog); |
| 7577 | + |
| 7578 | + debugfs_remove(sc->pktlog.pktlog_start); |
| 7579 | + debugfs_remove(sc->pktlog.pktlog_size); |
| 7580 | + debugfs_remove(sc->pktlog.pktlog_filter); |
| 7581 | + debugfs_remove(sc->pktlog.pktlog_dump); |
| 7582 | + debugfs_remove(sc->pktlog.debugfs_pktlog); |
| 7583 | +} |
| 7584 | --- /dev/null |
| 7585 | @@ -0,0 +1,235 @@ |
| 7586 | +#ifndef PKTLOG_H |
| 7587 | +#define PKTLOG_H |
| 7588 | + |
| 7589 | +#ifdef CONFIG_ATH9K_PKTLOG |
| 7590 | +#define CUR_PKTLOG_VER 10010 /* Packet log version */ |
| 7591 | +#define PKTLOG_MAGIC_NUM 7735225 |
| 7592 | +#define ATH_PKTLOG_TX 0x000000001 |
| 7593 | +#define ATH_PKTLOG_RX 0x000000002 |
| 7594 | +#define ATH_PKTLOG_RCFIND 0x000000004 |
| 7595 | +#define ATH_PKTLOG_RCUPDATE 0x000000008 |
| 7596 | + |
| 7597 | +#define ATH_DEBUGFS_PKTLOG_SIZE_DEFAULT (1024 * 1024) |
| 7598 | +#define ATH_PKTLOG_FILTER_DEFAULT (ATH_PKTLOG_TX | ATH_PKTLOG_RX | \ |
| 7599 | + ATH_PKTLOG_RCFIND | ATH_PKTLOG_RCUPDATE) |
| 7600 | + |
| 7601 | +#define PHFLAGS_MACVERSION_MASK 0x00ff0000 |
| 7602 | +#define PHFLAGS_MACVERSION_SFT 16 |
| 7603 | +#define PHFLAGS_MACREV_MASK 0xff0 /* MAC revision */ |
| 7604 | +#define PHFLAGS_MACREV_SFT 4 |
| 7605 | + |
| 7606 | +struct ath_pktlog_hdr { |
| 7607 | + u32 flags; |
| 7608 | + u16 log_type; /* Type of log information foll this header */ |
| 7609 | + int16_t size; /* Size of variable length log information in bytes */ |
| 7610 | + u32 timestamp; |
| 7611 | +} __packed; |
| 7612 | + |
| 7613 | +/* Types of packet log events */ |
| 7614 | +#define PKTLOG_TYPE_TXCTL 0 |
| 7615 | +#define PKTLOG_TYPE_TXSTATUS 1 |
| 7616 | +#define PKTLOG_TYPE_RX 2 |
| 7617 | +#define PKTLOG_TYPE_RCFIND 3 |
| 7618 | +#define PKTLOG_TYPE_RCUPDATE 4 |
| 7619 | + |
| 7620 | +#define PKTLOG_MAX_TXCTL_WORDS 12 |
| 7621 | +#define PKTLOG_MAX_TXSTATUS_WORDS 10 |
| 7622 | +#define PKTLOG_MAX_PROTO_WORDS 16 |
| 7623 | + |
| 7624 | +struct ath_pktlog_txctl { |
| 7625 | + __le16 framectrl; /* frame control field from header */ |
| 7626 | + __le16 seqctrl; /* frame control field from header */ |
| 7627 | + u16 bssid_tail; /* last two octets of bssid */ |
| 7628 | + u16 sa_tail; /* last two octets of SA */ |
| 7629 | + u16 da_tail; /* last two octets of DA */ |
| 7630 | + u16 resvd; |
| 7631 | + u32 txdesc_ctl[PKTLOG_MAX_TXCTL_WORDS]; /* Tx descriptor words */ |
| 7632 | + unsigned long proto_hdr; /* protocol header (variable length!) */ |
| 7633 | + int32_t misc[0]; /* Can be used for HT specific or other misc info */ |
| 7634 | +} __packed; |
| 7635 | + |
| 7636 | +struct ath_pktlog_txstatus { |
| 7637 | + /* Tx descriptor status words */ |
| 7638 | + u32 txdesc_status[PKTLOG_MAX_TXSTATUS_WORDS]; |
| 7639 | + int32_t misc[0]; /* Can be used for HT specific or other misc info */ |
| 7640 | +} __packed; |
| 7641 | + |
| 7642 | +#define PKTLOG_MAX_RXSTATUS_WORDS 11 |
| 7643 | + |
| 7644 | +struct ath_pktlog_rx { |
| 7645 | + u16 framectrl; /* frame control field from header */ |
| 7646 | + u16 seqctrl; /* sequence control field */ |
| 7647 | + u16 bssid_tail; /* last two octets of bssid */ |
| 7648 | + u16 sa_tail; /* last two octets of SA */ |
| 7649 | + u16 da_tail; /* last two octets of DA */ |
| 7650 | + u16 resvd; |
| 7651 | + u32 rxdesc_status[PKTLOG_MAX_RXSTATUS_WORDS]; /* Rx descriptor words */ |
| 7652 | + unsigned long proto_hdr; /* protocol header (variable length!) */ |
| 7653 | + int32_t misc[0]; /* Can be used for HT specific or other misc info */ |
| 7654 | +} __packed; |
| 7655 | + |
| 7656 | +struct ath_pktlog_rcfind { |
| 7657 | + u8 rate; |
| 7658 | + u8 rateCode; |
| 7659 | + s8 rcRssiLast; |
| 7660 | + s8 rcRssiLastPrev; |
| 7661 | + s8 rcRssiLastPrev2; |
| 7662 | + s8 rssiReduce; |
| 7663 | + u8 rcProbeRate; |
| 7664 | + s8 isProbing; |
| 7665 | + s8 primeInUse; |
| 7666 | + s8 currentPrimeState; |
| 7667 | + u8 rcRateTableSize; |
| 7668 | + u8 rcRateMax; |
| 7669 | + u8 ac; |
| 7670 | + int32_t misc[0]; /* Can be used for HT specific or other misc info */ |
| 7671 | +} __packed; |
| 7672 | + |
| 7673 | +struct ath_pktlog_rcupdate { |
| 7674 | + u8 txRate; |
| 7675 | + u8 rateCode; |
| 7676 | + s8 rssiAck; |
| 7677 | + u8 Xretries; |
| 7678 | + u8 retries; |
| 7679 | + s8 rcRssiLast; |
| 7680 | + s8 rcRssiLastLkup; |
| 7681 | + s8 rcRssiLastPrev; |
| 7682 | + s8 rcRssiLastPrev2; |
| 7683 | + u8 rcProbeRate; |
| 7684 | + u8 rcRateMax; |
| 7685 | + s8 useTurboPrime; |
| 7686 | + s8 currentBoostState; |
| 7687 | + u8 rcHwMaxRetryRate; |
| 7688 | + u8 ac; |
| 7689 | + u8 resvd[2]; |
| 7690 | + s8 rcRssiThres[RATE_TABLE_SIZE]; |
| 7691 | + u8 rcPer[RATE_TABLE_SIZE]; |
| 7692 | + u8 resv2[RATE_TABLE_SIZE + 5]; |
| 7693 | + int32_t misc[0]; /* Can be used for HT specific or other misc info */ |
| 7694 | +}; |
| 7695 | + |
| 7696 | +#define TXCTL_OFFSET(ah) (AR_SREV_9300_20_OR_LATER(ah) ? 11 : 2) |
| 7697 | +#define TXCTL_NUMWORDS(ah) (AR_SREV_5416_20_OR_LATER(ah) ? 12 : 8) |
| 7698 | +#define TXSTATUS_OFFSET(ah) (AR_SREV_9300_20_OR_LATER(ah) ? 2 : 14) |
| 7699 | +#define TXSTATUS_NUMWORDS(ah) (AR_SREV_9300_20_OR_LATER(ah) ? 7 : 10) |
| 7700 | + |
| 7701 | +#define RXCTL_OFFSET(ah) (AR_SREV_9300_20_OR_LATER(ah) ? 0 : 3) |
| 7702 | +#define RXCTL_NUMWORDS(ah) (AR_SREV_9300_20_OR_LATER(ah) ? 0 : 1) |
| 7703 | +#define RXSTATUS_OFFSET(ah) (AR_SREV_9300_20_OR_LATER(ah) ? 1 : 4) |
| 7704 | +#define RXSTATUS_NUMWORDS(ah) (AR_SREV_9300_20_OR_LATER(ah) ? 11 : 9) |
| 7705 | + |
| 7706 | +struct ath_desc_info { |
| 7707 | + u8 txctl_offset; |
| 7708 | + u8 txctl_numwords; |
| 7709 | + u8 txstatus_offset; |
| 7710 | + u8 txstatus_numwords; |
| 7711 | + u8 rxctl_offset; |
| 7712 | + u8 rxctl_numwords; |
| 7713 | + u8 rxstatus_offset; |
| 7714 | + u8 rxstatus_numwords; |
| 7715 | +}; |
| 7716 | + |
| 7717 | +#define PKTLOG_MOV_RD_IDX(_rd_offset, _log_buf, _log_size) \ |
| 7718 | + do { \ |
| 7719 | + if ((_rd_offset + sizeof(struct ath_pktlog_hdr) + \ |
| 7720 | + ((struct ath_pktlog_hdr *)((_log_buf)->log_data + \ |
| 7721 | + (_rd_offset)))->size) <= _log_size) { \ |
| 7722 | + _rd_offset = ((_rd_offset) + \ |
| 7723 | + sizeof(struct ath_pktlog_hdr) + \ |
| 7724 | + ((struct ath_pktlog_hdr *) \ |
| 7725 | + ((_log_buf)->log_data + \ |
| 7726 | + (_rd_offset)))->size); \ |
| 7727 | + } else { \ |
| 7728 | + _rd_offset = ((struct ath_pktlog_hdr *) \ |
| 7729 | + ((_log_buf)->log_data + \ |
| 7730 | + (_rd_offset)))->size; \ |
| 7731 | + } \ |
| 7732 | + (_rd_offset) = (((_log_size) - (_rd_offset)) >= \ |
| 7733 | + sizeof(struct ath_pktlog_hdr)) ? \ |
| 7734 | + _rd_offset : 0; \ |
| 7735 | + } while (0); |
| 7736 | + |
| 7737 | +struct ath_pktlog_bufhdr { |
| 7738 | + u32 magic_num; /* Used by post processing scripts */ |
| 7739 | + u32 version; /* Set to CUR_PKTLOG_VER */ |
| 7740 | +}; |
| 7741 | + |
| 7742 | +struct ath_pktlog_buf { |
| 7743 | + struct ath_pktlog_bufhdr bufhdr; |
| 7744 | + int32_t rd_offset; |
| 7745 | + int32_t wr_offset; |
| 7746 | + char log_data[0]; |
| 7747 | +}; |
| 7748 | + |
| 7749 | +struct ath_pktlog { |
| 7750 | + struct ath_pktlog_buf *pktlog_buf; |
| 7751 | + u32 pktlog_filter; |
| 7752 | + u32 pktlog_buf_size; /* Size of buffer in bytes */ |
| 7753 | + spinlock_t pktlog_lock; |
| 7754 | +}; |
| 7755 | + |
| 7756 | +struct ath_pktlog_debugfs { |
| 7757 | + struct dentry *debugfs_pktlog; |
| 7758 | + struct dentry *pktlog_enable; |
| 7759 | + struct dentry *pktlog_start; |
| 7760 | + struct dentry *pktlog_filter; |
| 7761 | + struct dentry *pktlog_size; |
| 7762 | + struct dentry *pktlog_dump; |
| 7763 | + struct ath_pktlog pktlog; |
| 7764 | +}; |
| 7765 | + |
| 7766 | +void ath_pktlog_txctl(struct ath_softc *sc, struct ath_buf *bf); |
| 7767 | +void ath_pktlog_txstatus(struct ath_softc *sc, void *ds); |
| 7768 | +void ath_pktlog_rx(struct ath_softc *sc, void *ds, struct sk_buff *skb); |
| 7769 | +void ath9k_pktlog_rc(struct ath_softc *sc, struct ath_rate_priv *ath_rc_priv, |
| 7770 | + int8_t ratecode, u8 rate, int8_t is_probing, u16 ac); |
| 7771 | +void ath9k_pktlog_rcupdate(struct ath_softc *sc, |
| 7772 | + struct ath_rate_priv *ath_rc_priv, u8 tx_rate, |
| 7773 | + u8 rate_code, u8 xretries, u8 retries, int8_t rssi, |
| 7774 | + u16 ac); |
| 7775 | +void ath9k_pktlog_txcomplete(struct ath_softc *sc ,struct list_head *bf_head, |
| 7776 | + struct ath_buf *bf, struct ath_buf *bf_last); |
| 7777 | +void ath9k_pktlog_txctrl(struct ath_softc *sc, struct list_head *bf_head, |
| 7778 | + struct ath_buf *lastbf); |
| 7779 | +int ath9k_init_pktlog(struct ath_softc *sc); |
| 7780 | +void ath9k_deinit_pktlog(struct ath_softc *sc); |
| 7781 | +#else /* CONFIG_ATH9K_PKTLOG */ |
| 7782 | +static inline void ath_pktlog_txstatus(struct ath_softc *sc, void *ds) |
| 7783 | +{ |
| 7784 | +} |
| 7785 | + |
| 7786 | +static inline void ath_pktlog_rx(struct ath_softc *sc, void *ds, |
| 7787 | + struct sk_buff *skb) |
| 7788 | +{ |
| 7789 | +} |
| 7790 | + |
| 7791 | +static inline void ath9k_pktlog_rc(struct ath_softc *sc, |
| 7792 | + struct ath_rate_priv *ath_rc_priv, |
| 7793 | + int8_t ratecode, u8 rate, |
| 7794 | + int8_t is_probing, u16 ac) |
| 7795 | +{ |
| 7796 | +} |
| 7797 | + |
| 7798 | +static inline void ath9k_pktlog_rcupdate(struct ath_softc *sc, |
| 7799 | + struct ath_rate_priv *ath_rc_priv, |
| 7800 | + u8 tx_rate, u8 rate_code, |
| 7801 | + u8 xretries, u8 retries, |
| 7802 | + int8_t rssi, u16 ac) |
| 7803 | +{ |
| 7804 | +} |
| 7805 | + |
| 7806 | +static inline void ath9k_pktlog_txcomplete(struct ath_softc *sc, |
| 7807 | + struct list_head *bf_head, |
| 7808 | + struct ath_buf *bf, |
| 7809 | + struct ath_buf *bf_last) |
| 7810 | +{ |
| 7811 | +} |
| 7812 | + |
| 7813 | +static inline void ath9k_pktlog_txctrl(struct ath_softc *sc, |
| 7814 | + struct list_head *bf_head, |
| 7815 | + struct ath_buf *lastbf) |
| 7816 | +{ |
| 7817 | +} |
| 7818 | +#endif /* CONFIG_ATH9K_PKTLOG */ |
| 7819 | + |
| 7820 | +#endif |
| 7821 | --- a/drivers/net/wireless/ath/ath9k/rc.c |
| 7822 | @@ -40,73 +40,75 @@ static const struct ath_rate_table ar541 |
| 7823 | { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ |
| 7824 | 29300, 7, 108, 4, 7, 7, 7, 7 }, |
| 7825 | { VALID_2040, VALID_2040, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */ |
| 7826 | - 6400, 0, 0, 0, 8, 24, 8, 24 }, |
| 7827 | + 6400, 0, 0, 0, 8, 25, 8, 25 }, |
| 7828 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */ |
| 7829 | - 12700, 1, 1, 2, 9, 25, 9, 25 }, |
| 7830 | + 12700, 1, 1, 2, 9, 26, 9, 26 }, |
| 7831 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */ |
| 7832 | - 18800, 2, 2, 2, 10, 26, 10, 26 }, |
| 7833 | + 18800, 2, 2, 2, 10, 27, 10, 27 }, |
| 7834 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */ |
| 7835 | - 25000, 3, 3, 4, 11, 27, 11, 27 }, |
| 7836 | + 25000, 3, 3, 4, 11, 28, 11, 28 }, |
| 7837 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */ |
| 7838 | - 36700, 4, 4, 4, 12, 28, 12, 28 }, |
| 7839 | + 36700, 4, 4, 4, 12, 29, 12, 29 }, |
| 7840 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */ |
| 7841 | - 48100, 5, 5, 4, 13, 29, 13, 29 }, |
| 7842 | + 48100, 5, 5, 4, 13, 30, 13, 30 }, |
| 7843 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */ |
| 7844 | - 53500, 6, 6, 4, 14, 30, 14, 30 }, |
| 7845 | + 53500, 6, 6, 4, 14, 31, 14, 31 }, |
| 7846 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */ |
| 7847 | - 59000, 7, 7, 4, 15, 31, 15, 32 }, |
| 7848 | + 59000, 7, 7, 4, 15, 32, 15, 33 }, |
| 7849 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */ |
| 7850 | - 12700, 8, 8, 3, 16, 33, 16, 33 }, |
| 7851 | + 12700, 8, 8, 3, 16, 34, 16, 34 }, |
| 7852 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */ |
| 7853 | - 24800, 9, 9, 2, 17, 34, 17, 34 }, |
| 7854 | + 24800, 9, 9, 2, 17, 35, 17, 35 }, |
| 7855 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */ |
| 7856 | - 36600, 10, 10, 2, 18, 35, 18, 35 }, |
| 7857 | + 36600, 10, 10, 2, 18, 36, 18, 36 }, |
| 7858 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */ |
| 7859 | - 48100, 11, 11, 4, 19, 36, 19, 36 }, |
| 7860 | + 48100, 11, 11, 4, 19, 37, 19, 37 }, |
| 7861 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */ |
| 7862 | - 69500, 12, 12, 4, 20, 37, 20, 37 }, |
| 7863 | + 69500, 12, 12, 4, 20, 38, 20, 38 }, |
| 7864 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */ |
| 7865 | - 89500, 13, 13, 4, 21, 38, 21, 38 }, |
| 7866 | + 89500, 13, 13, 4, 21, 39, 21, 39 }, |
| 7867 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */ |
| 7868 | - 98900, 14, 14, 4, 22, 39, 22, 39 }, |
| 7869 | + 98900, 14, 14, 4, 22, 40, 22, 40 }, |
| 7870 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */ |
| 7871 | - 108300, 15, 15, 4, 23, 40, 23, 41 }, |
| 7872 | + 108300, 15, 15, 4, 23, 41, 24, 42 }, |
| 7873 | + { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS_HGI, 144400, /* 144.4 Mb */ |
| 7874 | + 12000, 15, 15, 4, 23, 41, 24, 42 }, |
| 7875 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */ |
| 7876 | - 13200, 0, 0, 0, 8, 24, 24, 24 }, |
| 7877 | + 13200, 0, 0, 0, 8, 25, 25, 25 }, |
| 7878 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */ |
| 7879 | - 25900, 1, 1, 2, 9, 25, 25, 25 }, |
| 7880 | + 25900, 1, 1, 2, 9, 26, 26, 26 }, |
| 7881 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */ |
| 7882 | - 38600, 2, 2, 2, 10, 26, 26, 26 }, |
| 7883 | + 38600, 2, 2, 2, 10, 27, 27, 27 }, |
| 7884 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */ |
| 7885 | - 49800, 3, 3, 4, 11, 27, 27, 27 }, |
| 7886 | + 49800, 3, 3, 4, 11, 28, 28, 28 }, |
| 7887 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */ |
| 7888 | - 72200, 4, 4, 4, 12, 28, 28, 28 }, |
| 7889 | + 72200, 4, 4, 4, 12, 29, 29, 29 }, |
| 7890 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */ |
| 7891 | - 92900, 5, 5, 4, 13, 29, 29, 29 }, |
| 7892 | + 92900, 5, 5, 4, 13, 30, 30, 30 }, |
| 7893 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */ |
| 7894 | - 102700, 6, 6, 4, 14, 30, 30, 30 }, |
| 7895 | + 102700, 6, 6, 4, 14, 31, 31, 31 }, |
| 7896 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */ |
| 7897 | - 112000, 7, 7, 4, 15, 31, 32, 32 }, |
| 7898 | + 112000, 7, 7, 4, 15, 32, 33, 33 }, |
| 7899 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */ |
| 7900 | - 122000, 7, 7, 4, 15, 31, 32, 32 }, |
| 7901 | + 122000, 7, 7, 4, 15, 32, 33, 33 }, |
| 7902 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */ |
| 7903 | - 25800, 8, 8, 0, 16, 33, 33, 33 }, |
| 7904 | + 25800, 8, 8, 0, 16, 34, 34, 34 }, |
| 7905 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */ |
| 7906 | - 49800, 9, 9, 2, 17, 34, 34, 34 }, |
| 7907 | + 49800, 9, 9, 2, 17, 35, 35, 35 }, |
| 7908 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */ |
| 7909 | - 71900, 10, 10, 2, 18, 35, 35, 35 }, |
| 7910 | + 71900, 10, 10, 2, 18, 36, 36, 36 }, |
| 7911 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */ |
| 7912 | - 92500, 11, 11, 4, 19, 36, 36, 36 }, |
| 7913 | + 92500, 11, 11, 4, 19, 37, 37, 37 }, |
| 7914 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */ |
| 7915 | - 130300, 12, 12, 4, 20, 37, 37, 37 }, |
| 7916 | + 130300, 12, 12, 4, 20, 38, 38, 38 }, |
| 7917 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */ |
| 7918 | - 162800, 13, 13, 4, 21, 38, 38, 38 }, |
| 7919 | + 162800, 13, 13, 4, 21, 39, 39, 39 }, |
| 7920 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */ |
| 7921 | - 178200, 14, 14, 4, 22, 39, 39, 39 }, |
| 7922 | + 178200, 14, 14, 4, 22, 40, 40, 40 }, |
| 7923 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */ |
| 7924 | - 192100, 15, 15, 4, 23, 40, 41, 41 }, |
| 7925 | + 192100, 15, 15, 4, 23, 41, 42, 42 }, |
| 7926 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */ |
| 7927 | - 207000, 15, 15, 4, 23, 40, 41, 41 }, |
| 7928 | + 207000, 15, 15, 4, 23, 41, 42, 42 }, |
| 7929 | }, |
| 7930 | 50, /* probe interval */ |
| 7931 | WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ |
| 7932 | @@ -144,73 +146,75 @@ static const struct ath_rate_table ar541 |
| 7933 | { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ |
| 7934 | 30900, 11, 108, 8, 11, 11, 11, 11 }, |
| 7935 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */ |
| 7936 | - 6400, 0, 0, 4, 12, 28, 12, 28 }, |
| 7937 | + 6400, 0, 0, 4, 12, 29, 12, 29 }, |
| 7938 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */ |
| 7939 | - 12700, 1, 1, 6, 13, 29, 13, 29 }, |
| 7940 | + 12700, 1, 1, 6, 13, 30, 13, 30 }, |
| 7941 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */ |
| 7942 | - 18800, 2, 2, 6, 14, 30, 14, 30 }, |
| 7943 | + 18800, 2, 2, 6, 14, 31, 14, 31 }, |
| 7944 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */ |
| 7945 | - 25000, 3, 3, 8, 15, 31, 15, 31 }, |
| 7946 | + 25000, 3, 3, 8, 15, 32, 15, 32 }, |
| 7947 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */ |
| 7948 | - 36700, 4, 4, 8, 16, 32, 16, 32 }, |
| 7949 | + 36700, 4, 4, 8, 16, 33, 16, 33 }, |
| 7950 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */ |
| 7951 | - 48100, 5, 5, 8, 17, 33, 17, 33 }, |
| 7952 | + 48100, 5, 5, 8, 17, 34, 17, 34 }, |
| 7953 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */ |
| 7954 | - 53500, 6, 6, 8, 18, 34, 18, 34 }, |
| 7955 | + 53500, 6, 6, 8, 18, 35, 18, 35 }, |
| 7956 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */ |
| 7957 | - 59000, 7, 7, 8, 19, 35, 19, 36 }, |
| 7958 | + 59000, 7, 7, 8, 19, 36, 19, 37 }, |
| 7959 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */ |
| 7960 | - 12700, 8, 8, 4, 20, 37, 20, 37 }, |
| 7961 | + 12700, 8, 8, 4, 20, 38, 20, 38 }, |
| 7962 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */ |
| 7963 | - 24800, 9, 9, 6, 21, 38, 21, 38 }, |
| 7964 | + 24800, 9, 9, 6, 21, 39, 21, 39 }, |
| 7965 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */ |
| 7966 | - 36600, 10, 10, 6, 22, 39, 22, 39 }, |
| 7967 | + 36600, 10, 10, 6, 22, 40, 22, 40 }, |
| 7968 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */ |
| 7969 | - 48100, 11, 11, 8, 23, 40, 23, 40 }, |
| 7970 | + 48100, 11, 11, 8, 23, 41, 23, 41 }, |
| 7971 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */ |
| 7972 | - 69500, 12, 12, 8, 24, 41, 24, 41 }, |
| 7973 | + 69500, 12, 12, 8, 24, 42, 24, 42 }, |
| 7974 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */ |
| 7975 | - 89500, 13, 13, 8, 25, 42, 25, 42 }, |
| 7976 | + 89500, 13, 13, 8, 25, 43, 25, 43 }, |
| 7977 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */ |
| 7978 | - 98900, 14, 14, 8, 26, 43, 26, 44 }, |
| 7979 | + 98900, 14, 14, 8, 26, 44, 26, 44 }, |
| 7980 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */ |
| 7981 | - 108300, 15, 15, 8, 27, 44, 27, 45 }, |
| 7982 | + 108300, 15, 15, 8, 27, 45, 28, 46 }, |
| 7983 | + { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS_HGI, 144400, /* 130 Mb */ |
| 7984 | + 120000, 15, 15, 8, 27, 45, 28, 46 }, |
| 7985 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */ |
| 7986 | - 13200, 0, 0, 8, 12, 28, 28, 28 }, |
| 7987 | + 13200, 0, 0, 8, 12, 29, 29, 29 }, |
| 7988 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */ |
| 7989 | - 25900, 1, 1, 8, 13, 29, 29, 29 }, |
| 7990 | + 25900, 1, 1, 8, 13, 30, 30, 30 }, |
| 7991 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */ |
| 7992 | - 38600, 2, 2, 8, 14, 30, 30, 30 }, |
| 7993 | + 38600, 2, 2, 8, 14, 31, 31, 31 }, |
| 7994 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */ |
| 7995 | - 49800, 3, 3, 8, 15, 31, 31, 31 }, |
| 7996 | + 49800, 3, 3, 8, 15, 32, 32, 32 }, |
| 7997 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */ |
| 7998 | - 72200, 4, 4, 8, 16, 32, 32, 32 }, |
| 7999 | + 72200, 4, 4, 8, 16, 33, 33, 33 }, |
| 8000 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */ |
| 8001 | - 92900, 5, 5, 8, 17, 33, 33, 33 }, |
| 8002 | + 92900, 5, 5, 8, 17, 34, 34, 34 }, |
| 8003 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */ |
| 8004 | - 102700, 6, 6, 8, 18, 34, 34, 34 }, |
| 8005 | + 102700, 6, 6, 8, 18, 35, 35, 35 }, |
| 8006 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */ |
| 8007 | - 112000, 7, 7, 8, 19, 35, 36, 36 }, |
| 8008 | + 112000, 7, 7, 8, 19, 36, 37, 37 }, |
| 8009 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */ |
| 8010 | - 122000, 7, 7, 8, 19, 35, 36, 36 }, |
| 8011 | + 122000, 7, 7, 8, 19, 36, 37, 37 }, |
| 8012 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */ |
| 8013 | - 25800, 8, 8, 8, 20, 37, 37, 37 }, |
| 8014 | + 25800, 8, 8, 8, 20, 38, 38, 38 }, |
| 8015 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */ |
| 8016 | - 49800, 9, 9, 8, 21, 38, 38, 38 }, |
| 8017 | + 49800, 9, 9, 8, 21, 39, 39, 39 }, |
| 8018 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */ |
| 8019 | - 71900, 10, 10, 8, 22, 39, 39, 39 }, |
| 8020 | + 71900, 10, 10, 8, 22, 40, 40, 40 }, |
| 8021 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */ |
| 8022 | - 92500, 11, 11, 8, 23, 40, 40, 40 }, |
| 8023 | + 92500, 11, 11, 8, 23, 41, 41, 41 }, |
| 8024 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */ |
| 8025 | - 130300, 12, 12, 8, 24, 41, 41, 41 }, |
| 8026 | + 130300, 12, 12, 8, 24, 42, 42, 42 }, |
| 8027 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */ |
| 8028 | - 162800, 13, 13, 8, 25, 42, 42, 42 }, |
| 8029 | + 162800, 13, 13, 8, 25, 43, 43, 43 }, |
| 8030 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */ |
| 8031 | - 178200, 14, 14, 8, 26, 43, 43, 43 }, |
| 8032 | + 178200, 14, 14, 8, 26, 44, 44, 44 }, |
| 8033 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */ |
| 8034 | - 192100, 15, 15, 8, 27, 44, 45, 45 }, |
| 8035 | + 192100, 15, 15, 8, 27, 45, 46, 46 }, |
| 8036 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */ |
| 8037 | - 207000, 15, 15, 8, 27, 44, 45, 45 }, |
| 8038 | + 207000, 15, 15, 8, 27, 45, 46, 46 }, |
| 8039 | }, |
| 8040 | 50, /* probe interval */ |
| 8041 | WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ |
| 8042 | @@ -510,7 +514,7 @@ static u8 ath_rc_setvalid_htrates(struct |
| 8043 | static u8 ath_rc_get_highest_rix(struct ath_softc *sc, |
| 8044 | struct ath_rate_priv *ath_rc_priv, |
| 8045 | const struct ath_rate_table *rate_table, |
| 8046 | - int *is_probing) |
| 8047 | + int *is_probing, u16 ac) |
| 8048 | { |
| 8049 | u32 best_thruput, this_thruput, now_msec; |
| 8050 | u8 rate, next_rate, best_rate, maxindex, minindex; |
| 8051 | @@ -598,6 +602,8 @@ static u8 ath_rc_get_highest_rix(struct |
| 8052 | |
| 8053 | rate = ath_rc_priv->valid_rate_index[0]; |
| 8054 | |
| 8055 | + ath9k_pktlog_rc(sc, ath_rc_priv, rate_table->info[rate].ratecode, |
| 8056 | + rate, *is_probing, ac); |
| 8057 | return rate; |
| 8058 | } |
| 8059 | |
| 8060 | @@ -689,7 +695,7 @@ static void ath_get_rate(void *priv, str |
| 8061 | try_per_rate = 4; |
| 8062 | |
| 8063 | rate_table = sc->cur_rate_table; |
| 8064 | - rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe); |
| 8065 | + rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe, skb_get_queue_mapping(skb)); |
| 8066 | |
| 8067 | /* |
| 8068 | * If we're in HT mode and both us and our peer supports LDPC. |
| 8069 | @@ -929,7 +935,8 @@ static bool ath_rc_update_per(struct ath |
| 8070 | static void ath_rc_update_ht(struct ath_softc *sc, |
| 8071 | struct ath_rate_priv *ath_rc_priv, |
| 8072 | struct ieee80211_tx_info *tx_info, |
| 8073 | - int tx_rate, int xretries, int retries) |
| 8074 | + int tx_rate, int xretries, int retries, |
| 8075 | + u16 ac) |
| 8076 | { |
| 8077 | u32 now_msec = jiffies_to_msecs(jiffies); |
| 8078 | int rate; |
| 8079 | @@ -998,6 +1005,9 @@ static void ath_rc_update_ht(struct ath_ |
| 8080 | ath_debug_stat_retries(sc, tx_rate, xretries, retries, |
| 8081 | ath_rc_priv->per[tx_rate]); |
| 8082 | |
| 8083 | + ath9k_pktlog_rcupdate(sc, ath_rc_priv, tx_rate, |
| 8084 | + rate_table->info[tx_rate].ratecode, |
| 8085 | + xretries, retries, tx_info->status.ack_signal, ac); |
| 8086 | } |
| 8087 | |
| 8088 | static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table, |
| 8089 | @@ -1025,7 +1035,8 @@ static int ath_rc_get_rateindex(const st |
| 8090 | static void ath_rc_tx_status(struct ath_softc *sc, |
| 8091 | struct ath_rate_priv *ath_rc_priv, |
| 8092 | struct ieee80211_tx_info *tx_info, |
| 8093 | - int final_ts_idx, int xretries, int long_retry) |
| 8094 | + int final_ts_idx, int xretries, int long_retry, |
| 8095 | + u16 ac) |
| 8096 | { |
| 8097 | const struct ath_rate_table *rate_table; |
| 8098 | struct ieee80211_tx_rate *rates = tx_info->status.rates; |
| 8099 | @@ -1054,7 +1065,7 @@ static void ath_rc_tx_status(struct ath_ |
| 8100 | rix = ath_rc_get_rateindex(rate_table, &rates[i]); |
| 8101 | ath_rc_update_ht(sc, ath_rc_priv, tx_info, |
| 8102 | rix, xretries ? 1 : 2, |
| 8103 | - rates[i].count); |
| 8104 | + rates[i].count, ac); |
| 8105 | } |
| 8106 | } |
| 8107 | } else { |
| 8108 | @@ -1076,7 +1087,7 @@ static void ath_rc_tx_status(struct ath_ |
| 8109 | return; |
| 8110 | |
| 8111 | rix = ath_rc_get_rateindex(rate_table, &rates[i]); |
| 8112 | - ath_rc_update_ht(sc, ath_rc_priv, tx_info, rix, xretries, long_retry); |
| 8113 | + ath_rc_update_ht(sc, ath_rc_priv, tx_info, rix, xretries, long_retry, ac); |
| 8114 | } |
| 8115 | |
| 8116 | static const |
| 8117 | @@ -1193,7 +1204,7 @@ static void ath_rc_init(struct ath_softc |
| 8118 | } |
| 8119 | |
| 8120 | static u8 ath_rc_build_ht_caps(struct ath_softc *sc, struct ieee80211_sta *sta, |
| 8121 | - bool is_cw40, bool is_sgi40) |
| 8122 | + bool is_cw40, bool is_sgi) |
| 8123 | { |
| 8124 | u8 caps = 0; |
| 8125 | |
| 8126 | @@ -1206,8 +1217,9 @@ static u8 ath_rc_build_ht_caps(struct at |
| 8127 | } |
| 8128 | if (is_cw40) |
| 8129 | caps |= WLAN_RC_40_FLAG; |
| 8130 | - if (is_sgi40) |
| 8131 | + if (is_sgi) |
| 8132 | caps |= WLAN_RC_SGI_FLAG; |
| 8133 | + |
| 8134 | } |
| 8135 | |
| 8136 | return caps; |
| 8137 | @@ -1272,7 +1284,8 @@ static void ath_tx_status(void *priv, st |
| 8138 | tx_status = 1; |
| 8139 | |
| 8140 | ath_rc_tx_status(sc, ath_rc_priv, tx_info, final_ts_idx, tx_status, |
| 8141 | - (is_underrun) ? sc->hw->max_rate_tries : long_retry); |
| 8142 | + (is_underrun) ? sc->hw->max_rate_tries : long_retry, |
| 8143 | + skb_get_queue_mapping(skb)); |
| 8144 | |
| 8145 | /* Check if aggregation has to be enabled for this tid */ |
| 8146 | if (conf_is_ht(&sc->hw->conf) && |
| 8147 | @@ -1300,7 +1313,7 @@ static void ath_rate_init(void *priv, st |
| 8148 | struct ath_softc *sc = priv; |
| 8149 | struct ath_rate_priv *ath_rc_priv = priv_sta; |
| 8150 | const struct ath_rate_table *rate_table; |
| 8151 | - bool is_cw40, is_sgi40; |
| 8152 | + bool is_cw40, is_sgi = false; |
| 8153 | int i, j = 0; |
| 8154 | |
| 8155 | for (i = 0; i < sband->n_bitrates; i++) { |
| 8156 | @@ -1323,7 +1336,11 @@ static void ath_rate_init(void *priv, st |
| 8157 | } |
| 8158 | |
| 8159 | is_cw40 = sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
| 8160 | - is_sgi40 = sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40; |
| 8161 | + |
| 8162 | + if (is_cw40) |
| 8163 | + is_sgi = sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40; |
| 8164 | + else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) |
| 8165 | + is_sgi = sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20; |
| 8166 | |
| 8167 | /* Choose rate table first */ |
| 8168 | |
| 8169 | @@ -1336,7 +1353,7 @@ static void ath_rate_init(void *priv, st |
| 8170 | rate_table = hw_rate_table[sc->cur_rate_mode]; |
| 8171 | } |
| 8172 | |
| 8173 | - ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, is_cw40, is_sgi40); |
| 8174 | + ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, is_cw40, is_sgi); |
| 8175 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); |
| 8176 | } |
| 8177 | |
| 8178 | @@ -1347,10 +1364,10 @@ static void ath_rate_update(void *priv, |
| 8179 | struct ath_softc *sc = priv; |
| 8180 | struct ath_rate_priv *ath_rc_priv = priv_sta; |
| 8181 | const struct ath_rate_table *rate_table = NULL; |
| 8182 | - bool oper_cw40 = false, oper_sgi40; |
| 8183 | + bool oper_cw40 = false, oper_sgi; |
| 8184 | bool local_cw40 = (ath_rc_priv->ht_cap & WLAN_RC_40_FLAG) ? |
| 8185 | true : false; |
| 8186 | - bool local_sgi40 = (ath_rc_priv->ht_cap & WLAN_RC_SGI_FLAG) ? |
| 8187 | + bool local_sgi = (ath_rc_priv->ht_cap & WLAN_RC_SGI_FLAG) ? |
| 8188 | true : false; |
| 8189 | |
| 8190 | /* FIXME: Handle AP mode later when we support CWM */ |
| 8191 | @@ -1363,15 +1380,21 @@ static void ath_rate_update(void *priv, |
| 8192 | oper_chan_type == NL80211_CHAN_HT40PLUS) |
| 8193 | oper_cw40 = true; |
| 8194 | |
| 8195 | - oper_sgi40 = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? |
| 8196 | - true : false; |
| 8197 | + if (oper_cw40) |
| 8198 | + oper_sgi = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? |
| 8199 | + true : false; |
| 8200 | + else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) |
| 8201 | + oper_sgi = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ? |
| 8202 | + true : false; |
| 8203 | + else |
| 8204 | + oper_sgi = false; |
| 8205 | |
| 8206 | - if ((local_cw40 != oper_cw40) || (local_sgi40 != oper_sgi40)) { |
| 8207 | + if ((local_cw40 != oper_cw40) || (local_sgi != oper_sgi)) { |
| 8208 | rate_table = ath_choose_rate_table(sc, sband->band, |
| 8209 | sta->ht_cap.ht_supported, |
| 8210 | oper_cw40); |
| 8211 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, |
| 8212 | - oper_cw40, oper_sgi40); |
| 8213 | + oper_cw40, oper_sgi); |
| 8214 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); |
| 8215 | |
| 8216 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, |
| 8217 | --- a/drivers/net/wireless/ath/ath9k/recv.c |
| 8218 | @@ -700,12 +700,16 @@ static bool ath_edma_get_buffers(struct |
| 8219 | bf = SKB_CB_ATHBUF(skb); |
| 8220 | BUG_ON(!bf); |
| 8221 | |
| 8222 | - dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, |
| 8223 | + dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, |
| 8224 | common->rx_bufsize, DMA_FROM_DEVICE); |
| 8225 | |
| 8226 | ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data); |
| 8227 | - if (ret == -EINPROGRESS) |
| 8228 | + if (ret == -EINPROGRESS) { |
| 8229 | + /*let device gain the buffer again*/ |
| 8230 | + dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, |
| 8231 | + common->rx_bufsize, DMA_FROM_DEVICE); |
| 8232 | return false; |
| 8233 | + } |
| 8234 | |
| 8235 | __skb_unlink(skb, &rx_edma->rx_fifo); |
| 8236 | if (ret == -EINVAL) { |
| 8237 | @@ -814,13 +818,266 @@ static struct ath_buf *ath_get_next_rx_b |
| 8238 | * 1. accessing the frame |
| 8239 | * 2. requeueing the same buffer to h/w |
| 8240 | */ |
| 8241 | - dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, |
| 8242 | + dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, |
| 8243 | common->rx_bufsize, |
| 8244 | DMA_FROM_DEVICE); |
| 8245 | |
| 8246 | return bf; |
| 8247 | } |
| 8248 | |
| 8249 | +/* Assumes you've already done the endian to CPU conversion */ |
| 8250 | +static bool ath9k_rx_accept(struct ath_common *common, |
| 8251 | + struct ieee80211_hdr *hdr, |
| 8252 | + struct ieee80211_rx_status *rxs, |
| 8253 | + struct ath_rx_status *rx_stats, |
| 8254 | + bool *decrypt_error) |
| 8255 | +{ |
| 8256 | + struct ath_hw *ah = common->ah; |
| 8257 | + __le16 fc; |
| 8258 | + u8 rx_status_len = ah->caps.rx_status_len; |
| 8259 | + |
| 8260 | + fc = hdr->frame_control; |
| 8261 | + |
| 8262 | + if (!rx_stats->rs_datalen) |
| 8263 | + return false; |
| 8264 | + /* |
| 8265 | + * rs_status follows rs_datalen so if rs_datalen is too large |
| 8266 | + * we can take a hint that hardware corrupted it, so ignore |
| 8267 | + * those frames. |
| 8268 | + */ |
| 8269 | + if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len)) |
| 8270 | + return false; |
| 8271 | + |
| 8272 | + /* |
| 8273 | + * rs_more indicates chained descriptors which can be used |
| 8274 | + * to link buffers together for a sort of scatter-gather |
| 8275 | + * operation. |
| 8276 | + * reject the frame, we don't support scatter-gather yet and |
| 8277 | + * the frame is probably corrupt anyway |
| 8278 | + */ |
| 8279 | + if (rx_stats->rs_more) |
| 8280 | + return false; |
| 8281 | + |
| 8282 | + /* |
| 8283 | + * The rx_stats->rs_status will not be set until the end of the |
| 8284 | + * chained descriptors so it can be ignored if rs_more is set. The |
| 8285 | + * rs_more will be false at the last element of the chained |
| 8286 | + * descriptors. |
| 8287 | + */ |
| 8288 | + if (rx_stats->rs_status != 0) { |
| 8289 | + if (rx_stats->rs_status & ATH9K_RXERR_CRC) |
| 8290 | + rxs->flag |= RX_FLAG_FAILED_FCS_CRC; |
| 8291 | + if (rx_stats->rs_status & ATH9K_RXERR_PHY) |
| 8292 | + return false; |
| 8293 | + |
| 8294 | + if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) { |
| 8295 | + *decrypt_error = true; |
| 8296 | + } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) { |
| 8297 | + if (ieee80211_is_ctl(fc)) |
| 8298 | + /* |
| 8299 | + * Sometimes, we get invalid |
| 8300 | + * MIC failures on valid control frames. |
| 8301 | + * Remove these mic errors. |
| 8302 | + */ |
| 8303 | + rx_stats->rs_status &= ~ATH9K_RXERR_MIC; |
| 8304 | + else |
| 8305 | + rxs->flag |= RX_FLAG_MMIC_ERROR; |
| 8306 | + } |
| 8307 | + /* |
| 8308 | + * Reject error frames with the exception of |
| 8309 | + * decryption and MIC failures. For monitor mode, |
| 8310 | + * we also ignore the CRC error. |
| 8311 | + */ |
| 8312 | + if (ah->opmode == NL80211_IFTYPE_MONITOR) { |
| 8313 | + if (rx_stats->rs_status & |
| 8314 | + ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | |
| 8315 | + ATH9K_RXERR_CRC)) |
| 8316 | + return false; |
| 8317 | + } else { |
| 8318 | + if (rx_stats->rs_status & |
| 8319 | + ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { |
| 8320 | + return false; |
| 8321 | + } |
| 8322 | + } |
| 8323 | + } |
| 8324 | + return true; |
| 8325 | +} |
| 8326 | + |
| 8327 | +static int ath9k_process_rate(struct ath_common *common, |
| 8328 | + struct ieee80211_hw *hw, |
| 8329 | + struct ath_rx_status *rx_stats, |
| 8330 | + struct ieee80211_rx_status *rxs) |
| 8331 | +{ |
| 8332 | + struct ieee80211_supported_band *sband; |
| 8333 | + enum ieee80211_band band; |
| 8334 | + unsigned int i = 0; |
| 8335 | + |
| 8336 | + band = hw->conf.channel->band; |
| 8337 | + sband = hw->wiphy->bands[band]; |
| 8338 | + |
| 8339 | + if (rx_stats->rs_rate & 0x80) { |
| 8340 | + /* HT rate */ |
| 8341 | + rxs->flag |= RX_FLAG_HT; |
| 8342 | + if (rx_stats->rs_flags & ATH9K_RX_2040) |
| 8343 | + rxs->flag |= RX_FLAG_40MHZ; |
| 8344 | + if (rx_stats->rs_flags & ATH9K_RX_GI) |
| 8345 | + rxs->flag |= RX_FLAG_SHORT_GI; |
| 8346 | + rxs->rate_idx = rx_stats->rs_rate & 0x7f; |
| 8347 | + return 0; |
| 8348 | + } |
| 8349 | + |
| 8350 | + for (i = 0; i < sband->n_bitrates; i++) { |
| 8351 | + if (sband->bitrates[i].hw_value == rx_stats->rs_rate) { |
| 8352 | + rxs->rate_idx = i; |
| 8353 | + return 0; |
| 8354 | + } |
| 8355 | + if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) { |
| 8356 | + rxs->flag |= RX_FLAG_SHORTPRE; |
| 8357 | + rxs->rate_idx = i; |
| 8358 | + return 0; |
| 8359 | + } |
| 8360 | + } |
| 8361 | + |
| 8362 | + /* |
| 8363 | + * No valid hardware bitrate found -- we should not get here |
| 8364 | + * because hardware has already validated this frame as OK. |
| 8365 | + */ |
| 8366 | + ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected " |
| 8367 | + "0x%02x using 1 Mbit\n", rx_stats->rs_rate); |
| 8368 | + |
| 8369 | + return -EINVAL; |
| 8370 | +} |
| 8371 | + |
| 8372 | +static void ath9k_process_rssi(struct ath_common *common, |
| 8373 | + struct ieee80211_hw *hw, |
| 8374 | + struct ieee80211_hdr *hdr, |
| 8375 | + struct ath_rx_status *rx_stats) |
| 8376 | +{ |
| 8377 | + struct ath_hw *ah = common->ah; |
| 8378 | + struct ieee80211_sta *sta; |
| 8379 | + struct ath_node *an; |
| 8380 | + int last_rssi = ATH_RSSI_DUMMY_MARKER; |
| 8381 | + __le16 fc; |
| 8382 | + |
| 8383 | + fc = hdr->frame_control; |
| 8384 | + |
| 8385 | + rcu_read_lock(); |
| 8386 | + /* |
| 8387 | + * XXX: use ieee80211_find_sta! This requires quite a bit of work |
| 8388 | + * under the current ath9k virtual wiphy implementation as we have |
| 8389 | + * no way of tying a vif to wiphy. Typically vifs are attached to |
| 8390 | + * at least one sdata of a wiphy on mac80211 but with ath9k virtual |
| 8391 | + * wiphy you'd have to iterate over every wiphy and each sdata. |
| 8392 | + */ |
| 8393 | + sta = ieee80211_find_sta_by_hw(hw, hdr->addr2); |
| 8394 | + if (sta) { |
| 8395 | + an = (struct ath_node *) sta->drv_priv; |
| 8396 | + if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && |
| 8397 | + !rx_stats->rs_moreaggr) |
| 8398 | + ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi); |
| 8399 | + last_rssi = an->last_rssi; |
| 8400 | + } |
| 8401 | + rcu_read_unlock(); |
| 8402 | + |
| 8403 | + if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) |
| 8404 | + rx_stats->rs_rssi = ATH_EP_RND(last_rssi, |
| 8405 | + ATH_RSSI_EP_MULTIPLIER); |
| 8406 | + if (rx_stats->rs_rssi < 0) |
| 8407 | + rx_stats->rs_rssi = 0; |
| 8408 | + |
| 8409 | + /* Update Beacon RSSI, this is used by ANI. */ |
| 8410 | + if (ieee80211_is_beacon(fc)) |
| 8411 | + ah->stats.avgbrssi = rx_stats->rs_rssi; |
| 8412 | +} |
| 8413 | + |
| 8414 | +/* |
| 8415 | + * For Decrypt or Demic errors, we only mark packet status here and always push |
| 8416 | + * up the frame up to let mac80211 handle the actual error case, be it no |
| 8417 | + * decryption key or real decryption error. This let us keep statistics there. |
| 8418 | + */ |
| 8419 | +static int ath9k_rx_skb_preprocess(struct ath_common *common, |
| 8420 | + struct ieee80211_hw *hw, |
| 8421 | + struct ieee80211_hdr *hdr, |
| 8422 | + struct ath_rx_status *rx_stats, |
| 8423 | + struct ieee80211_rx_status *rx_status, |
| 8424 | + bool *decrypt_error) |
| 8425 | +{ |
| 8426 | + struct ath_hw *ah = common->ah; |
| 8427 | + |
| 8428 | + memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); |
| 8429 | + |
| 8430 | + /* |
| 8431 | + * everything but the rate is checked here, the rate check is done |
| 8432 | + * separately to avoid doing two lookups for a rate for each frame. |
| 8433 | + */ |
| 8434 | + if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error)) |
| 8435 | + return -EINVAL; |
| 8436 | + |
| 8437 | + ath9k_process_rssi(common, hw, hdr, rx_stats); |
| 8438 | + |
| 8439 | + if (ath9k_process_rate(common, hw, rx_stats, rx_status)) |
| 8440 | + return -EINVAL; |
| 8441 | + |
| 8442 | + rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp); |
| 8443 | + rx_status->band = hw->conf.channel->band; |
| 8444 | + rx_status->freq = hw->conf.channel->center_freq; |
| 8445 | + rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi; |
| 8446 | + rx_status->antenna = rx_stats->rs_antenna; |
| 8447 | + rx_status->flag |= RX_FLAG_TSFT; |
| 8448 | + |
| 8449 | + return 0; |
| 8450 | +} |
| 8451 | + |
| 8452 | +static void ath9k_rx_skb_postprocess(struct ath_common *common, |
| 8453 | + struct sk_buff *skb, |
| 8454 | + struct ath_rx_status *rx_stats, |
| 8455 | + struct ieee80211_rx_status *rxs, |
| 8456 | + bool decrypt_error) |
| 8457 | +{ |
| 8458 | + struct ath_hw *ah = common->ah; |
| 8459 | + struct ieee80211_hdr *hdr; |
| 8460 | + int hdrlen, padpos, padsize; |
| 8461 | + u8 keyix; |
| 8462 | + __le16 fc; |
| 8463 | + |
| 8464 | + /* see if any padding is done by the hw and remove it */ |
| 8465 | + hdr = (struct ieee80211_hdr *) skb->data; |
| 8466 | + hdrlen = ieee80211_get_hdrlen_from_skb(skb); |
| 8467 | + fc = hdr->frame_control; |
| 8468 | + padpos = ath9k_cmn_padpos(hdr->frame_control); |
| 8469 | + |
| 8470 | + /* The MAC header is padded to have 32-bit boundary if the |
| 8471 | + * packet payload is non-zero. The general calculation for |
| 8472 | + * padsize would take into account odd header lengths: |
| 8473 | + * padsize = (4 - padpos % 4) % 4; However, since only |
| 8474 | + * even-length headers are used, padding can only be 0 or 2 |
| 8475 | + * bytes and we can optimize this a bit. In addition, we must |
| 8476 | + * not try to remove padding from short control frames that do |
| 8477 | + * not have payload. */ |
| 8478 | + padsize = padpos & 3; |
| 8479 | + if (padsize && skb->len>=padpos+padsize+FCS_LEN) { |
| 8480 | + memmove(skb->data + padsize, skb->data, padpos); |
| 8481 | + skb_pull(skb, padsize); |
| 8482 | + } |
| 8483 | + |
| 8484 | + keyix = rx_stats->rs_keyix; |
| 8485 | + |
| 8486 | + if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error && |
| 8487 | + ieee80211_has_protected(fc)) { |
| 8488 | + rxs->flag |= RX_FLAG_DECRYPTED; |
| 8489 | + } else if (ieee80211_has_protected(fc) |
| 8490 | + && !decrypt_error && skb->len >= hdrlen + 4) { |
| 8491 | + keyix = skb->data[hdrlen + 3] >> 6; |
| 8492 | + |
| 8493 | + if (test_bit(keyix, common->keymap)) |
| 8494 | + rxs->flag |= RX_FLAG_DECRYPTED; |
| 8495 | + } |
| 8496 | + if (ah->sw_mgmt_crypto && |
| 8497 | + (rxs->flag & RX_FLAG_DECRYPTED) && |
| 8498 | + ieee80211_is_mgmt(fc)) |
| 8499 | + /* Use software decrypt for management frames. */ |
| 8500 | + rxs->flag &= ~RX_FLAG_DECRYPTED; |
| 8501 | +} |
| 8502 | |
| 8503 | int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) |
| 8504 | { |
| 8505 | @@ -829,6 +1086,7 @@ int ath_rx_tasklet(struct ath_softc *sc, |
| 8506 | struct ieee80211_rx_status *rxs; |
| 8507 | struct ath_hw *ah = sc->sc_ah; |
| 8508 | struct ath_common *common = ath9k_hw_common(ah); |
| 8509 | + u32 *rx_desc = NULL; |
| 8510 | /* |
| 8511 | * The hw can techncically differ from common->hw when using ath9k |
| 8512 | * virtual wiphy so to account for that we iterate over the active |
| 8513 | @@ -842,6 +1100,7 @@ int ath_rx_tasklet(struct ath_softc *sc, |
| 8514 | enum ath9k_rx_qtype qtype; |
| 8515 | bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); |
| 8516 | int dma_type; |
| 8517 | + u8 rx_status_len = ah->caps.rx_status_len; |
| 8518 | |
| 8519 | if (edma) |
| 8520 | dma_type = DMA_FROM_DEVICE; |
| 8521 | @@ -869,7 +1128,7 @@ int ath_rx_tasklet(struct ath_softc *sc, |
| 8522 | if (!skb) |
| 8523 | continue; |
| 8524 | |
| 8525 | - hdr = (struct ieee80211_hdr *) skb->data; |
| 8526 | + hdr = (struct ieee80211_hdr *) (skb->data + rx_status_len); |
| 8527 | rxs = IEEE80211_SKB_RXCB(skb); |
| 8528 | |
| 8529 | hw = ath_get_virt_hw(sc, hdr); |
| 8530 | @@ -883,8 +1142,8 @@ int ath_rx_tasklet(struct ath_softc *sc, |
| 8531 | if (flush) |
| 8532 | goto requeue; |
| 8533 | |
| 8534 | - retval = ath9k_cmn_rx_skb_preprocess(common, hw, skb, &rs, |
| 8535 | - rxs, &decrypt_error); |
| 8536 | + retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs, |
| 8537 | + rxs, &decrypt_error); |
| 8538 | if (retval) |
| 8539 | goto requeue; |
| 8540 | |
| 8541 | @@ -905,11 +1164,23 @@ int ath_rx_tasklet(struct ath_softc *sc, |
| 8542 | dma_type); |
| 8543 | |
| 8544 | skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len); |
| 8545 | - if (ah->caps.rx_status_len) |
| 8546 | + if (ah->caps.rx_status_len) { |
| 8547 | + rx_desc = kzalloc(ah->caps.rx_status_len, GFP_ATOMIC); |
| 8548 | + if (rx_desc == NULL) |
| 8549 | + BUG_ON(1); |
| 8550 | + memcpy(rx_desc, skb->data, ah->caps.rx_status_len); |
| 8551 | skb_pull(skb, ah->caps.rx_status_len); |
| 8552 | + } |
| 8553 | + |
| 8554 | + ath9k_rx_skb_postprocess(common, skb, &rs, |
| 8555 | + rxs, decrypt_error); |
| 8556 | |
| 8557 | - ath9k_cmn_rx_skb_postprocess(common, skb, &rs, |
| 8558 | - rxs, decrypt_error); |
| 8559 | + if (rx_desc) { |
| 8560 | + ath_pktlog_rx(sc, (void *) rx_desc, skb); |
| 8561 | + kfree(rx_desc); |
| 8562 | + } else { |
| 8563 | + ath_pktlog_rx(sc, bf->bf_desc, skb); |
| 8564 | + } |
| 8565 | |
| 8566 | /* We will now give hardware our shiny new allocated skb */ |
| 8567 | bf->bf_mpdu = requeue_skb; |
| 8568 | --- a/drivers/net/wireless/ath/ath9k/reg.h |
| 8569 | @@ -222,6 +222,7 @@ |
| 8570 | |
| 8571 | #define AR_ISR_S2 0x008c |
| 8572 | #define AR_ISR_S2_QCU_TXURN 0x000003FF |
| 8573 | +#define AR_ISR_S2_BB_WATCHDOG 0x00010000 |
| 8574 | #define AR_ISR_S2_CST 0x00400000 |
| 8575 | #define AR_ISR_S2_GTT 0x00800000 |
| 8576 | #define AR_ISR_S2_TIM 0x01000000 |
| 8577 | --- a/drivers/net/wireless/ath/ath9k/xmit.c |
| 8578 | @@ -418,6 +418,8 @@ static void ath_tx_complete_aggr(struct |
| 8579 | list_move_tail(&bf->list, &bf_head); |
| 8580 | } |
| 8581 | |
| 8582 | + ath9k_pktlog_txcomplete(sc, &bf_head, bf, bf_last); |
| 8583 | + |
| 8584 | if (!txpending) { |
| 8585 | /* |
| 8586 | * complete the acked-ones/xretried ones; update |
| 8587 | @@ -1728,6 +1730,8 @@ static int ath_tx_setup_buffer(struct ie |
| 8588 | } else |
| 8589 | bf->bf_isnullfunc = false; |
| 8590 | |
| 8591 | + bf->bf_tx_aborted = false; |
| 8592 | + |
| 8593 | return 0; |
| 8594 | } |
| 8595 | |
| 8596 | @@ -1989,7 +1993,7 @@ static int ath_tx_num_badfrms(struct ath |
| 8597 | int nbad = 0; |
| 8598 | int isaggr = 0; |
| 8599 | |
| 8600 | - if (bf->bf_tx_aborted) |
| 8601 | + if (bf->bf_lastbf->bf_tx_aborted) |
| 8602 | return 0; |
| 8603 | |
| 8604 | isaggr = bf_isaggr(bf); |
| 8605 | @@ -2115,7 +2119,7 @@ static void ath_tx_processq(struct ath_s |
| 8606 | ds = lastbf->bf_desc; |
| 8607 | |
| 8608 | memset(&ts, 0, sizeof(ts)); |
| 8609 | - status = ath9k_hw_txprocdesc(ah, ds, &ts); |
| 8610 | + status = ath9k_hw_txprocdesc(ah, ds, &ts, NULL); |
| 8611 | if (status == -EINPROGRESS) { |
| 8612 | spin_unlock_bh(&txq->axq_lock); |
| 8613 | break; |
| 8614 | @@ -2165,10 +2169,14 @@ static void ath_tx_processq(struct ath_s |
| 8615 | ath_tx_rc_status(bf, &ts, 0, txok, true); |
| 8616 | } |
| 8617 | |
| 8618 | - if (bf_isampdu(bf)) |
| 8619 | + if (bf_isampdu(bf)) { |
| 8620 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, txok); |
| 8621 | - else |
| 8622 | + } else { |
| 8623 | + ath9k_pktlog_txctrl(sc, &bf_head, lastbf); |
| 8624 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, txok, 0); |
| 8625 | + } |
| 8626 | + |
| 8627 | + ath_pktlog_txstatus(sc, lastbf->bf_desc); |
| 8628 | |
| 8629 | ath_wake_mac80211_queue(sc, txq); |
| 8630 | |
| 8631 | @@ -2240,9 +2248,11 @@ void ath_tx_edma_tasklet(struct ath_soft |
| 8632 | struct list_head bf_head; |
| 8633 | int status; |
| 8634 | int txok; |
| 8635 | + u32 txs_desc[9]; |
| 8636 | |
| 8637 | for (;;) { |
| 8638 | - status = ath9k_hw_txprocdesc(ah, NULL, (void *)&txs); |
| 8639 | + status = ath9k_hw_txprocdesc(ah, NULL, (void *)&txs, |
| 8640 | + (void *) txs_desc); |
| 8641 | if (status == -EINPROGRESS) |
| 8642 | break; |
| 8643 | if (status == -EIO) { |
| 8644 | @@ -2277,6 +2287,17 @@ void ath_tx_edma_tasklet(struct ath_soft |
| 8645 | |
| 8646 | txok = !(txs.ts_status & ATH9K_TXERR_MASK); |
| 8647 | |
| 8648 | + /* |
| 8649 | + * Make sure null func frame is acked before configuring |
| 8650 | + * hw into ps mode. |
| 8651 | + */ |
| 8652 | + if (bf->bf_isnullfunc && txok) { |
| 8653 | + if ((sc->ps_flags & PS_ENABLED)) |
| 8654 | + ath9k_enable_ps(sc); |
| 8655 | + else |
| 8656 | + sc->ps_flags |= PS_NULLFUNC_COMPLETED; |
| 8657 | + } |
| 8658 | + |
| 8659 | if (!bf_isampdu(bf)) { |
| 8660 | bf->bf_retries = txs.ts_longretry; |
| 8661 | if (txs.ts_status & ATH9K_TXERR_XRETRY) |
| 8662 | @@ -2284,14 +2305,18 @@ void ath_tx_edma_tasklet(struct ath_soft |
| 8663 | ath_tx_rc_status(bf, &txs, 0, txok, true); |
| 8664 | } |
| 8665 | |
| 8666 | - if (bf_isampdu(bf)) |
| 8667 | + if (bf_isampdu(bf)) { |
| 8668 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, &txs, txok); |
| 8669 | - else |
| 8670 | + } else { |
| 8671 | + ath9k_pktlog_txctrl(sc, &bf_head, lastbf); |
| 8672 | ath_tx_complete_buf(sc, bf, txq, &bf_head, |
| 8673 | &txs, txok, 0); |
| 8674 | + } |
| 8675 | |
| 8676 | ath_wake_mac80211_queue(sc, txq); |
| 8677 | |
| 8678 | + ath_pktlog_txstatus(sc, txs_desc); |
| 8679 | + |
| 8680 | spin_lock_bh(&txq->axq_lock); |
| 8681 | if (!list_empty(&txq->txq_fifo_pending)) { |
| 8682 | INIT_LIST_HEAD(&bf_head); |
| 8683 | --- a/net/mac80211/Kconfig |
| 8684 | @@ -33,6 +33,13 @@ config MAC80211_RC_MINSTREL |
| 8685 | ---help--- |
| 8686 | This option enables the 'minstrel' TX rate control algorithm |
| 8687 | |
| 8688 | +config MAC80211_RC_MINSTREL_HT |
| 8689 | + bool "Minstrel 802.11n support" if EMBEDDED |
| 8690 | + depends on MAC80211_RC_MINSTREL |
| 8691 | + default y |
| 8692 | + ---help--- |
| 8693 | + This option enables the 'minstrel_ht' TX rate control algorithm |
| 8694 | + |
| 8695 | choice |
| 8696 | prompt "Default rate control algorithm" |
| 8697 | depends on MAC80211_HAS_RC |
| 8698 | --- a/net/mac80211/Makefile |
| 8699 | @@ -51,7 +51,11 @@ rc80211_pid-$(CONFIG_MAC80211_DEBUGFS) + |
| 8700 | rc80211_minstrel-y := rc80211_minstrel.o |
| 8701 | rc80211_minstrel-$(CONFIG_MAC80211_DEBUGFS) += rc80211_minstrel_debugfs.o |
| 8702 | |
| 8703 | +rc80211_minstrel_ht-y := rc80211_minstrel_ht.o |
| 8704 | +rc80211_minstrel_ht-$(CONFIG_MAC80211_DEBUGFS) += rc80211_minstrel_ht_debugfs.o |
| 8705 | + |
| 8706 | mac80211-$(CONFIG_MAC80211_RC_PID) += $(rc80211_pid-y) |
| 8707 | mac80211-$(CONFIG_MAC80211_RC_MINSTREL) += $(rc80211_minstrel-y) |
| 8708 | +mac80211-$(CONFIG_MAC80211_RC_MINSTREL_HT) += $(rc80211_minstrel_ht-y) |
| 8709 | |
| 8710 | ccflags-y += -D__CHECK_ENDIAN__ |
| 8711 | --- a/net/mac80211/main.c |
| 8712 | @@ -710,6 +710,10 @@ static int __init ieee80211_init(void) |
| 8713 | if (ret) |
| 8714 | return ret; |
| 8715 | |
| 8716 | + ret = rc80211_minstrel_ht_init(); |
| 8717 | + if (ret) |
| 8718 | + goto err_minstrel; |
| 8719 | + |
| 8720 | ret = rc80211_pid_init(); |
| 8721 | if (ret) |
| 8722 | goto err_pid; |
| 8723 | @@ -722,6 +726,8 @@ static int __init ieee80211_init(void) |
| 8724 | err_netdev: |
| 8725 | rc80211_pid_exit(); |
| 8726 | err_pid: |
| 8727 | + rc80211_minstrel_ht_exit(); |
| 8728 | + err_minstrel: |
| 8729 | rc80211_minstrel_exit(); |
| 8730 | |
| 8731 | return ret; |
| 8732 | @@ -730,6 +736,7 @@ static int __init ieee80211_init(void) |
| 8733 | static void __exit ieee80211_exit(void) |
| 8734 | { |
| 8735 | rc80211_pid_exit(); |
| 8736 | + rc80211_minstrel_ht_exit(); |
| 8737 | rc80211_minstrel_exit(); |
| 8738 | |
| 8739 | /* |
| 8740 | --- a/net/mac80211/rate.h |
| 8741 | @@ -147,5 +147,18 @@ static inline void rc80211_minstrel_exit |
| 8742 | } |
| 8743 | #endif |
| 8744 | |
| 8745 | +#ifdef CONFIG_MAC80211_RC_MINSTREL_HT |
| 8746 | +extern int rc80211_minstrel_ht_init(void); |
| 8747 | +extern void rc80211_minstrel_ht_exit(void); |
| 8748 | +#else |
| 8749 | +static inline int rc80211_minstrel_ht_init(void) |
| 8750 | +{ |
| 8751 | + return 0; |
| 8752 | +} |
| 8753 | +static inline void rc80211_minstrel_ht_exit(void) |
| 8754 | +{ |
| 8755 | +} |
| 8756 | +#endif |
| 8757 | + |
| 8758 | |
| 8759 | #endif /* IEEE80211_RATE_H */ |
| 8760 | --- /dev/null |
| 8761 | @@ -0,0 +1,824 @@ |
| 8762 | +/* |
| 8763 | + * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org> |
| 8764 | + * |
| 8765 | + * This program is free software; you can redistribute it and/or modify |
| 8766 | + * it under the terms of the GNU General Public License version 2 as |
| 8767 | + * published by the Free Software Foundation. |
| 8768 | + */ |
| 8769 | +#include <linux/netdevice.h> |
| 8770 | +#include <linux/types.h> |
| 8771 | +#include <linux/skbuff.h> |
| 8772 | +#include <linux/debugfs.h> |
| 8773 | +#include <linux/random.h> |
| 8774 | +#include <linux/ieee80211.h> |
| 8775 | +#include <net/mac80211.h> |
| 8776 | +#include "rate.h" |
| 8777 | +#include "rc80211_minstrel.h" |
| 8778 | +#include "rc80211_minstrel_ht.h" |
| 8779 | + |
| 8780 | +#define AVG_PKT_SIZE 1200 |
| 8781 | +#define SAMPLE_COLUMNS 10 |
| 8782 | +#define EWMA_LEVEL 75 |
| 8783 | + |
| 8784 | +/* Number of bits for an average sized packet */ |
| 8785 | +#define MCS_NBITS (AVG_PKT_SIZE << 3) |
| 8786 | + |
| 8787 | +/* Number of symbols for a packet with (bps) bits per symbol */ |
| 8788 | +#define MCS_NSYMS(bps) ((MCS_NBITS + (bps) - 1) / (bps)) |
| 8789 | + |
| 8790 | +/* Transmission time for a packet containing (syms) symbols */ |
| 8791 | +#define MCS_SYMBOL_TIME(sgi, syms) \ |
| 8792 | + (sgi ? \ |
| 8793 | + ((syms) * 18 + 4) / 5 : /* syms * 3.6 us */ \ |
| 8794 | + (syms) << 2 /* syms * 4 us */ \ |
| 8795 | + ) |
| 8796 | + |
| 8797 | +/* Transmit duration for the raw data part of an average sized packet */ |
| 8798 | +#define MCS_DURATION(streams, sgi, bps) MCS_SYMBOL_TIME(sgi, MCS_NSYMS((streams) * (bps))) |
| 8799 | + |
| 8800 | +/* MCS rate information for an MCS group */ |
| 8801 | +#define MCS_GROUP(_streams, _sgi, _ht40) { \ |
| 8802 | + .streams = _streams, \ |
| 8803 | + .flags = \ |
| 8804 | + (_sgi ? IEEE80211_TX_RC_SHORT_GI : 0) | \ |
| 8805 | + (_ht40 ? IEEE80211_TX_RC_40_MHZ_WIDTH : 0), \ |
| 8806 | + .duration = { \ |
| 8807 | + MCS_DURATION(_streams, _sgi, _ht40 ? 54 : 26), \ |
| 8808 | + MCS_DURATION(_streams, _sgi, _ht40 ? 108 : 52), \ |
| 8809 | + MCS_DURATION(_streams, _sgi, _ht40 ? 162 : 78), \ |
| 8810 | + MCS_DURATION(_streams, _sgi, _ht40 ? 216 : 104), \ |
| 8811 | + MCS_DURATION(_streams, _sgi, _ht40 ? 324 : 156), \ |
| 8812 | + MCS_DURATION(_streams, _sgi, _ht40 ? 432 : 208), \ |
| 8813 | + MCS_DURATION(_streams, _sgi, _ht40 ? 486 : 234), \ |
| 8814 | + MCS_DURATION(_streams, _sgi, _ht40 ? 540 : 260) \ |
| 8815 | + } \ |
| 8816 | +} |
| 8817 | + |
| 8818 | +/* |
| 8819 | + * To enable sufficiently targeted rate sampling, MCS rates are divided into |
| 8820 | + * groups, based on the number of streams and flags (HT40, SGI) that they |
| 8821 | + * use. |
| 8822 | + */ |
| 8823 | +const struct mcs_group minstrel_mcs_groups[] = { |
| 8824 | + MCS_GROUP(1, 0, 0), |
| 8825 | + MCS_GROUP(2, 0, 0), |
| 8826 | +#if MINSTREL_MAX_STREAMS >= 3 |
| 8827 | + MCS_GROUP(3, 0, 0), |
| 8828 | +#endif |
| 8829 | + |
| 8830 | + MCS_GROUP(1, 1, 0), |
| 8831 | + MCS_GROUP(2, 1, 0), |
| 8832 | +#if MINSTREL_MAX_STREAMS >= 3 |
| 8833 | + MCS_GROUP(3, 1, 0), |
| 8834 | +#endif |
| 8835 | + |
| 8836 | + MCS_GROUP(1, 0, 1), |
| 8837 | + MCS_GROUP(2, 0, 1), |
| 8838 | +#if MINSTREL_MAX_STREAMS >= 3 |
| 8839 | + MCS_GROUP(3, 0, 1), |
| 8840 | +#endif |
| 8841 | + |
| 8842 | + MCS_GROUP(1, 1, 1), |
| 8843 | + MCS_GROUP(2, 1, 1), |
| 8844 | +#if MINSTREL_MAX_STREAMS >= 3 |
| 8845 | + MCS_GROUP(3, 1, 1), |
| 8846 | +#endif |
| 8847 | +}; |
| 8848 | + |
| 8849 | +static u8 sample_table[SAMPLE_COLUMNS][MCS_GROUP_RATES]; |
| 8850 | + |
| 8851 | +/* |
| 8852 | + * Perform EWMA (Exponentially Weighted Moving Average) calculation |
| 8853 | + */ |
| 8854 | +static int |
| 8855 | +minstrel_ewma(int old, int new, int weight) |
| 8856 | +{ |
| 8857 | + return (new * (100 - weight) + old * weight) / 100; |
| 8858 | +} |
| 8859 | + |
| 8860 | +/* |
| 8861 | + * Look up an MCS group index based on mac80211 rate information |
| 8862 | + */ |
| 8863 | +static int |
| 8864 | +minstrel_ht_get_group_idx(struct ieee80211_tx_rate *rate) |
| 8865 | +{ |
| 8866 | + int streams = (rate->idx / MCS_GROUP_RATES) + 1; |
| 8867 | + u32 flags = IEEE80211_TX_RC_SHORT_GI | IEEE80211_TX_RC_40_MHZ_WIDTH; |
| 8868 | + int i; |
| 8869 | + |
| 8870 | + for (i = 0; i < ARRAY_SIZE(minstrel_mcs_groups); i++) { |
| 8871 | + if (minstrel_mcs_groups[i].streams != streams) |
| 8872 | + continue; |
| 8873 | + if (minstrel_mcs_groups[i].flags != (rate->flags & flags)) |
| 8874 | + continue; |
| 8875 | + |
| 8876 | + return i; |
| 8877 | + } |
| 8878 | + |
| 8879 | + WARN_ON(1); |
| 8880 | + return 0; |
| 8881 | +} |
| 8882 | + |
| 8883 | +static inline struct minstrel_rate_stats * |
| 8884 | +minstrel_get_ratestats(struct minstrel_ht_sta *mi, int index) |
| 8885 | +{ |
| 8886 | + return &mi->groups[index / MCS_GROUP_RATES].rates[index % MCS_GROUP_RATES]; |
| 8887 | +} |
| 8888 | + |
| 8889 | + |
| 8890 | +/* |
| 8891 | + * Recalculate success probabilities and counters for a rate using EWMA |
| 8892 | + */ |
| 8893 | +static void |
| 8894 | +minstrel_calc_rate_ewma(struct minstrel_priv *mp, struct minstrel_rate_stats *mr) |
| 8895 | +{ |
| 8896 | + if (unlikely(mr->attempts > 0)) { |
| 8897 | + mr->sample_skipped = 0; |
| 8898 | + mr->cur_prob = MINSTREL_FRAC(mr->success, mr->attempts); |
| 8899 | + if (!mr->att_hist) |
| 8900 | + mr->probability = mr->cur_prob; |
| 8901 | + else |
| 8902 | + mr->probability = minstrel_ewma(mr->probability, |
| 8903 | + mr->cur_prob, EWMA_LEVEL); |
| 8904 | + mr->att_hist += mr->attempts; |
| 8905 | + mr->succ_hist += mr->success; |
| 8906 | + } else { |
| 8907 | + mr->sample_skipped++; |
| 8908 | + } |
| 8909 | + mr->last_success = mr->success; |
| 8910 | + mr->last_attempts = mr->attempts; |
| 8911 | + mr->success = 0; |
| 8912 | + mr->attempts = 0; |
| 8913 | +} |
| 8914 | + |
| 8915 | +/* |
| 8916 | + * Calculate throughput based on the average A-MPDU length, taking into account |
| 8917 | + * the expected number of retransmissions and their expected length |
| 8918 | + */ |
| 8919 | +static void |
| 8920 | +minstrel_ht_calc_tp(struct minstrel_priv *mp, struct minstrel_ht_sta *mi, |
| 8921 | + int group, int rate) |
| 8922 | +{ |
| 8923 | + struct minstrel_rate_stats *mr; |
| 8924 | + unsigned int usecs; |
| 8925 | + |
| 8926 | + mr = &mi->groups[group].rates[rate]; |
| 8927 | + |
| 8928 | + if (mr->probability < MINSTREL_FRAC(1, 10)) { |
| 8929 | + mr->cur_tp = 0; |
| 8930 | + return; |
| 8931 | + } |
| 8932 | + |
| 8933 | + usecs = mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len); |
| 8934 | + usecs += minstrel_mcs_groups[group].duration[rate]; |
| 8935 | + mr->cur_tp = MINSTREL_TRUNC((1000000 / usecs) * mr->probability); |
| 8936 | +} |
| 8937 | + |
| 8938 | +/* |
| 8939 | + * Update rate statistics and select new primary rates |
| 8940 | + * |
| 8941 | + * Rules for rate selection: |
| 8942 | + * - max_prob_rate must use only one stream, as a tradeoff between delivery |
| 8943 | + * probability and throughput during strong fluctuations |
| 8944 | + * - as long as the max prob rate has a probability of more than 3/4, pick |
| 8945 | + * higher throughput rates, even if the probablity is a bit lower |
| 8946 | + */ |
| 8947 | +static void |
| 8948 | +minstrel_ht_update_stats(struct minstrel_priv *mp, struct minstrel_ht_sta *mi) |
| 8949 | +{ |
| 8950 | + struct minstrel_mcs_group_data *mg; |
| 8951 | + struct minstrel_rate_stats *mr; |
| 8952 | + int cur_prob, cur_prob_tp, cur_tp, cur_tp2; |
| 8953 | + int group, i, index; |
| 8954 | + |
| 8955 | + if (mi->ampdu_packets > 0) { |
| 8956 | + mi->avg_ampdu_len = minstrel_ewma(mi->avg_ampdu_len, |
| 8957 | + MINSTREL_FRAC(mi->ampdu_len, mi->ampdu_packets), EWMA_LEVEL); |
| 8958 | + mi->ampdu_len = 0; |
| 8959 | + mi->ampdu_packets = 0; |
| 8960 | + } |
| 8961 | + |
| 8962 | + mi->sample_slow = 0; |
| 8963 | + mi->sample_count = 0; |
| 8964 | + mi->max_tp_rate = 0; |
| 8965 | + mi->max_tp_rate2 = 0; |
| 8966 | + mi->max_prob_rate = 0; |
| 8967 | + |
| 8968 | + for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) { |
| 8969 | + cur_prob = 0; |
| 8970 | + cur_prob_tp = 0; |
| 8971 | + cur_tp = 0; |
| 8972 | + cur_tp2 = 0; |
| 8973 | + |
| 8974 | + mg = &mi->groups[group]; |
| 8975 | + if (!mg->supported) |
| 8976 | + continue; |
| 8977 | + |
| 8978 | + mg->max_tp_rate = 0; |
| 8979 | + mg->max_tp_rate2 = 0; |
| 8980 | + mg->max_prob_rate = 0; |
| 8981 | + mi->sample_count++; |
| 8982 | + |
| 8983 | + for (i = 0; i < MCS_GROUP_RATES; i++) { |
| 8984 | + if (!(mg->supported & BIT(i))) |
| 8985 | + continue; |
| 8986 | + |
| 8987 | + mr = &mg->rates[i]; |
| 8988 | + mr->retry_updated = false; |
| 8989 | + index = MCS_GROUP_RATES * group + i; |
| 8990 | + minstrel_calc_rate_ewma(mp, mr); |
| 8991 | + minstrel_ht_calc_tp(mp, mi, group, i); |
| 8992 | + |
| 8993 | + if (!mr->cur_tp) |
| 8994 | + continue; |
| 8995 | + |
| 8996 | + /* ignore the lowest rate of each single-stream group */ |
| 8997 | + if (!i && minstrel_mcs_groups[group].streams == 1) |
| 8998 | + continue; |
| 8999 | + |
| 9000 | + if ((mr->cur_tp > cur_prob_tp && mr->probability > |
| 9001 | + MINSTREL_FRAC(3, 4)) || mr->probability > cur_prob) { |
| 9002 | + mg->max_prob_rate = index; |
| 9003 | + cur_prob = mr->probability; |
| 9004 | + } |
| 9005 | + |
| 9006 | + if (mr->cur_tp > cur_tp) { |
| 9007 | + swap(index, mg->max_tp_rate); |
| 9008 | + cur_tp = mr->cur_tp; |
| 9009 | + mr = minstrel_get_ratestats(mi, index); |
| 9010 | + } |
| 9011 | + |
| 9012 | + if (index >= mg->max_tp_rate) |
| 9013 | + continue; |
| 9014 | + |
| 9015 | + if (mr->cur_tp > cur_tp2) { |
| 9016 | + mg->max_tp_rate2 = index; |
| 9017 | + cur_tp2 = mr->cur_tp; |
| 9018 | + } |
| 9019 | + } |
| 9020 | + } |
| 9021 | + |
| 9022 | + /* try to sample up to half of the availble rates during each interval */ |
| 9023 | + mi->sample_count *= 4; |
| 9024 | + |
| 9025 | + cur_prob = 0; |
| 9026 | + cur_prob_tp = 0; |
| 9027 | + cur_tp = 0; |
| 9028 | + cur_tp2 = 0; |
| 9029 | + for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) { |
| 9030 | + mg = &mi->groups[group]; |
| 9031 | + if (!mg->supported) |
| 9032 | + continue; |
| 9033 | + |
| 9034 | + mr = minstrel_get_ratestats(mi, mg->max_prob_rate); |
| 9035 | + if (cur_prob_tp < mr->cur_tp && |
| 9036 | + minstrel_mcs_groups[group].streams == 1) { |
| 9037 | + mi->max_prob_rate = mg->max_prob_rate; |
| 9038 | + cur_prob = mr->cur_prob; |
| 9039 | + } |
| 9040 | + |
| 9041 | + mr = minstrel_get_ratestats(mi, mg->max_tp_rate); |
| 9042 | + if (cur_tp < mr->cur_tp) { |
| 9043 | + mi->max_tp_rate = mg->max_tp_rate; |
| 9044 | + cur_tp = mr->cur_tp; |
| 9045 | + } |
| 9046 | + |
| 9047 | + mr = minstrel_get_ratestats(mi, mg->max_tp_rate2); |
| 9048 | + if (cur_tp2 < mr->cur_tp) { |
| 9049 | + mi->max_tp_rate2 = mg->max_tp_rate2; |
| 9050 | + cur_tp2 = mr->cur_tp; |
| 9051 | + } |
| 9052 | + } |
| 9053 | + |
| 9054 | + mi->stats_update = jiffies; |
| 9055 | +} |
| 9056 | + |
| 9057 | +static bool |
| 9058 | +minstrel_ht_txstat_valid(struct ieee80211_tx_rate *rate) |
| 9059 | +{ |
| 9060 | + if (!rate->count) |
| 9061 | + return false; |
| 9062 | + |
| 9063 | + if (rate->idx < 0) |
| 9064 | + return false; |
| 9065 | + |
| 9066 | + return !!(rate->flags & IEEE80211_TX_RC_MCS); |
| 9067 | +} |
| 9068 | + |
| 9069 | +static void |
| 9070 | +minstrel_next_sample_idx(struct minstrel_ht_sta *mi) |
| 9071 | +{ |
| 9072 | + struct minstrel_mcs_group_data *mg; |
| 9073 | + |
| 9074 | + for (;;) { |
| 9075 | + mi->sample_group++; |
| 9076 | + mi->sample_group %= ARRAY_SIZE(minstrel_mcs_groups); |
| 9077 | + mg = &mi->groups[mi->sample_group]; |
| 9078 | + |
| 9079 | + if (!mg->supported) |
| 9080 | + continue; |
| 9081 | + |
| 9082 | + if (++mg->index >= MCS_GROUP_RATES) { |
| 9083 | + mg->index = 0; |
| 9084 | + if (++mg->column >= ARRAY_SIZE(sample_table)) |
| 9085 | + mg->column = 0; |
| 9086 | + } |
| 9087 | + break; |
| 9088 | + } |
| 9089 | +} |
| 9090 | + |
| 9091 | +static void |
| 9092 | +minstrel_downgrade_rate(struct minstrel_ht_sta *mi, int *idx, bool primary) |
| 9093 | +{ |
| 9094 | + int group, orig_group; |
| 9095 | + |
| 9096 | + orig_group = group = *idx / MCS_GROUP_RATES; |
| 9097 | + while (group > 0) { |
| 9098 | + group--; |
| 9099 | + |
| 9100 | + if (!mi->groups[group].supported) |
| 9101 | + continue; |
| 9102 | + |
| 9103 | + if (minstrel_mcs_groups[group].streams > |
| 9104 | + minstrel_mcs_groups[orig_group].streams) |
| 9105 | + continue; |
| 9106 | + |
| 9107 | + if (primary) |
| 9108 | + *idx = mi->groups[group].max_tp_rate; |
| 9109 | + else |
| 9110 | + *idx = mi->groups[group].max_tp_rate2; |
| 9111 | + break; |
| 9112 | + } |
| 9113 | +} |
| 9114 | + |
| 9115 | +static void |
| 9116 | +minstrel_aggr_check(struct minstrel_priv *mp, struct ieee80211_sta *pubsta, struct sk_buff *skb) |
| 9117 | +{ |
| 9118 | + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; |
| 9119 | + struct sta_info *sta = container_of(pubsta, struct sta_info, sta); |
| 9120 | + u16 tid; |
| 9121 | + |
| 9122 | + if (unlikely(!ieee80211_is_data_qos(hdr->frame_control))) |
| 9123 | + return; |
| 9124 | + |
| 9125 | + if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) |
| 9126 | + return; |
| 9127 | + |
| 9128 | + tid = *ieee80211_get_qos_ctl(hdr) & IEEE80211_QOS_CTL_TID_MASK; |
| 9129 | + if (likely(sta->ampdu_mlme.tid_state_tx[tid] != HT_AGG_STATE_IDLE)) |
| 9130 | + return; |
| 9131 | + |
| 9132 | + ieee80211_start_tx_ba_session(pubsta, tid); |
| 9133 | +} |
| 9134 | + |
| 9135 | +static void |
| 9136 | +minstrel_ht_tx_status(void *priv, struct ieee80211_supported_band *sband, |
| 9137 | + struct ieee80211_sta *sta, void *priv_sta, |
| 9138 | + struct sk_buff *skb) |
| 9139 | +{ |
| 9140 | + struct minstrel_ht_sta_priv *msp = priv_sta; |
| 9141 | + struct minstrel_ht_sta *mi = &msp->ht; |
| 9142 | + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
| 9143 | + struct ieee80211_tx_rate *ar = info->status.rates; |
| 9144 | + struct minstrel_rate_stats *rate, *rate2; |
| 9145 | + struct minstrel_priv *mp = priv; |
| 9146 | + bool last = false; |
| 9147 | + int group; |
| 9148 | + int i = 0; |
| 9149 | + |
| 9150 | + if (!msp->is_ht) |
| 9151 | + return mac80211_minstrel.tx_status(priv, sband, sta, &msp->legacy, skb); |
| 9152 | + |
| 9153 | + /* This packet was aggregated but doesn't carry status info */ |
| 9154 | + if ((info->flags & IEEE80211_TX_CTL_AMPDU) && |
| 9155 | + !(info->flags & IEEE80211_TX_STAT_AMPDU)) |
| 9156 | + return; |
| 9157 | + |
| 9158 | + if (!info->status.ampdu_len) { |
| 9159 | + info->status.ampdu_ack_len = 1; |
| 9160 | + info->status.ampdu_len = 1; |
| 9161 | + } |
| 9162 | + |
| 9163 | + mi->ampdu_packets++; |
| 9164 | + mi->ampdu_len += info->status.ampdu_len; |
| 9165 | + |
| 9166 | + if (!mi->sample_wait && !mi->sample_tries && mi->sample_count > 0) { |
| 9167 | + mi->sample_wait = 4 + 2 * MINSTREL_TRUNC(mi->avg_ampdu_len); |
| 9168 | + mi->sample_tries = 3; |
| 9169 | + mi->sample_count--; |
| 9170 | + } |
| 9171 | + |
| 9172 | + if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) { |
| 9173 | + mi->sample_packets += info->status.ampdu_len; |
| 9174 | + minstrel_next_sample_idx(mi); |
| 9175 | + } |
| 9176 | + |
| 9177 | + for (i = 0; !last; i++) { |
| 9178 | + last = (i == IEEE80211_TX_MAX_RATES - 1) || |
| 9179 | + !minstrel_ht_txstat_valid(&ar[i + 1]); |
| 9180 | + |
| 9181 | + if (!minstrel_ht_txstat_valid(&ar[i])) |
| 9182 | + break; |
| 9183 | + |
| 9184 | + group = minstrel_ht_get_group_idx(&ar[i]); |
| 9185 | + rate = &mi->groups[group].rates[ar[i].idx % 8]; |
| 9186 | + |
| 9187 | + if (last && (info->flags & IEEE80211_TX_STAT_ACK)) |
| 9188 | + rate->success += info->status.ampdu_ack_len; |
| 9189 | + |
| 9190 | + rate->attempts += ar[i].count * info->status.ampdu_len; |
| 9191 | + } |
| 9192 | + |
| 9193 | + /* |
| 9194 | + * check for sudden death of spatial multiplexing, |
| 9195 | + * downgrade to a lower number of streams if necessary. |
| 9196 | + */ |
| 9197 | + rate = minstrel_get_ratestats(mi, mi->max_tp_rate); |
| 9198 | + if (rate->attempts > 30 && |
| 9199 | + MINSTREL_FRAC(rate->success, rate->attempts) < |
| 9200 | + MINSTREL_FRAC(20, 100)) |
| 9201 | + minstrel_downgrade_rate(mi, &mi->max_tp_rate, true); |
| 9202 | + |
| 9203 | + rate2 = minstrel_get_ratestats(mi, mi->max_tp_rate2); |
| 9204 | + if (rate->attempts > 30 && |
| 9205 | + MINSTREL_FRAC(rate->success, rate->attempts) < |
| 9206 | + MINSTREL_FRAC(20, 100)) |
| 9207 | + minstrel_downgrade_rate(mi, &mi->max_tp_rate2, false); |
| 9208 | + |
| 9209 | + if (time_after(jiffies, mi->stats_update + (mp->update_interval / 2 * HZ) / 1000)) { |
| 9210 | + minstrel_ht_update_stats(mp, mi); |
| 9211 | + minstrel_aggr_check(mp, sta, skb); |
| 9212 | + } |
| 9213 | +} |
| 9214 | + |
| 9215 | +static void |
| 9216 | +minstrel_calc_retransmit(struct minstrel_priv *mp, struct minstrel_ht_sta *mi, |
| 9217 | + int index) |
| 9218 | +{ |
| 9219 | + struct minstrel_rate_stats *mr; |
| 9220 | + const struct mcs_group *group; |
| 9221 | + unsigned int tx_time, tx_time_rtscts, tx_time_data; |
| 9222 | + unsigned int cw = mp->cw_min; |
| 9223 | + unsigned int t_slot = 9; /* FIXME */ |
| 9224 | + unsigned int ampdu_len = MINSTREL_TRUNC(mi->avg_ampdu_len); |
| 9225 | + |
| 9226 | + mr = minstrel_get_ratestats(mi, index); |
| 9227 | + if (mr->probability < MINSTREL_FRAC(1, 10)) { |
| 9228 | + mr->retry_count = 1; |
| 9229 | + mr->retry_count_rtscts = 1; |
| 9230 | + return; |
| 9231 | + } |
| 9232 | + |
| 9233 | + mr->retry_count = 2; |
| 9234 | + mr->retry_count_rtscts = 2; |
| 9235 | + mr->retry_updated = true; |
| 9236 | + |
| 9237 | + group = &minstrel_mcs_groups[index / MCS_GROUP_RATES]; |
| 9238 | + tx_time_data = group->duration[index % MCS_GROUP_RATES] * ampdu_len; |
| 9239 | + tx_time = 2 * (t_slot + mi->overhead + tx_time_data); |
| 9240 | + tx_time_rtscts = 2 * (t_slot + mi->overhead_rtscts + tx_time_data); |
| 9241 | + do { |
| 9242 | + cw = (cw << 1) | 1; |
| 9243 | + cw = min(cw, mp->cw_max); |
| 9244 | + tx_time += cw + t_slot + mi->overhead; |
| 9245 | + tx_time_rtscts += cw + t_slot + mi->overhead_rtscts; |
| 9246 | + if (tx_time_rtscts < mp->segment_size) |
| 9247 | + mr->retry_count_rtscts++; |
| 9248 | + } while ((tx_time < mp->segment_size) && |
| 9249 | + (++mr->retry_count < mp->max_retry)); |
| 9250 | +} |
| 9251 | + |
| 9252 | + |
| 9253 | +static void |
| 9254 | +minstrel_ht_set_rate(struct minstrel_priv *mp, struct minstrel_ht_sta *mi, |
| 9255 | + struct ieee80211_tx_rate *rate, int index, |
| 9256 | + struct ieee80211_tx_rate_control *txrc, |
| 9257 | + bool sample, bool rtscts) |
| 9258 | +{ |
| 9259 | + const struct mcs_group *group = &minstrel_mcs_groups[index / MCS_GROUP_RATES]; |
| 9260 | + struct minstrel_rate_stats *mr; |
| 9261 | + |
| 9262 | + mr = minstrel_get_ratestats(mi, index); |
| 9263 | + if (!mr->retry_updated) |
| 9264 | + minstrel_calc_retransmit(mp, mi, index); |
| 9265 | + |
| 9266 | + if (mr->probability < MINSTREL_FRAC(20, 100)) |
| 9267 | + rate->count = 2; |
| 9268 | + else if (rtscts) |
| 9269 | + rate->count = mr->retry_count_rtscts; |
| 9270 | + else |
| 9271 | + rate->count = mr->retry_count; |
| 9272 | + |
| 9273 | + rate->flags = IEEE80211_TX_RC_MCS | group->flags; |
| 9274 | + if (txrc->short_preamble) |
| 9275 | + rate->flags |= IEEE80211_TX_RC_USE_SHORT_PREAMBLE; |
| 9276 | + if (txrc->rts || rtscts) |
| 9277 | + rate->flags |= IEEE80211_TX_RC_USE_RTS_CTS; |
| 9278 | + rate->idx = index % MCS_GROUP_RATES + (group->streams - 1) * MCS_GROUP_RATES; |
| 9279 | +} |
| 9280 | + |
| 9281 | +static inline int |
| 9282 | +minstrel_get_duration(int index) |
| 9283 | +{ |
| 9284 | + const struct mcs_group *group = &minstrel_mcs_groups[index / MCS_GROUP_RATES]; |
| 9285 | + return group->duration[index % MCS_GROUP_RATES]; |
| 9286 | +} |
| 9287 | + |
| 9288 | +static int |
| 9289 | +minstrel_get_sample_rate(struct minstrel_priv *mp, struct minstrel_ht_sta *mi) |
| 9290 | +{ |
| 9291 | + struct minstrel_rate_stats *mr; |
| 9292 | + struct minstrel_mcs_group_data *mg; |
| 9293 | + int sample_idx = 0; |
| 9294 | + |
| 9295 | + if (mi->sample_wait > 0) { |
| 9296 | + mi->sample_wait--; |
| 9297 | + return -1; |
| 9298 | + } |
| 9299 | + |
| 9300 | + if (!mi->sample_tries) |
| 9301 | + return -1; |
| 9302 | + |
| 9303 | + mi->sample_tries--; |
| 9304 | + mg = &mi->groups[mi->sample_group]; |
| 9305 | + sample_idx = sample_table[mg->column][mg->index]; |
| 9306 | + mr = &mg->rates[sample_idx]; |
| 9307 | + sample_idx += mi->sample_group * MCS_GROUP_RATES; |
| 9308 | + |
| 9309 | + /* |
| 9310 | + * When not using MRR, do not sample if the probability is already |
| 9311 | + * higher than 95% to avoid wasting airtime |
| 9312 | + */ |
| 9313 | + if (!mp->has_mrr && (mr->probability > MINSTREL_FRAC(95, 100))) |
| 9314 | + goto next; |
| 9315 | + |
| 9316 | + /* |
| 9317 | + * Make sure that lower rates get sampled only occasionally, |
| 9318 | + * if the link is working perfectly. |
| 9319 | + */ |
| 9320 | + if (minstrel_get_duration(sample_idx) > |
| 9321 | + minstrel_get_duration(mi->max_tp_rate)) { |
| 9322 | + if (mr->sample_skipped < 10) |
| 9323 | + goto next; |
| 9324 | + |
| 9325 | + if (mi->sample_slow++ > 2) |
| 9326 | + goto next; |
| 9327 | + } |
| 9328 | + |
| 9329 | + return sample_idx; |
| 9330 | + |
| 9331 | +next: |
| 9332 | + minstrel_next_sample_idx(mi); |
| 9333 | + return -1; |
| 9334 | +} |
| 9335 | + |
| 9336 | +static void |
| 9337 | +minstrel_ht_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, |
| 9338 | + struct ieee80211_tx_rate_control *txrc) |
| 9339 | +{ |
| 9340 | + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(txrc->skb); |
| 9341 | + struct ieee80211_tx_rate *ar = info->status.rates; |
| 9342 | + struct minstrel_ht_sta_priv *msp = priv_sta; |
| 9343 | + struct minstrel_ht_sta *mi = &msp->ht; |
| 9344 | + struct minstrel_priv *mp = priv; |
| 9345 | + int sample_idx; |
| 9346 | + |
| 9347 | + if (rate_control_send_low(sta, priv_sta, txrc)) |
| 9348 | + return; |
| 9349 | + |
| 9350 | + if (!msp->is_ht) |
| 9351 | + return mac80211_minstrel.get_rate(priv, sta, &msp->legacy, txrc); |
| 9352 | + |
| 9353 | + info->flags |= mi->tx_flags; |
| 9354 | + sample_idx = minstrel_get_sample_rate(mp, mi); |
| 9355 | + if (sample_idx >= 0) { |
| 9356 | + minstrel_ht_set_rate(mp, mi, &ar[0], sample_idx, |
| 9357 | + txrc, true, false); |
| 9358 | + minstrel_ht_set_rate(mp, mi, &ar[1], mi->max_tp_rate, |
| 9359 | + txrc, false, true); |
| 9360 | + info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE; |
| 9361 | + } else { |
| 9362 | + minstrel_ht_set_rate(mp, mi, &ar[0], mi->max_tp_rate, |
| 9363 | + txrc, false, false); |
| 9364 | + minstrel_ht_set_rate(mp, mi, &ar[1], mi->max_tp_rate2, |
| 9365 | + txrc, false, true); |
| 9366 | + } |
| 9367 | + minstrel_ht_set_rate(mp, mi, &ar[2], mi->max_prob_rate, txrc, false, true); |
| 9368 | + |
| 9369 | + ar[3].count = 0; |
| 9370 | + ar[3].idx = -1; |
| 9371 | + |
| 9372 | + mi->total_packets++; |
| 9373 | + |
| 9374 | + /* wraparound */ |
| 9375 | + if (mi->total_packets == ~0) { |
| 9376 | + mi->total_packets = 0; |
| 9377 | + mi->sample_packets = 0; |
| 9378 | + } |
| 9379 | +} |
| 9380 | + |
| 9381 | +static void |
| 9382 | +minstrel_ht_update_caps(void *priv, struct ieee80211_supported_band *sband, |
| 9383 | + struct ieee80211_sta *sta, void *priv_sta, |
| 9384 | + enum nl80211_channel_type oper_chan_type) |
| 9385 | +{ |
| 9386 | + struct minstrel_priv *mp = priv; |
| 9387 | + struct minstrel_ht_sta_priv *msp = priv_sta; |
| 9388 | + struct minstrel_ht_sta *mi = &msp->ht; |
| 9389 | + struct ieee80211_mcs_info *mcs = &sta->ht_cap.mcs; |
| 9390 | + struct ieee80211_local *local = hw_to_local(mp->hw); |
| 9391 | + u16 sta_cap = sta->ht_cap.cap; |
| 9392 | + int ack_dur; |
| 9393 | + int stbc; |
| 9394 | + int i; |
| 9395 | + |
| 9396 | + /* fall back to the old minstrel for legacy stations */ |
| 9397 | + if (sta && !sta->ht_cap.ht_supported) { |
| 9398 | + msp->is_ht = false; |
| 9399 | + memset(&msp->legacy, 0, sizeof(msp->legacy)); |
| 9400 | + msp->legacy.r = msp->ratelist; |
| 9401 | + msp->legacy.sample_table = msp->sample_table; |
| 9402 | + return mac80211_minstrel.rate_init(priv, sband, sta, &msp->legacy); |
| 9403 | + } |
| 9404 | + |
| 9405 | + BUILD_BUG_ON(ARRAY_SIZE(minstrel_mcs_groups) != |
| 9406 | + MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS); |
| 9407 | + |
| 9408 | + msp->is_ht = true; |
| 9409 | + memset(mi, 0, sizeof(*mi)); |
| 9410 | + mi->stats_update = jiffies; |
| 9411 | + |
| 9412 | + ack_dur = ieee80211_frame_duration(local, 10, 60, 1, 1); |
| 9413 | + mi->overhead = ieee80211_frame_duration(local, 0, 60, 1, 1) + ack_dur; |
| 9414 | + mi->overhead_rtscts = mi->overhead + 2 * ack_dur; |
| 9415 | + |
| 9416 | + mi->avg_ampdu_len = MINSTREL_FRAC(1, 1); |
| 9417 | + |
| 9418 | + /* When using MRR, sample more on the first attempt, without delay */ |
| 9419 | + if (mp->has_mrr) { |
| 9420 | + mi->sample_count = 16; |
| 9421 | + mi->sample_wait = 0; |
| 9422 | + } else { |
| 9423 | + mi->sample_count = 8; |
| 9424 | + mi->sample_wait = 8; |
| 9425 | + } |
| 9426 | + mi->sample_tries = 4; |
| 9427 | + |
| 9428 | + stbc = (sta_cap & IEEE80211_HT_CAP_RX_STBC) >> |
| 9429 | + IEEE80211_HT_CAP_RX_STBC_SHIFT; |
| 9430 | + mi->tx_flags |= stbc << IEEE80211_TX_CTL_STBC_SHIFT; |
| 9431 | + |
| 9432 | + if (sta_cap & IEEE80211_HT_CAP_LDPC_CODING) |
| 9433 | + mi->tx_flags |= IEEE80211_TX_CTL_LDPC; |
| 9434 | + |
| 9435 | + if (oper_chan_type != NL80211_CHAN_HT40MINUS && |
| 9436 | + oper_chan_type != NL80211_CHAN_HT40PLUS) |
| 9437 | + sta_cap &= ~IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
| 9438 | + |
| 9439 | + for (i = 0; i < ARRAY_SIZE(mi->groups); i++) { |
| 9440 | + u16 req = 0; |
| 9441 | + |
| 9442 | + mi->groups[i].supported = 0; |
| 9443 | + if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_SHORT_GI) { |
| 9444 | + if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH) |
| 9445 | + req |= IEEE80211_HT_CAP_SGI_40; |
| 9446 | + else |
| 9447 | + req |= IEEE80211_HT_CAP_SGI_20; |
| 9448 | + } |
| 9449 | + |
| 9450 | + if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH) |
| 9451 | + req |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
| 9452 | + |
| 9453 | + if ((sta_cap & req) != req) |
| 9454 | + continue; |
| 9455 | + |
| 9456 | + mi->groups[i].supported = |
| 9457 | + mcs->rx_mask[minstrel_mcs_groups[i].streams - 1]; |
| 9458 | + } |
| 9459 | +} |
| 9460 | + |
| 9461 | +static void |
| 9462 | +minstrel_ht_rate_init(void *priv, struct ieee80211_supported_band *sband, |
| 9463 | + struct ieee80211_sta *sta, void *priv_sta) |
| 9464 | +{ |
| 9465 | + struct minstrel_priv *mp = priv; |
| 9466 | + |
| 9467 | + minstrel_ht_update_caps(priv, sband, sta, priv_sta, mp->hw->conf.channel_type); |
| 9468 | +} |
| 9469 | + |
| 9470 | +static void |
| 9471 | +minstrel_ht_rate_update(void *priv, struct ieee80211_supported_band *sband, |
| 9472 | + struct ieee80211_sta *sta, void *priv_sta, |
| 9473 | + u32 changed, enum nl80211_channel_type oper_chan_type) |
| 9474 | +{ |
| 9475 | + minstrel_ht_update_caps(priv, sband, sta, priv_sta, oper_chan_type); |
| 9476 | +} |
| 9477 | + |
| 9478 | +static void * |
| 9479 | +minstrel_ht_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp) |
| 9480 | +{ |
| 9481 | + struct ieee80211_supported_band *sband; |
| 9482 | + struct minstrel_ht_sta_priv *msp; |
| 9483 | + struct minstrel_priv *mp = priv; |
| 9484 | + struct ieee80211_hw *hw = mp->hw; |
| 9485 | + int max_rates = 0; |
| 9486 | + int i; |
| 9487 | + |
| 9488 | + for (i = 0; i < IEEE80211_NUM_BANDS; i++) { |
| 9489 | + sband = hw->wiphy->bands[i]; |
| 9490 | + if (sband && sband->n_bitrates > max_rates) |
| 9491 | + max_rates = sband->n_bitrates; |
| 9492 | + } |
| 9493 | + |
| 9494 | + msp = kzalloc(sizeof(struct minstrel_ht_sta), gfp); |
| 9495 | + if (!msp) |
| 9496 | + return NULL; |
| 9497 | + |
| 9498 | + msp->ratelist = kzalloc(sizeof(struct minstrel_rate) * max_rates, gfp); |
| 9499 | + if (!msp->ratelist) |
| 9500 | + goto error; |
| 9501 | + |
| 9502 | + msp->sample_table = kmalloc(SAMPLE_COLUMNS * max_rates, gfp); |
| 9503 | + if (!msp->sample_table) |
| 9504 | + goto error1; |
| 9505 | + |
| 9506 | + return msp; |
| 9507 | + |
| 9508 | +error1: |
| 9509 | + kfree(msp->sample_table); |
| 9510 | +error: |
| 9511 | + kfree(msp); |
| 9512 | + return NULL; |
| 9513 | +} |
| 9514 | + |
| 9515 | +static void |
| 9516 | +minstrel_ht_free_sta(void *priv, struct ieee80211_sta *sta, void *priv_sta) |
| 9517 | +{ |
| 9518 | + struct minstrel_ht_sta_priv *msp = priv_sta; |
| 9519 | + |
| 9520 | + kfree(msp->sample_table); |
| 9521 | + kfree(msp->ratelist); |
| 9522 | + kfree(msp); |
| 9523 | +} |
| 9524 | + |
| 9525 | +static void * |
| 9526 | +minstrel_ht_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) |
| 9527 | +{ |
| 9528 | + return mac80211_minstrel.alloc(hw, debugfsdir); |
| 9529 | +} |
| 9530 | + |
| 9531 | +static void |
| 9532 | +minstrel_ht_free(void *priv) |
| 9533 | +{ |
| 9534 | + mac80211_minstrel.free(priv); |
| 9535 | +} |
| 9536 | + |
| 9537 | +static struct rate_control_ops mac80211_minstrel_ht = { |
| 9538 | + .name = "minstrel_ht", |
| 9539 | + .tx_status = minstrel_ht_tx_status, |
| 9540 | + .get_rate = minstrel_ht_get_rate, |
| 9541 | + .rate_init = minstrel_ht_rate_init, |
| 9542 | + .rate_update = minstrel_ht_rate_update, |
| 9543 | + .alloc_sta = minstrel_ht_alloc_sta, |
| 9544 | + .free_sta = minstrel_ht_free_sta, |
| 9545 | + .alloc = minstrel_ht_alloc, |
| 9546 | + .free = minstrel_ht_free, |
| 9547 | +#ifdef CONFIG_MAC80211_DEBUGFS |
| 9548 | + .add_sta_debugfs = minstrel_ht_add_sta_debugfs, |
| 9549 | + .remove_sta_debugfs = minstrel_ht_remove_sta_debugfs, |
| 9550 | +#endif |
| 9551 | +}; |
| 9552 | + |
| 9553 | + |
| 9554 | +static void |
| 9555 | +init_sample_table(void) |
| 9556 | +{ |
| 9557 | + int col, i, new_idx; |
| 9558 | + u8 rnd[MCS_GROUP_RATES]; |
| 9559 | + |
| 9560 | + memset(sample_table, 0xff, sizeof(sample_table)); |
| 9561 | + for (col = 0; col < SAMPLE_COLUMNS; col++) { |
| 9562 | + for (i = 0; i < MCS_GROUP_RATES; i++) { |
| 9563 | + get_random_bytes(rnd, sizeof(rnd)); |
| 9564 | + new_idx = (i + rnd[i]) % MCS_GROUP_RATES; |
| 9565 | + |
| 9566 | + while (sample_table[col][new_idx] != 0xff) |
| 9567 | + new_idx = (new_idx + 1) % MCS_GROUP_RATES; |
| 9568 | + |
| 9569 | + sample_table[col][new_idx] = i; |
| 9570 | + } |
| 9571 | + } |
| 9572 | +} |
| 9573 | + |
| 9574 | +int __init |
| 9575 | +rc80211_minstrel_ht_init(void) |
| 9576 | +{ |
| 9577 | + init_sample_table(); |
| 9578 | + return ieee80211_rate_control_register(&mac80211_minstrel_ht); |
| 9579 | +} |
| 9580 | + |
| 9581 | +void |
| 9582 | +rc80211_minstrel_ht_exit(void) |
| 9583 | +{ |
| 9584 | + ieee80211_rate_control_unregister(&mac80211_minstrel_ht); |
| 9585 | +} |
| 9586 | --- /dev/null |
| 9587 | @@ -0,0 +1,128 @@ |
| 9588 | +/* |
| 9589 | + * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org> |
| 9590 | + * |
| 9591 | + * This program is free software; you can redistribute it and/or modify |
| 9592 | + * it under the terms of the GNU General Public License version 2 as |
| 9593 | + * published by the Free Software Foundation. |
| 9594 | + */ |
| 9595 | + |
| 9596 | +#ifndef __RC_MINSTREL_HT_H |
| 9597 | +#define __RC_MINSTREL_HT_H |
| 9598 | + |
| 9599 | +/* |
| 9600 | + * The number of streams can be changed to 2 to reduce code |
| 9601 | + * size and memory footprint. |
| 9602 | + */ |
| 9603 | +#define MINSTREL_MAX_STREAMS 3 |
| 9604 | +#define MINSTREL_STREAM_GROUPS 4 |
| 9605 | + |
| 9606 | +/* scaled fraction values */ |
| 9607 | +#define MINSTREL_SCALE 16 |
| 9608 | +#define MINSTREL_FRAC(val, div) (((val) << MINSTREL_SCALE) / div) |
| 9609 | +#define MINSTREL_TRUNC(val) ((val) >> MINSTREL_SCALE) |
| 9610 | + |
| 9611 | +#define MCS_GROUP_RATES 8 |
| 9612 | + |
| 9613 | +struct mcs_group { |
| 9614 | + u32 flags; |
| 9615 | + unsigned int streams; |
| 9616 | + unsigned int duration[MCS_GROUP_RATES]; |
| 9617 | +}; |
| 9618 | + |
| 9619 | +struct minstrel_rate_stats { |
| 9620 | + /* current / last sampling period attempts/success counters */ |
| 9621 | + unsigned int attempts, last_attempts; |
| 9622 | + unsigned int success, last_success; |
| 9623 | + |
| 9624 | + /* total attempts/success counters */ |
| 9625 | + u64 att_hist, succ_hist; |
| 9626 | + |
| 9627 | + /* current throughput */ |
| 9628 | + unsigned int cur_tp; |
| 9629 | + |
| 9630 | + /* packet delivery probabilities */ |
| 9631 | + unsigned int cur_prob, probability; |
| 9632 | + |
| 9633 | + /* maximum retry counts */ |
| 9634 | + unsigned int retry_count; |
| 9635 | + unsigned int retry_count_rtscts; |
| 9636 | + |
| 9637 | + bool retry_updated; |
| 9638 | + u8 sample_skipped; |
| 9639 | +}; |
| 9640 | + |
| 9641 | +struct minstrel_mcs_group_data { |
| 9642 | + u8 index; |
| 9643 | + u8 column; |
| 9644 | + |
| 9645 | + /* bitfield of supported MCS rates of this group */ |
| 9646 | + u8 supported; |
| 9647 | + |
| 9648 | + /* selected primary rates */ |
| 9649 | + unsigned int max_tp_rate; |
| 9650 | + unsigned int max_tp_rate2; |
| 9651 | + unsigned int max_prob_rate; |
| 9652 | + |
| 9653 | + /* MCS rate statistics */ |
| 9654 | + struct minstrel_rate_stats rates[MCS_GROUP_RATES]; |
| 9655 | +}; |
| 9656 | + |
| 9657 | +struct minstrel_ht_sta { |
| 9658 | + /* ampdu length (average, per sampling interval) */ |
| 9659 | + unsigned int ampdu_len; |
| 9660 | + unsigned int ampdu_packets; |
| 9661 | + |
| 9662 | + /* ampdu length (EWMA) */ |
| 9663 | + unsigned int avg_ampdu_len; |
| 9664 | + |
| 9665 | + /* best throughput rate */ |
| 9666 | + unsigned int max_tp_rate; |
| 9667 | + |
| 9668 | + /* second best throughput rate */ |
| 9669 | + unsigned int max_tp_rate2; |
| 9670 | + |
| 9671 | + /* best probability rate */ |
| 9672 | + unsigned int max_prob_rate; |
| 9673 | + |
| 9674 | + /* time of last status update */ |
| 9675 | + unsigned long stats_update; |
| 9676 | + |
| 9677 | + /* overhead time in usec for each frame */ |
| 9678 | + unsigned int overhead; |
| 9679 | + unsigned int overhead_rtscts; |
| 9680 | + |
| 9681 | + unsigned int total_packets; |
| 9682 | + unsigned int sample_packets; |
| 9683 | + |
| 9684 | + /* tx flags to add for frames for this sta */ |
| 9685 | + u32 tx_flags; |
| 9686 | + |
| 9687 | + u8 sample_wait; |
| 9688 | + u8 sample_tries; |
| 9689 | + u8 sample_count; |
| 9690 | + u8 sample_slow; |
| 9691 | + |
| 9692 | + /* current MCS group to be sampled */ |
| 9693 | + u8 sample_group; |
| 9694 | + |
| 9695 | + /* MCS rate group info and statistics */ |
| 9696 | + struct minstrel_mcs_group_data groups[MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS]; |
| 9697 | +}; |
| 9698 | + |
| 9699 | +struct minstrel_ht_sta_priv { |
| 9700 | + union { |
| 9701 | + struct minstrel_ht_sta ht; |
| 9702 | + struct minstrel_sta_info legacy; |
| 9703 | + }; |
| 9704 | +#ifdef CONFIG_MAC80211_DEBUGFS |
| 9705 | + struct dentry *dbg_stats; |
| 9706 | +#endif |
| 9707 | + void *ratelist; |
| 9708 | + void *sample_table; |
| 9709 | + bool is_ht; |
| 9710 | +}; |
| 9711 | + |
| 9712 | +void minstrel_ht_add_sta_debugfs(void *priv, void *priv_sta, struct dentry *dir); |
| 9713 | +void minstrel_ht_remove_sta_debugfs(void *priv, void *priv_sta); |
| 9714 | + |
| 9715 | +#endif |
| 9716 | --- /dev/null |
| 9717 | @@ -0,0 +1,120 @@ |
| 9718 | +/* |
| 9719 | + * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org> |
| 9720 | + * |
| 9721 | + * This program is free software; you can redistribute it and/or modify |
| 9722 | + * it under the terms of the GNU General Public License version 2 as |
| 9723 | + * published by the Free Software Foundation. |
| 9724 | + */ |
| 9725 | +#include <linux/netdevice.h> |
| 9726 | +#include <linux/types.h> |
| 9727 | +#include <linux/skbuff.h> |
| 9728 | +#include <linux/debugfs.h> |
| 9729 | +#include <linux/ieee80211.h> |
| 9730 | +#include <net/mac80211.h> |
| 9731 | +#include "rc80211_minstrel.h" |
| 9732 | +#include "rc80211_minstrel_ht.h" |
| 9733 | + |
| 9734 | +extern const struct mcs_group minstrel_mcs_groups[]; |
| 9735 | + |
| 9736 | +static int |
| 9737 | +minstrel_ht_stats_open(struct inode *inode, struct file *file) |
| 9738 | +{ |
| 9739 | + struct minstrel_ht_sta_priv *msp = inode->i_private; |
| 9740 | + struct minstrel_ht_sta *mi = &msp->ht; |
| 9741 | + struct minstrel_debugfs_info *ms; |
| 9742 | + unsigned int i, j, tp, prob, eprob; |
| 9743 | + char *p; |
| 9744 | + int ret; |
| 9745 | + |
| 9746 | + if (!msp->is_ht) { |
| 9747 | + inode->i_private = &msp->legacy; |
| 9748 | + ret = minstrel_stats_open(inode, file); |
| 9749 | + inode->i_private = msp; |
| 9750 | + return ret; |
| 9751 | + } |
| 9752 | + |
| 9753 | + ms = kmalloc(sizeof(*ms) + 8192, GFP_KERNEL); |
| 9754 | + if (!ms) |
| 9755 | + return -ENOMEM; |
| 9756 | + |
| 9757 | + file->private_data = ms; |
| 9758 | + p = ms->buf; |
| 9759 | + p += sprintf(p, "type rate throughput ewma prob this prob " |
| 9760 | + "this succ/attempt success attempts\n"); |
| 9761 | + for (i = 0; i < MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS; i++) { |
| 9762 | + char htmode = '2'; |
| 9763 | + char gimode = 'L'; |
| 9764 | + |
| 9765 | + if (!mi->groups[i].supported) |
| 9766 | + continue; |
| 9767 | + |
| 9768 | + if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH) |
| 9769 | + htmode = '4'; |
| 9770 | + if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_SHORT_GI) |
| 9771 | + gimode = 'S'; |
| 9772 | + |
| 9773 | + for (j = 0; j < MCS_GROUP_RATES; j++) { |
| 9774 | + struct minstrel_rate_stats *mr = &mi->groups[i].rates[j]; |
| 9775 | + int idx = i * MCS_GROUP_RATES + j; |
| 9776 | + |
| 9777 | + if (!(mi->groups[i].supported & BIT(j))) |
| 9778 | + continue; |
| 9779 | + |
| 9780 | + p += sprintf(p, "HT%c0/%cGI ", htmode, gimode); |
| 9781 | + |
| 9782 | + *(p++) = (idx == mi->max_tp_rate) ? 'T' : ' '; |
| 9783 | + *(p++) = (idx == mi->max_tp_rate2) ? 't' : ' '; |
| 9784 | + *(p++) = (idx == mi->max_prob_rate) ? 'P' : ' '; |
| 9785 | + p += sprintf(p, "MCS%-2u", (minstrel_mcs_groups[i].streams - 1) * |
| 9786 | + MCS_GROUP_RATES + j); |
| 9787 | + |
| 9788 | + tp = mr->cur_tp / 10; |
| 9789 | + prob = MINSTREL_TRUNC(mr->cur_prob * 1000); |
| 9790 | + eprob = MINSTREL_TRUNC(mr->probability * 1000); |
| 9791 | + |
| 9792 | + p += sprintf(p, " %6u.%1u %6u.%1u %6u.%1u " |
| 9793 | + "%3u(%3u) %8llu %8llu\n", |
| 9794 | + tp / 10, tp % 10, |
| 9795 | + eprob / 10, eprob % 10, |
| 9796 | + prob / 10, prob % 10, |
| 9797 | + mr->last_success, |
| 9798 | + mr->last_attempts, |
| 9799 | + (unsigned long long)mr->succ_hist, |
| 9800 | + (unsigned long long)mr->att_hist); |
| 9801 | + } |
| 9802 | + } |
| 9803 | + p += sprintf(p, "\nTotal packet count:: ideal %d " |
| 9804 | + "lookaround %d\n", |
| 9805 | + max(0, (int) mi->total_packets - (int) mi->sample_packets), |
| 9806 | + mi->sample_packets); |
| 9807 | + p += sprintf(p, "Average A-MPDU length: %d.%d\n", |
| 9808 | + MINSTREL_TRUNC(mi->avg_ampdu_len), |
| 9809 | + MINSTREL_TRUNC(mi->avg_ampdu_len * 10) % 10); |
| 9810 | + ms->len = p - ms->buf; |
| 9811 | + |
| 9812 | + return 0; |
| 9813 | +} |
| 9814 | + |
| 9815 | +static const struct file_operations minstrel_ht_stat_fops = { |
| 9816 | + .owner = THIS_MODULE, |
| 9817 | + .open = minstrel_ht_stats_open, |
| 9818 | + .read = minstrel_stats_read, |
| 9819 | + .release = minstrel_stats_release, |
| 9820 | +}; |
| 9821 | + |
| 9822 | +void |
| 9823 | +minstrel_ht_add_sta_debugfs(void *priv, void *priv_sta, struct dentry *dir) |
| 9824 | +{ |
| 9825 | + struct minstrel_ht_sta_priv *msp = priv_sta; |
| 9826 | + |
| 9827 | + msp->dbg_stats = debugfs_create_file("rc_stats", S_IRUGO, dir, msp, |
| 9828 | + &minstrel_ht_stat_fops); |
| 9829 | +} |
| 9830 | + |
| 9831 | +void |
| 9832 | +minstrel_ht_remove_sta_debugfs(void *priv, void *priv_sta) |
| 9833 | +{ |
| 9834 | + struct minstrel_ht_sta_priv *msp = priv_sta; |
| 9835 | + |
| 9836 | + debugfs_remove(msp->dbg_stats); |
| 9837 | +} |