Date:2010-07-22 13:32:42 (4 years 4 months ago)
Author:claudio
Commit:c84930275084bee793f3df959549603d27a8b56f
Message:[at91] general cleanup

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22352 3c298f89-4303-0410-b956-a3cf2f4a3e73
Files: target/linux/at91/config-2.6.34 (1 diff)
target/linux/at91/config-default (1 diff)
target/linux/at91/patches-2.6.25/000-at91patches.patch (1 diff)
target/linux/at91/patches-2.6.25/001-vlink-machine.patch (1 diff)
target/linux/at91/patches-2.6.25/002-led-driver.patch (1 diff)
target/linux/at91/patches-2.6.25/003-gpio-driver.patch (1 diff)
target/linux/at91/patches-2.6.25/007-mtd-partition.patch (1 diff)
target/linux/at91/patches-2.6.25/008-fdl-serial.patch (1 diff)
target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch (1 diff)
target/linux/at91/patches-2.6.25/010-dm9161a-phyfix.patch (1 diff)
target/linux/at91/patches-2.6.25/014-initpartition.patch (1 diff)
target/linux/at91/patches-2.6.25/017-usb_serial_endpoint_size.patch (1 diff)

Change Details

target/linux/at91/config-2.6.34
1# CONFIG_AEABI is not set
2CONFIG_ALIGNMENT_TRAP=y
3# CONFIG_ARCH_AT572D940HF is not set
4CONFIG_ARCH_AT91=y
5# CONFIG_ARCH_AT91CAP9 is not set
6# CONFIG_ARCH_AT91RM9200 is not set
7# CONFIG_ARCH_AT91SAM9260 is not set
8# CONFIG_ARCH_AT91SAM9261 is not set
9# CONFIG_ARCH_AT91SAM9263 is not set
10# CONFIG_ARCH_AT91SAM9G10 is not set
11CONFIG_ARCH_AT91SAM9G20=y
12# CONFIG_ARCH_AT91SAM9G45 is not set
13# CONFIG_ARCH_AT91SAM9RL is not set
14# CONFIG_ARCH_AT91X40 is not set
15# CONFIG_ARCH_NUC93X is not set
16CONFIG_ARCH_REQUIRE_GPIOLIB=y
17# CONFIG_ARCH_S5P6440 is not set
18# CONFIG_ARCH_S5P6442 is not set
19# CONFIG_ARCH_S5PV210 is not set
20# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
21# CONFIG_ARCH_SHMOBILE is not set
22# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
23# CONFIG_ARCH_SUPPORTS_MSI is not set
24CONFIG_ARCH_SUSPEND_POSSIBLE=y
25CONFIG_ARM=y
26CONFIG_ARM_L1_CACHE_SHIFT=5
27CONFIG_ARM_THUMB=y
28# CONFIG_AT91SAM9X_WATCHDOG is not set
29CONFIG_AT91_EARLY_DBGU=y
30# CONFIG_AT91_EARLY_USART0 is not set
31# CONFIG_AT91_EARLY_USART1 is not set
32# CONFIG_AT91_EARLY_USART2 is not set
33# CONFIG_AT91_EARLY_USART3 is not set
34# CONFIG_AT91_EARLY_USART4 is not set
35# CONFIG_AT91_EARLY_USART5 is not set
36CONFIG_AT91_PMC_UNIT=y
37CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
38CONFIG_AT91_TIMER_HZ=100
39# CONFIG_ATMEL_PWM is not set
40# CONFIG_ATMEL_SSC is not set
41# CONFIG_ATMEL_TCLIB is not set
42CONFIG_BITREVERSE=y
43# CONFIG_BLK_DEV is not set
44# CONFIG_BLK_DEV_IDE_AT91 is not set
45# CONFIG_BLK_DEV_INITRD is not set
46CONFIG_CC_OPTIMIZE_FOR_SIZE=y
47CONFIG_CPU_32v5=y
48CONFIG_CPU_ABRT_EV5TJ=y
49CONFIG_CPU_ARM926T=y
50# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
51CONFIG_CPU_CACHE_VIVT=y
52CONFIG_CPU_COPY_V4WB=y
53CONFIG_CPU_CP15=y
54CONFIG_CPU_CP15_MMU=y
55# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
56# CONFIG_CPU_ICACHE_DISABLE is not set
57CONFIG_CPU_PABRT_LEGACY=y
58CONFIG_CPU_TLB_V4WBI=y
59CONFIG_DEBUG_BUGVERBOSE=y
60# CONFIG_DEBUG_USER is not set
61CONFIG_DECOMPRESS_LZMA=y
62CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
63# CONFIG_DM9000 is not set
64CONFIG_EXT2_FS=y
65# CONFIG_FPE_FASTFPE is not set
66# CONFIG_FPE_NWFPE is not set
67CONFIG_FRAME_POINTER=y
68# CONFIG_FSNOTIFY is not set
69CONFIG_GENERIC_ATOMIC64=y
70CONFIG_GENERIC_CLOCKEVENTS=y
71CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
72CONFIG_GENERIC_FIND_LAST_BIT=y
73CONFIG_GENERIC_GPIO=y
74CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
75CONFIG_GENERIC_PWM=y
76CONFIG_GPIOLIB=y
77CONFIG_GPIO_DEVICE=y
78# CONFIG_GPIO_PWM is not set
79CONFIG_GPIO_SYSFS=y
80# CONFIG_HAMRADIO is not set
81CONFIG_HARDIRQS_SW_RESEND=y
82CONFIG_HAS_DMA=y
83CONFIG_HAS_IOMEM=y
84CONFIG_HAS_IOPORT=y
85CONFIG_HAVE_AOUT=y
86CONFIG_HAVE_ARCH_KGDB=y
87CONFIG_HAVE_AT91_USART3=y
88CONFIG_HAVE_AT91_USART4=y
89CONFIG_HAVE_AT91_USART5=y
90CONFIG_HAVE_CLK=y
91CONFIG_HAVE_FUNCTION_TRACER=y
92CONFIG_HAVE_GENERIC_DMA_COHERENT=y
93CONFIG_HAVE_IDE=y
94CONFIG_HAVE_KERNEL_GZIP=y
95CONFIG_HAVE_KERNEL_LZMA=y
96CONFIG_HAVE_KERNEL_LZO=y
97CONFIG_HAVE_KPROBES=y
98CONFIG_HAVE_KRETPROBES=y
99CONFIG_HAVE_LATENCYTOP_SUPPORT=y
100CONFIG_HAVE_OPROFILE=y
101CONFIG_HAVE_PERF_EVENTS=y
102CONFIG_HAVE_PROC_CPU=y
103# CONFIG_HW_RANDOM is not set
104# CONFIG_ISDN is not set
105# CONFIG_LEDS is not set
106# CONFIG_LEDS_ATMEL_PWM is not set
107# CONFIG_LEDS_GPIO is not set
108CONFIG_MACB=y
109# CONFIG_MACH_AT91SAM9G20EK is not set
110# CONFIG_MACH_AT91SAM9G20EK_2MMC is not set
111# CONFIG_MACH_CPU9G20 is not set
112CONFIG_MACH_NETUS_FOXBOARD=y
113# CONFIG_MFD_T7L66XB is not set
114# CONFIG_MII is not set
115CONFIG_MMC=y
116CONFIG_MMC_AT91=y
117# CONFIG_MMC_ATMELMCI is not set
118CONFIG_MMC_BLOCK=y
119CONFIG_MTD_DATAFLASH=y
120# CONFIG_MTD_DATAFLASH_OTP is not set
121# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
122CONFIG_NEED_DMA_MAP_STATE=y
123# CONFIG_NETDEV_1000 is not set
124CONFIG_NETUS_HEARTBEAT_LED=y
125CONFIG_NETUS_SERIALS=y
126# CONFIG_NETUS_USE_DATAFLASH is not set
127CONFIG_NLS=y
128CONFIG_PAGEFLAGS_EXTENDED=y
129CONFIG_PAGE_OFFSET=0xC0000000
130# CONFIG_PATA_AT91 is not set
131# CONFIG_PCI_SYSCALL is not set
132CONFIG_PERF_USE_VMALLOC=y
133CONFIG_PHYLIB=y
134CONFIG_RTC_CLASS=y
135CONFIG_RTC_DRV_AT91SAM9=y
136CONFIG_RTC_DRV_AT91SAM9_GPBR=0
137CONFIG_RTC_DRV_AT91SAM9_RTT=0
138# CONFIG_SCSI_DMA is not set
139CONFIG_SCSI_MOD=y
140# CONFIG_SDIO_UART is not set
141# CONFIG_SERIAL_8250 is not set
142CONFIG_SERIAL_ATMEL=y
143CONFIG_SERIAL_ATMEL_CONSOLE=y
144CONFIG_SERIAL_ATMEL_PDC=y
145# CONFIG_SERIAL_ATMEL_TTYAT is not set
146CONFIG_SPI=y
147CONFIG_SPI_ATMEL=y
148# CONFIG_SPI_BITBANG is not set
149# CONFIG_SPI_GPIO is not set
150CONFIG_SPI_MASTER=y
151CONFIG_SPI_SPIDEV=y
152CONFIG_SPLIT_PTLOCK_CPUS=999999
153# CONFIG_STAGING is not set
154CONFIG_SYS_SUPPORTS_APM_EMULATION=y
155#CONFIG_SND_ATMEL_SOC is not set
156CONFIG_UID16=y
157CONFIG_USB=y
158# CONFIG_USB_ARCH_HAS_EHCI is not set
159CONFIG_USB_AT91=y
160# CONFIG_USB_AUDIO is not set
161# CONFIG_USB_CDC_COMPOSITE is not set
162# CONFIG_USB_DEVICEFS is not set
163CONFIG_USB_ETH=y
164CONFIG_USB_ETH_EEM=y
165CONFIG_USB_ETH_RNDIS=y
166# CONFIG_USB_FILE_STORAGE is not set
167CONFIG_USB_GADGET=y
168# CONFIG_USB_GADGETFS is not set
169# CONFIG_USB_GADGET_AMD5536UDC is not set
170CONFIG_USB_GADGET_AT91=y
171# CONFIG_USB_GADGET_ATMEL_USBA is not set
172# CONFIG_USB_GADGET_CI13XXX is not set
173# CONFIG_USB_GADGET_DEBUG_FILES is not set
174# CONFIG_USB_GADGET_DEBUG_FS is not set
175# CONFIG_USB_GADGET_DUALSPEED is not set
176# CONFIG_USB_GADGET_DUMMY_HCD is not set
177# CONFIG_USB_GADGET_FSL_QE is not set
178# CONFIG_USB_GADGET_FSL_USB2 is not set
179# CONFIG_USB_GADGET_GOKU is not set
180# CONFIG_USB_GADGET_IMX is not set
181# CONFIG_USB_GADGET_LANGWELL is not set
182# CONFIG_USB_GADGET_LH7A40X is not set
183# CONFIG_USB_GADGET_M66592 is not set
184# CONFIG_USB_GADGET_MUSB_HDRC is not set
185# CONFIG_USB_GADGET_NET2280 is not set
186# CONFIG_USB_GADGET_OMAP is not set
187# CONFIG_USB_GADGET_PXA25X is not set
188# CONFIG_USB_GADGET_PXA27X is not set
189# CONFIG_USB_GADGET_R8A66597 is not set
190# CONFIG_USB_GADGET_S3C2410 is not set
191# CONFIG_USB_GADGET_S3C_HSOTG is not set
192CONFIG_USB_GADGET_SELECTED=y
193CONFIG_USB_GADGET_VBUS_DRAW=2
194# CONFIG_USB_G_PRINTER is not set
195# CONFIG_USB_G_SERIAL is not set
196# CONFIG_USB_MIDI_GADGET is not set
197# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
198# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
199CONFIG_USB_OHCI_HCD=y
200CONFIG_USB_SUPPORT=y
201# CONFIG_USB_ZERO is not set
202CONFIG_VECTORS_BASE=0xffff0000
203# CONFIG_VFP is not set
204# CONFIG_WLAN is not set
205CONFIG_ZBOOT_ROM_BSS=0
206CONFIG_ZBOOT_ROM_TEXT=0
207CONFIG_ZONE_DMA_FLAG=0
target/linux/at91/config-default
1# CONFIG_AEABI is not set
2CONFIG_ALIGNMENT_TRAP=y
3# CONFIG_ARCH_AT572D940HF is not set
4CONFIG_ARCH_AT91=y
5# CONFIG_ARCH_AT91CAP9 is not set
6# CONFIG_ARCH_AT91RM9200 is not set
7# CONFIG_ARCH_AT91SAM9260 is not set
8# CONFIG_ARCH_AT91SAM9261 is not set
9# CONFIG_ARCH_AT91SAM9263 is not set
10# CONFIG_ARCH_AT91SAM9G10 is not set
11CONFIG_ARCH_AT91SAM9G20=y
12# CONFIG_ARCH_AT91SAM9G45 is not set
13# CONFIG_ARCH_AT91SAM9RL is not set
14# CONFIG_ARCH_AT91X40 is not set
15# CONFIG_ARCH_NUC93X is not set
16CONFIG_ARCH_REQUIRE_GPIOLIB=y
17# CONFIG_ARCH_S5P6440 is not set
18# CONFIG_ARCH_S5P6442 is not set
19# CONFIG_ARCH_S5PV210 is not set
20# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
21# CONFIG_ARCH_SHMOBILE is not set
22# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
23# CONFIG_ARCH_SUPPORTS_MSI is not set
24CONFIG_ARCH_SUSPEND_POSSIBLE=y
25CONFIG_ARM=y
26CONFIG_ARM_L1_CACHE_SHIFT=5
27CONFIG_ARM_THUMB=y
28# CONFIG_AT91SAM9X_WATCHDOG is not set
29CONFIG_AT91_EARLY_DBGU=y
30# CONFIG_AT91_EARLY_USART0 is not set
31# CONFIG_AT91_EARLY_USART1 is not set
32# CONFIG_AT91_EARLY_USART2 is not set
33# CONFIG_AT91_EARLY_USART3 is not set
34# CONFIG_AT91_EARLY_USART4 is not set
35# CONFIG_AT91_EARLY_USART5 is not set
36CONFIG_AT91_PMC_UNIT=y
37CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
38CONFIG_AT91_TIMER_HZ=100
39# CONFIG_ATMEL_PWM is not set
40# CONFIG_ATMEL_SSC is not set
41# CONFIG_ATMEL_TCLIB is not set
42CONFIG_BITREVERSE=y
43# CONFIG_BLK_DEV is not set
44# CONFIG_BLK_DEV_IDE_AT91 is not set
45# CONFIG_BLK_DEV_INITRD is not set
46CONFIG_CC_OPTIMIZE_FOR_SIZE=y
47CONFIG_CPU_32v5=y
48CONFIG_CPU_ABRT_EV5TJ=y
49CONFIG_CPU_ARM926T=y
50# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
51CONFIG_CPU_CACHE_VIVT=y
52CONFIG_CPU_COPY_V4WB=y
53CONFIG_CPU_CP15=y
54CONFIG_CPU_CP15_MMU=y
55# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
56# CONFIG_CPU_ICACHE_DISABLE is not set
57CONFIG_CPU_PABRT_LEGACY=y
58CONFIG_CPU_TLB_V4WBI=y
59CONFIG_DEBUG_BUGVERBOSE=y
60# CONFIG_DEBUG_USER is not set
61CONFIG_DECOMPRESS_LZMA=y
62CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
63# CONFIG_DM9000 is not set
64CONFIG_EXT2_FS=y
65# CONFIG_FPE_FASTFPE is not set
66# CONFIG_FPE_NWFPE is not set
67CONFIG_FRAME_POINTER=y
68# CONFIG_FSNOTIFY is not set
69CONFIG_GENERIC_ATOMIC64=y
70CONFIG_GENERIC_CLOCKEVENTS=y
71CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
72CONFIG_GENERIC_FIND_LAST_BIT=y
73CONFIG_GENERIC_GPIO=y
74CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
75CONFIG_GENERIC_PWM=y
76CONFIG_GPIOLIB=y
77CONFIG_GPIO_DEVICE=y
78# CONFIG_GPIO_PWM is not set
79CONFIG_GPIO_SYSFS=y
80# CONFIG_HAMRADIO is not set
81CONFIG_HARDIRQS_SW_RESEND=y
82CONFIG_HAS_DMA=y
83CONFIG_HAS_IOMEM=y
84CONFIG_HAS_IOPORT=y
85CONFIG_HAVE_AOUT=y
86CONFIG_HAVE_ARCH_KGDB=y
87CONFIG_HAVE_AT91_USART3=y
88CONFIG_HAVE_AT91_USART4=y
89CONFIG_HAVE_AT91_USART5=y
90CONFIG_HAVE_CLK=y
91CONFIG_HAVE_FUNCTION_TRACER=y
92CONFIG_HAVE_GENERIC_DMA_COHERENT=y
93CONFIG_HAVE_IDE=y
94CONFIG_HAVE_KERNEL_GZIP=y
95CONFIG_HAVE_KERNEL_LZMA=y
96CONFIG_HAVE_KERNEL_LZO=y
97CONFIG_HAVE_KPROBES=y
98CONFIG_HAVE_KRETPROBES=y
99CONFIG_HAVE_LATENCYTOP_SUPPORT=y
100CONFIG_HAVE_OPROFILE=y
101CONFIG_HAVE_PERF_EVENTS=y
102CONFIG_HAVE_PROC_CPU=y
103# CONFIG_HW_RANDOM is not set
104# CONFIG_ISDN is not set
105# CONFIG_LEDS is not set
106# CONFIG_LEDS_ATMEL_PWM is not set
107# CONFIG_LEDS_GPIO is not set
108CONFIG_MACB=y
109# CONFIG_MACH_AT91SAM9G20EK is not set
110# CONFIG_MACH_AT91SAM9G20EK_2MMC is not set
111# CONFIG_MACH_CPU9G20 is not set
112CONFIG_MACH_NETUS_FOXBOARD=y
113# CONFIG_MFD_T7L66XB is not set
114# CONFIG_MII is not set
115CONFIG_MMC=y
116CONFIG_MMC_AT91=y
117# CONFIG_MMC_ATMELMCI is not set
118CONFIG_MMC_BLOCK=y
119CONFIG_MTD_DATAFLASH=y
120# CONFIG_MTD_DATAFLASH_OTP is not set
121# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
122CONFIG_NEED_DMA_MAP_STATE=y
123# CONFIG_NETDEV_1000 is not set
124CONFIG_NETUS_HEARTBEAT_LED=y
125CONFIG_NETUS_SERIALS=y
126# CONFIG_NETUS_USE_DATAFLASH is not set
127CONFIG_NLS=y
128CONFIG_PAGEFLAGS_EXTENDED=y
129CONFIG_PAGE_OFFSET=0xC0000000
130# CONFIG_PATA_AT91 is not set
131# CONFIG_PCI_SYSCALL is not set
132CONFIG_PERF_USE_VMALLOC=y
133CONFIG_PHYLIB=y
134CONFIG_RTC_CLASS=y
135CONFIG_RTC_DRV_AT91SAM9=y
136CONFIG_RTC_DRV_AT91SAM9_GPBR=0
137CONFIG_RTC_DRV_AT91SAM9_RTT=0
138# CONFIG_SCSI_DMA is not set
139CONFIG_SCSI_MOD=y
140# CONFIG_SDIO_UART is not set
141# CONFIG_SERIAL_8250 is not set
142CONFIG_SERIAL_ATMEL=y
143CONFIG_SERIAL_ATMEL_CONSOLE=y
144CONFIG_SERIAL_ATMEL_PDC=y
145# CONFIG_SERIAL_ATMEL_TTYAT is not set
146CONFIG_SPI=y
147CONFIG_SPI_ATMEL=y
148# CONFIG_SPI_BITBANG is not set
149# CONFIG_SPI_GPIO is not set
150CONFIG_SPI_MASTER=y
151CONFIG_SPI_SPIDEV=y
152CONFIG_SPLIT_PTLOCK_CPUS=999999
153# CONFIG_STAGING is not set
154CONFIG_SYS_SUPPORTS_APM_EMULATION=y
155#CONFIG_SND_ATMEL_SOC is not set
156CONFIG_UID16=y
157CONFIG_USB=y
158# CONFIG_USB_ARCH_HAS_EHCI is not set
159CONFIG_USB_AT91=y
160# CONFIG_USB_AUDIO is not set
161# CONFIG_USB_CDC_COMPOSITE is not set
162# CONFIG_USB_DEVICEFS is not set
163CONFIG_USB_ETH=y
164CONFIG_USB_ETH_EEM=y
165CONFIG_USB_ETH_RNDIS=y
166# CONFIG_USB_FILE_STORAGE is not set
167CONFIG_USB_GADGET=y
168# CONFIG_USB_GADGETFS is not set
169# CONFIG_USB_GADGET_AMD5536UDC is not set
170CONFIG_USB_GADGET_AT91=y
171# CONFIG_USB_GADGET_ATMEL_USBA is not set
172# CONFIG_USB_GADGET_CI13XXX is not set
173# CONFIG_USB_GADGET_DEBUG_FILES is not set
174# CONFIG_USB_GADGET_DEBUG_FS is not set
175# CONFIG_USB_GADGET_DUALSPEED is not set
176# CONFIG_USB_GADGET_DUMMY_HCD is not set
177# CONFIG_USB_GADGET_FSL_QE is not set
178# CONFIG_USB_GADGET_FSL_USB2 is not set
179# CONFIG_USB_GADGET_GOKU is not set
180# CONFIG_USB_GADGET_IMX is not set
181# CONFIG_USB_GADGET_LANGWELL is not set
182# CONFIG_USB_GADGET_LH7A40X is not set
183# CONFIG_USB_GADGET_M66592 is not set
184# CONFIG_USB_GADGET_MUSB_HDRC is not set
185# CONFIG_USB_GADGET_NET2280 is not set
186# CONFIG_USB_GADGET_OMAP is not set
187# CONFIG_USB_GADGET_PXA25X is not set
188# CONFIG_USB_GADGET_PXA27X is not set
189# CONFIG_USB_GADGET_R8A66597 is not set
190# CONFIG_USB_GADGET_S3C2410 is not set
191# CONFIG_USB_GADGET_S3C_HSOTG is not set
192CONFIG_USB_GADGET_SELECTED=y
193CONFIG_USB_GADGET_VBUS_DRAW=2
194# CONFIG_USB_G_PRINTER is not set
195# CONFIG_USB_G_SERIAL is not set
196# CONFIG_USB_MIDI_GADGET is not set
197# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
198# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
199CONFIG_USB_OHCI_HCD=y
200CONFIG_USB_SUPPORT=y
201# CONFIG_USB_ZERO is not set
202CONFIG_VECTORS_BASE=0xffff0000
203# CONFIG_VFP is not set
204# CONFIG_WLAN is not set
205CONFIG_ZBOOT_ROM_BSS=0
206CONFIG_ZBOOT_ROM_TEXT=0
207CONFIG_ZONE_DMA_FLAG=0
target/linux/at91/patches-2.6.25/000-at91patches.patch
1+++ b/arch/arm/mach-at91/Kconfig
2@@ -12,18 +12,28 @@ config ARCH_AT91RM9200
3
4 config ARCH_AT91SAM9260
5     bool "AT91SAM9260 or AT91SAM9XE"
6+ select GENERIC_TIME
7+ select GENERIC_CLOCKEVENTS
8
9 config ARCH_AT91SAM9261
10     bool "AT91SAM9261"
11+ select GENERIC_TIME
12+ select GENERIC_CLOCKEVENTS
13
14 config ARCH_AT91SAM9263
15     bool "AT91SAM9263"
16+ select GENERIC_TIME
17+ select GENERIC_CLOCKEVENTS
18
19 config ARCH_AT91SAM9RL
20     bool "AT91SAM9RL"
21+ select GENERIC_TIME
22+ select GENERIC_CLOCKEVENTS
23
24 config ARCH_AT91CAP9
25     bool "AT91CAP9"
26+ select GENERIC_TIME
27+ select GENERIC_CLOCKEVENTS
28
29 config ARCH_AT91X40
30     bool "AT91x40"
31@@ -45,7 +55,7 @@ config MACH_ONEARM
32     depends on ARCH_AT91RM9200
33     help
34       Select this if you are using Ajeco's 1ARM Single Board Computer.
35- <http://www.ajeco.fi/products.htm>
36+ <http://www.ajeco.fi/eng/products_e.htm>
37
38 config ARCH_AT91RM9200DK
39     bool "Atmel AT91RM9200-DK Development board"
40@@ -94,7 +104,7 @@ config MACH_KB9200
41     depends on ARCH_AT91RM9200
42     help
43       Select this if you are using KwikByte's KB920x board.
44- <http://kwikbyte.com/KB9202_description_new.htm>
45+ <http://www.kwikbyte.com/KB9202.html>
46
47 config MACH_PICOTUX2XX
48     bool "picotux 200"
49@@ -109,6 +119,38 @@ config MACH_KAFA
50     help
51       Select this if you are using Sperry-Sun's KAFA board.
52
53+config MACH_CHUB
54+ bool "Promwad Chub board"
55+ depends on ARCH_AT91RM9200
56+ help
57+ Select this if you are using Promwad's Chub board.
58+
59+config MACH_HOMEMATIC
60+ bool "eQ-3 HomeMatic"
61+ depends on ARCH_AT91RM9200
62+ help
63+ Select this if you are using eQ-3's HomeMatic device.
64+ <http://www.eq-3.com>
65+
66+config MACH_ECBAT91
67+ bool "emQbit ECB_AT91 SBC"
68+ depends on ARCH_AT91RM9200
69+ help
70+ Select this if you are using emQbit's ECB_AT91 board.
71+ <http://wiki.emqbit.com/free-ecb-at91>
72+
73+config MACH_SWEDATMS
74+ bool "Sweda TMS Board"
75+ depends on ARCH_AT91RM9200
76+ help
77+ Select this if you are using Sweda TMS-100 board.
78+
79+config MACH_TT9200
80+ bool "Toptech TT9200"
81+ depends on ARCH_AT91RM9200
82+ help
83+ Select this if you are using Toptech's TT9200 board.
84+
85 endif
86
87 # ----------------------------------------------------------
88@@ -133,6 +175,34 @@ config MACH_AT91SAM9260EK
89       Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
90       <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
91
92+config MACH_CAM60
93+ bool "KwikByte KB9260 (CAM60) board"
94+ depends on ARCH_AT91SAM9260
95+ help
96+ Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260.
97+ <http://www.kwikbyte.com/KB9260.html>
98+
99+config MACH_SAM9_L9260
100+ bool "Olimex SAM9-L9260 board"
101+ depends on ARCH_AT91SAM9260
102+ help
103+ Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
104+ <http://www.olimex.com/dev/sam9-L9260.html>
105+
106+config MACH_USB_A9260
107+ bool "CALAO USB-A9260"
108+ depends on ARCH_AT91SAM9260
109+ help
110+ Select this if you are using a Calao Systems USB-A9260.
111+ <http://www.calao-systems.com>
112+
113+config MACH_QIL_A9260
114+ bool "CALAO QIL-A9260 board"
115+ depends on ARCH_AT91SAM9260
116+ help
117+ Select this if you are using a Calao Systems QIL-A9260 Board.
118+ <http://www.calao-systems.com>
119+
120 endif
121
122 # ----------------------------------------------------------
123@@ -163,6 +233,13 @@ config MACH_AT91SAM9263EK
124       Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
125       <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
126
127+config MACH_USB_A9263
128+ bool "CALAO USB-A9263"
129+ depends on ARCH_AT91SAM9263
130+ help
131+ Select this if you are using a Calao Systems USB-A9263.
132+ <http://www.calao-systems.com>
133+
134 endif
135
136 # ----------------------------------------------------------
137@@ -216,7 +293,7 @@ comment "AT91 Board Options"
138
139 config MTD_AT91_DATAFLASH_CARD
140     bool "Enable DataFlash Card support"
141- depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK)
142+ depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK)
143     help
144       Enable support for the DataFlash card.
145
146@@ -237,6 +314,19 @@ config AT91_PROGRAMMABLE_CLOCKS
147       Select this if you need to program one or more of the PCK0..PCK3
148       programmable clock outputs.
149
150+config AT91_SLOW_CLOCK
151+ bool "Suspend-to-RAM disables main oscillator"
152+ depends on SUSPEND
153+ help
154+ Select this if you want Suspend-to-RAM to save the most power
155+ possible (without powering off the CPU) by disabling the PLLs
156+ and main oscillator so that only the 32 KiHz clock is available.
157+
158+ When only that slow-clock is available, some peripherals lose
159+ functionality. Many can't issue wakeup events unless faster
160+ clocks are available. Some lose their operating state and
161+ need to be completely re-initialized.
162+
163 config AT91_TIMER_HZ
164        int "Kernel HZ (jiffies per second)"
165        range 32 1024
166+++ b/arch/arm/mach-at91/Makefile
167@@ -28,16 +28,26 @@ obj-$(CONFIG_MACH_CARMEVA) += board-carm
168 obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
169 obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
170 obj-$(CONFIG_MACH_KAFA) += board-kafa.o
171+obj-$(CONFIG_MACH_CHUB) += board-chub.o
172 obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o
173+obj-$(CONFIG_MACH_HOMEMATIC) += board-homematic.o
174+obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
175+obj-$(CONFIG_MACH_SWEDATMS) += board-tms.o
176+obj-$(CONFIG_MACH_TT9200) += board-tt9200.o
177
178 # AT91SAM9260 board-specific support
179 obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
180+obj-$(CONFIG_MACH_CAM60) += board-cam60.o
181+obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
182+obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o
183+obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o
184
185 # AT91SAM9261 board-specific support
186 obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
187
188 # AT91SAM9263 board-specific support
189 obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
190+obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o
191
192 # AT91SAM9RL board-specific support
193 obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
194@@ -50,9 +60,11 @@ obj-$(CONFIG_MACH_AT91EB01) += board-eb0
195
196 # Drivers
197 obj-y += leds.o
198+obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
199
200 # Power Management
201 obj-$(CONFIG_PM) += pm.o
202+obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
203
204 ifeq ($(CONFIG_PM_DEBUG),y)
205 CFLAGS_pm.o += -DDEBUG
206+++ b/arch/arm/mach-at91/at91cap9.c
207@@ -13,12 +13,15 @@
208  */
209
210 #include <linux/module.h>
211+#include <linux/pm.h>
212
213 #include <asm/mach/arch.h>
214 #include <asm/mach/map.h>
215+#include <asm/arch/cpu.h>
216 #include <asm/arch/at91cap9.h>
217 #include <asm/arch/at91_pmc.h>
218 #include <asm/arch/at91_rstc.h>
219+#include <asm/arch/at91_shdwc.h>
220
221 #include "generic.h"
222 #include "clock.h"
223@@ -288,6 +291,12 @@ static void at91cap9_reset(void)
224     at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
225 }
226
227+static void at91cap9_poweroff(void)
228+{
229+ at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
230+}
231+
232+
233 /* --------------------------------------------------------------------
234  * AT91CAP9 processor initialization
235  * -------------------------------------------------------------------- */
236@@ -298,6 +307,7 @@ void __init at91cap9_initialize(unsigned
237     iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
238
239     at91_arch_reset = at91cap9_reset;
240+ pm_power_off = at91cap9_poweroff;
241     at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
242
243     /* Init clock subsystem */
244@@ -308,6 +318,12 @@ void __init at91cap9_initialize(unsigned
245
246     /* Register GPIO subsystem */
247     at91_gpio_init(at91cap9_gpio, 4);
248+
249+ /* Remember the silicon revision */
250+ if (cpu_is_at91cap9_revB())
251+ system_rev = 0xB;
252+ else if (cpu_is_at91cap9_revC())
253+ system_rev = 0xC;
254 }
255
256 /* --------------------------------------------------------------------
257+++ b/arch/arm/mach-at91/at91cap9_devices.c
258@@ -13,18 +13,20 @@
259  */
260 #include <asm/mach/arch.h>
261 #include <asm/mach/map.h>
262+#include <asm/mach/irq.h>
263
264 #include <linux/dma-mapping.h>
265 #include <linux/platform_device.h>
266-#include <linux/mtd/physmap.h>
267+#include <linux/i2c-gpio.h>
268
269 #include <video/atmel_lcdc.h>
270
271 #include <asm/arch/board.h>
272+#include <asm/arch/cpu.h>
273 #include <asm/arch/gpio.h>
274 #include <asm/arch/at91cap9.h>
275-#include <asm/arch/at91sam926x_mc.h>
276 #include <asm/arch/at91cap9_matrix.h>
277+#include <asm/arch/at91sam9_smc.h>
278
279 #include "generic.h"
280
281@@ -69,6 +71,9 @@ void __init at91_add_device_usbh(struct
282     if (!data)
283         return;
284
285+ if (cpu_is_at91cap9_revB())
286+ set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
287+
288     /* Enable VBus control for UHP ports */
289     for (i = 0; i < data->ports; i++) {
290         if (data->vbus_pin[i])
291@@ -84,6 +89,110 @@ void __init at91_add_device_usbh(struct
292
293
294 /* --------------------------------------------------------------------
295+ * USB HS Device (Gadget)
296+ * -------------------------------------------------------------------- */
297+
298+#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
299+
300+static struct resource usba_udc_resources[] = {
301+ [0] = {
302+ .start = AT91CAP9_UDPHS_FIFO,
303+ .end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1,
304+ .flags = IORESOURCE_MEM,
305+ },
306+ [1] = {
307+ .start = AT91CAP9_BASE_UDPHS,
308+ .end = AT91CAP9_BASE_UDPHS + SZ_1K - 1,
309+ .flags = IORESOURCE_MEM,
310+ },
311+ [2] = {
312+ .start = AT91CAP9_ID_UDPHS,
313+ .end = AT91CAP9_ID_UDPHS,
314+ .flags = IORESOURCE_IRQ,
315+ },
316+};
317+
318+#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
319+ [idx] = { \
320+ .name = nam, \
321+ .index = idx, \
322+ .fifo_size = maxpkt, \
323+ .nr_banks = maxbk, \
324+ .can_dma = dma, \
325+ .can_isoc = isoc, \
326+ }
327+
328+static struct usba_ep_data usba_udc_ep[] = {
329+ EP("ep0", 0, 64, 1, 0, 0),
330+ EP("ep1", 1, 1024, 3, 1, 1),
331+ EP("ep2", 2, 1024, 3, 1, 1),
332+ EP("ep3", 3, 1024, 2, 1, 1),
333+ EP("ep4", 4, 1024, 2, 1, 1),
334+ EP("ep5", 5, 1024, 2, 1, 0),
335+ EP("ep6", 6, 1024, 2, 1, 0),
336+ EP("ep7", 7, 1024, 2, 0, 0),
337+};
338+
339+#undef EP
340+
341+/*
342+ * pdata doesn't have room for any endpoints, so we need to
343+ * append room for the ones we need right after it.
344+ */
345+static struct {
346+ struct usba_platform_data pdata;
347+ struct usba_ep_data ep[8];
348+} usba_udc_data;
349+
350+static struct platform_device at91_usba_udc_device = {
351+ .name = "atmel_usba_udc",
352+ .id = -1,
353+ .dev = {
354+ .platform_data = &usba_udc_data.pdata,
355+ },
356+ .resource = usba_udc_resources,
357+ .num_resources = ARRAY_SIZE(usba_udc_resources),
358+};
359+
360+void __init at91_add_device_usba(struct usba_platform_data *data)
361+{
362+ if (cpu_is_at91cap9_revB()) {
363+ set_irq_type(AT91CAP9_ID_UDPHS, IRQT_HIGH);
364+ at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
365+ AT91_MATRIX_UDPHS_BYPASS_LOCK);
366+ }
367+ else
368+ at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
369+
370+ /*
371+ * Invalid pins are 0 on AT91, but the usba driver is shared
372+ * with AVR32, which use negative values instead. Once/if
373+ * gpio_is_valid() is ported to AT91, revisit this code.
374+ */
375+ usba_udc_data.pdata.vbus_pin = -EINVAL;
376+ usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
377+ memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));;
378+
379+ if (data && data->vbus_pin > 0) {
380+ at91_set_gpio_input(data->vbus_pin, 0);
381+ at91_set_deglitch(data->vbus_pin, 1);
382+ usba_udc_data.pdata.vbus_pin = data->vbus_pin;
383+ }
384+
385+ /* Pullup pin is handled internally by USB device peripheral */
386+
387+ /* Clocks */
388+ at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
389+ at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
390+
391+ platform_device_register(&at91_usba_udc_device);
392+}
393+#else
394+void __init at91_add_device_usba(struct usba_platform_data *data) {}
395+#endif
396+
397+
398+/* --------------------------------------------------------------------
399  * Ethernet
400  * -------------------------------------------------------------------- */
401
402@@ -246,7 +355,7 @@ void __init at91_add_device_mmc(short mm
403         }
404
405         mmc0_data = *data;
406- at91_clock_associate("mci0_clk", &at91cap9_mmc1_device.dev, "mci_clk");
407+ at91_clock_associate("mci0_clk", &at91cap9_mmc0_device.dev, "mci_clk");
408         platform_device_register(&at91cap9_mmc0_device);
409     } else { /* MCI1 */
410         /* CLK */
411@@ -283,10 +392,15 @@ static struct at91_nand_data nand_data;
412 #define NAND_BASE AT91_CHIPSELECT_3
413
414 static struct resource nand_resources[] = {
415- {
416+ [0] = {
417         .start = NAND_BASE,
418         .end = NAND_BASE + SZ_256M - 1,
419         .flags = IORESOURCE_MEM,
420+ },
421+ [1] = {
422+ .start = AT91_BASE_SYS + AT91_ECC,
423+ .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
424+ .flags = IORESOURCE_MEM,
425     }
426 };
427
428@@ -344,6 +458,7 @@ void __init at91_add_device_nand(struct
429 void __init at91_add_device_nand(struct at91_nand_data *data) {}
430 #endif
431
432+
433 /* --------------------------------------------------------------------
434  * TWI (i2c)
435  * -------------------------------------------------------------------- */
436@@ -532,17 +647,64 @@ void __init at91_add_device_spi(struct s
437
438
439 /* --------------------------------------------------------------------
440+ * Timer/Counter block
441+ * -------------------------------------------------------------------- */
442+
443+#ifdef CONFIG_ATMEL_TCLIB
444+
445+static struct resource tcb_resources[] = {
446+ [0] = {
447+ .start = AT91CAP9_BASE_TCB0,
448+ .end = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
449+ .flags = IORESOURCE_MEM,
450+ },
451+ [1] = {
452+ .start = AT91CAP9_ID_TCB,
453+ .end = AT91CAP9_ID_TCB,
454+ .flags = IORESOURCE_IRQ,
455+ },
456+};
457+
458+static struct platform_device at91cap9_tcb_device = {
459+ .name = "atmel_tcb",
460+ .id = 0,
461+ .resource = tcb_resources,
462+ .num_resources = ARRAY_SIZE(tcb_resources),
463+};
464+
465+static void __init at91_add_device_tc(void)
466+{
467+ /* this chip has one clock and irq for all three TC channels */
468+ at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
469+ platform_device_register(&at91cap9_tcb_device);
470+}
471+#else
472+static void __init at91_add_device_tc(void) { }
473+#endif
474+
475+
476+/* --------------------------------------------------------------------
477  * RTT
478  * -------------------------------------------------------------------- */
479
480+static struct resource rtt_resources[] = {
481+ {
482+ .start = AT91_BASE_SYS + AT91_RTT,
483+ .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
484+ .flags = IORESOURCE_MEM,
485+ }
486+};
487+
488 static struct platform_device at91cap9_rtt_device = {
489     .name = "at91_rtt",
490- .id = -1,
491- .num_resources = 0,
492+ .id = 0,
493+ .resource = rtt_resources,
494+ .num_resources = ARRAY_SIZE(rtt_resources),
495 };
496
497 static void __init at91_add_device_rtt(void)
498 {
499+ device_init_wakeup(&at91cap9_rtt_device.dev, 1);
500     platform_device_register(&at91cap9_rtt_device);
501 }
502
503@@ -660,6 +822,9 @@ void __init at91_add_device_lcdc(struct
504     if (!data)
505         return;
506
507+ if (cpu_is_at91cap9_revB())
508+ set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH);
509+
510     at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
511     at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
512     at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
513@@ -990,7 +1155,7 @@ static inline void configure_usart2_pins
514         at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
515 }
516
517-static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
518+static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
519 struct platform_device *atmel_default_console_device; /* the serial console device */
520
521 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
522@@ -1031,8 +1196,6 @@ void __init at91_set_serial_console(unsi
523 {
524     if (portnr < ATMEL_MAX_UART)
525         atmel_default_console_device = at91_uarts[portnr];
526- if (!atmel_default_console_device)
527- printk(KERN_INFO "AT91: No default serial console defined.\n");
528 }
529
530 void __init at91_add_device_serial(void)
531@@ -1043,6 +1206,9 @@ void __init at91_add_device_serial(void)
532         if (at91_uarts[i])
533             platform_device_register(at91_uarts[i]);
534     }
535+
536+ if (!atmel_default_console_device)
537+ printk(KERN_INFO "AT91: No default serial console defined.\n");
538 }
539 #else
540 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
541@@ -1060,6 +1226,7 @@ static int __init at91_add_standard_devi
542 {
543     at91_add_device_rtt();
544     at91_add_device_watchdog();
545+ at91_add_device_tc();
546     return 0;
547 }
548
549+++ b/arch/arm/mach-at91/at91rm9200_devices.c
550@@ -513,7 +513,18 @@ void __init at91_add_device_i2c(struct i
551  * SPI
552  * -------------------------------------------------------------------- */
553
554-#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
555+#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) /* legacy SPI driver */
556+#define SPI_DEVNAME "at91_spi"
557+
558+#elif defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) /* SPI bitbanging driver */
559+#define SPI_DEVNAME "at91_spi"
560+
561+#elif defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) /* new SPI driver */
562+#define SPI_DEVNAME "atmel_spi"
563+
564+#endif
565+
566+#ifdef SPI_DEVNAME
567 static u64 spi_dmamask = DMA_BIT_MASK(32);
568
569 static struct resource spi_resources[] = {
570@@ -530,7 +541,7 @@ static struct resource spi_resources[] =
571 };
572
573 static struct platform_device at91rm9200_spi_device = {
574- .name = "atmel_spi",
575+ .name = SPI_DEVNAME,
576     .id = 0,
577     .dev = {
578                 .dma_mask = &spi_dmamask,
579@@ -563,6 +574,12 @@ void __init at91_add_device_spi(struct s
580         else
581             at91_set_gpio_output(cs_pin, 1);
582
583+#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
584+ /*
585+ * Force peripheral mode when using the legacy SPI driver.
586+ */
587+ at91_set_A_periph(cs_pin, 0);
588+#endif
589
590         /* pass chip-select pin to driver */
591         devices[i].controller_data = (void *) cs_pin;
592@@ -577,6 +594,90 @@ void __init at91_add_device_spi(struct s
593
594
595 /* --------------------------------------------------------------------
596+ * Timer/Counter blocks
597+ * -------------------------------------------------------------------- */
598+
599+#ifdef CONFIG_ATMEL_TCLIB
600+
601+static struct resource tcb0_resources[] = {
602+ [0] = {
603+ .start = AT91RM9200_BASE_TCB0,
604+ .end = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
605+ .flags = IORESOURCE_MEM,
606+ },
607+ [1] = {
608+ .start = AT91RM9200_ID_TC0,
609+ .end = AT91RM9200_ID_TC0,
610+ .flags = IORESOURCE_IRQ,
611+ },
612+ [2] = {
613+ .start = AT91RM9200_ID_TC1,
614+ .end = AT91RM9200_ID_TC1,
615+ .flags = IORESOURCE_IRQ,
616+ },
617+ [3] = {
618+ .start = AT91RM9200_ID_TC2,
619+ .end = AT91RM9200_ID_TC2,
620+ .flags = IORESOURCE_IRQ,
621+ },
622+};
623+
624+static struct platform_device at91rm9200_tcb0_device = {
625+ .name = "atmel_tcb",
626+ .id = 0,
627+ .resource = tcb0_resources,
628+ .num_resources = ARRAY_SIZE(tcb0_resources),
629+};
630+
631+static struct resource tcb1_resources[] = {
632+ [0] = {
633+ .start = AT91RM9200_BASE_TCB1,
634+ .end = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
635+ .flags = IORESOURCE_MEM,
636+ },
637+ [1] = {
638+ .start = AT91RM9200_ID_TC3,
639+ .end = AT91RM9200_ID_TC3,
640+ .flags = IORESOURCE_IRQ,
641+ },
642+ [2] = {
643+ .start = AT91RM9200_ID_TC4,
644+ .end = AT91RM9200_ID_TC4,
645+ .flags = IORESOURCE_IRQ,
646+ },
647+ [3] = {
648+ .start = AT91RM9200_ID_TC5,
649+ .end = AT91RM9200_ID_TC5,
650+ .flags = IORESOURCE_IRQ,
651+ },
652+};
653+
654+static struct platform_device at91rm9200_tcb1_device = {
655+ .name = "atmel_tcb",
656+ .id = 1,
657+ .resource = tcb1_resources,
658+ .num_resources = ARRAY_SIZE(tcb1_resources),
659+};
660+
661+static void __init at91_add_device_tc(void)
662+{
663+ /* this chip has a separate clock and irq for each TC channel */
664+ at91_clock_associate("tc0_clk", &at91rm9200_tcb0_device.dev, "t0_clk");
665+ at91_clock_associate("tc1_clk", &at91rm9200_tcb0_device.dev, "t1_clk");
666+ at91_clock_associate("tc2_clk", &at91rm9200_tcb0_device.dev, "t2_clk");
667+ platform_device_register(&at91rm9200_tcb0_device);
668+
669+ at91_clock_associate("tc3_clk", &at91rm9200_tcb1_device.dev, "t0_clk");
670+ at91_clock_associate("tc4_clk", &at91rm9200_tcb1_device.dev, "t1_clk");
671+ at91_clock_associate("tc5_clk", &at91rm9200_tcb1_device.dev, "t2_clk");
672+ platform_device_register(&at91rm9200_tcb1_device);
673+}
674+#else
675+static void __init at91_add_device_tc(void) { }
676+#endif
677+
678+
679+/* --------------------------------------------------------------------
680  * RTC
681  * -------------------------------------------------------------------- */
682
683@@ -589,6 +690,7 @@ static struct platform_device at91rm9200
684
685 static void __init at91_add_device_rtc(void)
686 {
687+ device_init_wakeup(&at91rm9200_rtc_device.dev, 1);
688     platform_device_register(&at91rm9200_rtc_device);
689 }
690 #else
691@@ -1019,7 +1121,7 @@ static inline void configure_usart3_pins
692         at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
693 }
694
695-static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
696+static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
697 struct platform_device *atmel_default_console_device; /* the serial console device */
698
699 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
700@@ -1110,8 +1212,6 @@ void __init at91_set_serial_console(unsi
701 {
702     if (portnr < ATMEL_MAX_UART)
703         atmel_default_console_device = at91_uarts[portnr];
704- if (!atmel_default_console_device)
705- printk(KERN_INFO "AT91: No default serial console defined.\n");
706 }
707
708 void __init at91_add_device_serial(void)
709@@ -1122,6 +1222,9 @@ void __init at91_add_device_serial(void)
710         if (at91_uarts[i])
711             platform_device_register(at91_uarts[i]);
712     }
713+
714+ if (!atmel_default_console_device)
715+ printk(KERN_INFO "AT91: No default serial console defined.\n");
716 }
717 #else
718 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
719@@ -1141,6 +1244,7 @@ static int __init at91_add_standard_devi
720 {
721     at91_add_device_rtc();
722     at91_add_device_watchdog();
723+ at91_add_device_tc();
724     return 0;
725 }
726
727+++ b/arch/arm/mach-at91/at91rm9200_time.c
728@@ -136,8 +136,6 @@ clkevt32k_next_event(unsigned long delta
729     u32 alm;
730     int status = 0;
731
732- BUG_ON(delta < 2);
733-
734     /* Use "raw" primitives so we behave correctly on RT kernels. */
735     raw_local_irq_save(flags);
736
737+++ b/arch/arm/mach-at91/at91sam9260.c
738@@ -11,6 +11,7 @@
739  */
740
741 #include <linux/module.h>
742+#include <linux/pm.h>
743
744 #include <asm/mach/arch.h>
745 #include <asm/mach/map.h>
746@@ -18,6 +19,7 @@
747 #include <asm/arch/at91sam9260.h>
748 #include <asm/arch/at91_pmc.h>
749 #include <asm/arch/at91_rstc.h>
750+#include <asm/arch/at91_shdwc.h>
751
752 #include "generic.h"
753 #include "clock.h"
754@@ -267,6 +269,11 @@ static void at91sam9260_reset(void)
755     at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
756 }
757
758+static void at91sam9260_poweroff(void)
759+{
760+ at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
761+}
762+
763
764 /* --------------------------------------------------------------------
765  * AT91SAM9260 processor initialization
766@@ -304,6 +311,7 @@ void __init at91sam9260_initialize(unsig
767         iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
768
769     at91_arch_reset = at91sam9260_reset;
770+ pm_power_off = at91sam9260_poweroff;
771     at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
772             | (1 << AT91SAM9260_ID_IRQ2);
773
774+++ b/arch/arm/mach-at91/at91sam9260_devices.c
775@@ -19,8 +19,8 @@
776 #include <asm/arch/board.h>
777 #include <asm/arch/gpio.h>
778 #include <asm/arch/at91sam9260.h>
779-#include <asm/arch/at91sam926x_mc.h>
780 #include <asm/arch/at91sam9260_matrix.h>
781+#include <asm/arch/at91sam9_smc.h>
782
783 #include "generic.h"
784
785@@ -288,10 +288,15 @@ static struct at91_nand_data nand_data;
786 #define NAND_BASE AT91_CHIPSELECT_3
787
788 static struct resource nand_resources[] = {
789- {
790+ [0] = {
791         .start = NAND_BASE,
792         .end = NAND_BASE + SZ_256M - 1,
793         .flags = IORESOURCE_MEM,
794+ },
795+ [1] = {
796+ .start = AT91_BASE_SYS + AT91_ECC,
797+ .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
798+ .flags = IORESOURCE_MEM,
799     }
800 };
801
802@@ -540,6 +545,90 @@ void __init at91_add_device_spi(struct s
803
804
805 /* --------------------------------------------------------------------
806+ * Timer/Counter blocks
807+ * -------------------------------------------------------------------- */
808+
809+#ifdef CONFIG_ATMEL_TCLIB
810+
811+static struct resource tcb0_resources[] = {
812+ [0] = {
813+ .start = AT91SAM9260_BASE_TCB0,
814+ .end = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
815+ .flags = IORESOURCE_MEM,
816+ },
817+ [1] = {
818+ .start = AT91SAM9260_ID_TC0,
819+ .end = AT91SAM9260_ID_TC0,
820+ .flags = IORESOURCE_IRQ,
821+ },
822+ [2] = {
823+ .start = AT91SAM9260_ID_TC1,
824+ .end = AT91SAM9260_ID_TC1,
825+ .flags = IORESOURCE_IRQ,
826+ },
827+ [3] = {
828+ .start = AT91SAM9260_ID_TC2,
829+ .end = AT91SAM9260_ID_TC2,
830+ .flags = IORESOURCE_IRQ,
831+ },
832+};
833+
834+static struct platform_device at91sam9260_tcb0_device = {
835+ .name = "atmel_tcb",
836+ .id = 0,
837+ .resource = tcb0_resources,
838+ .num_resources = ARRAY_SIZE(tcb0_resources),
839+};
840+
841+static struct resource tcb1_resources[] = {
842+ [0] = {
843+ .start = AT91SAM9260_BASE_TCB1,
844+ .end = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
845+ .flags = IORESOURCE_MEM,
846+ },
847+ [1] = {
848+ .start = AT91SAM9260_ID_TC3,
849+ .end = AT91SAM9260_ID_TC3,
850+ .flags = IORESOURCE_IRQ,
851+ },
852+ [2] = {
853+ .start = AT91SAM9260_ID_TC4,
854+ .end = AT91SAM9260_ID_TC4,
855+ .flags = IORESOURCE_IRQ,
856+ },
857+ [3] = {
858+ .start = AT91SAM9260_ID_TC5,
859+ .end = AT91SAM9260_ID_TC5,
860+ .flags = IORESOURCE_IRQ,
861+ },
862+};
863+
864+static struct platform_device at91sam9260_tcb1_device = {
865+ .name = "atmel_tcb",
866+ .id = 1,
867+ .resource = tcb1_resources,
868+ .num_resources = ARRAY_SIZE(tcb1_resources),
869+};
870+
871+static void __init at91_add_device_tc(void)
872+{
873+ /* this chip has a separate clock and irq for each TC channel */
874+ at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
875+ at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
876+ at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
877+ platform_device_register(&at91sam9260_tcb0_device);
878+
879+ at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
880+ at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
881+ at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
882+ platform_device_register(&at91sam9260_tcb1_device);
883+}
884+#else
885+static void __init at91_add_device_tc(void) { }
886+#endif
887+
888+
889+/* --------------------------------------------------------------------
890  * RTT
891  * -------------------------------------------------------------------- */
892
893@@ -553,13 +642,14 @@ static struct resource rtt_resources[] =
894
895 static struct platform_device at91sam9260_rtt_device = {
896     .name = "at91_rtt",
897- .id = -1,
898+ .id = 0,
899     .resource = rtt_resources,
900     .num_resources = ARRAY_SIZE(rtt_resources),
901 };
902
903 static void __init at91_add_device_rtt(void)
904 {
905+ device_init_wakeup(&at91sam9260_rtt_device.dev, 1);
906     platform_device_register(&at91sam9260_rtt_device);
907 }
908
909@@ -962,7 +1052,7 @@ static inline void configure_usart5_pins
910     at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
911 }
912
913-static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
914+static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
915 struct platform_device *atmel_default_console_device; /* the serial console device */
916
917 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
918@@ -1073,8 +1163,6 @@ void __init at91_set_serial_console(unsi
919 {
920     if (portnr < ATMEL_MAX_UART)
921         atmel_default_console_device = at91_uarts[portnr];
922- if (!atmel_default_console_device)
923- printk(KERN_INFO "AT91: No default serial console defined.\n");
924 }
925
926 void __init at91_add_device_serial(void)
927@@ -1085,6 +1173,9 @@ void __init at91_add_device_serial(void)
928         if (at91_uarts[i])
929             platform_device_register(at91_uarts[i]);
930     }
931+
932+ if (!atmel_default_console_device)
933+ printk(KERN_INFO "AT91: No default serial console defined.\n");
934 }
935 #else
936 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
937@@ -1103,6 +1194,7 @@ static int __init at91_add_standard_devi
938 {
939     at91_add_device_rtt();
940     at91_add_device_watchdog();
941+ at91_add_device_tc();
942     return 0;
943 }
944
945+++ b/arch/arm/mach-at91/at91sam9261.c
946@@ -11,12 +11,14 @@
947  */
948
949 #include <linux/module.h>
950+#include <linux/pm.h>
951
952 #include <asm/mach/arch.h>
953 #include <asm/mach/map.h>
954 #include <asm/arch/at91sam9261.h>
955 #include <asm/arch/at91_pmc.h>
956 #include <asm/arch/at91_rstc.h>
957+#include <asm/arch/at91_shdwc.h>
958
959 #include "generic.h"
960 #include "clock.h"
961@@ -245,6 +247,11 @@ static void at91sam9261_reset(void)
962     at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
963 }
964
965+static void at91sam9261_poweroff(void)
966+{
967+ at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
968+}
969+
970
971 /* --------------------------------------------------------------------
972  * AT91SAM9261 processor initialization
973@@ -256,6 +263,7 @@ void __init at91sam9261_initialize(unsig
974     iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
975
976     at91_arch_reset = at91sam9261_reset;
977+ pm_power_off = at91sam9261_poweroff;
978     at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
979             | (1 << AT91SAM9261_ID_IRQ2);
980
981+++ b/arch/arm/mach-at91/at91sam9261_devices.c
982@@ -24,7 +24,7 @@
983 #include <asm/arch/gpio.h>
984 #include <asm/arch/at91sam9261.h>
985 #include <asm/arch/at91sam9261_matrix.h>
986-#include <asm/arch/at91sam926x_mc.h>
987+#include <asm/arch/at91sam9_smc.h>
988
989 #include "generic.h"
990
991@@ -548,6 +548,55 @@ void __init at91_add_device_lcdc(struct
992
993
994 /* --------------------------------------------------------------------
995+ * Timer/Counter block
996+ * -------------------------------------------------------------------- */
997+
998+#ifdef CONFIG_ATMEL_TCLIB
999+
1000+static struct resource tcb_resources[] = {
1001+ [0] = {
1002+ .start = AT91SAM9261_BASE_TCB0,
1003+ .end = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
1004+ .flags = IORESOURCE_MEM,
1005+ },
1006+ [1] = {
1007+ .start = AT91SAM9261_ID_TC0,
1008+ .end = AT91SAM9261_ID_TC0,
1009+ .flags = IORESOURCE_IRQ,
1010+ },
1011+ [2] = {
1012+ .start = AT91SAM9261_ID_TC1,
1013+ .end = AT91SAM9261_ID_TC1,
1014+ .flags = IORESOURCE_IRQ,
1015+ },
1016+ [3] = {
1017+ .start = AT91SAM9261_ID_TC2,
1018+ .end = AT91SAM9261_ID_TC2,
1019+ .flags = IORESOURCE_IRQ,
1020+ },
1021+};
1022+
1023+static struct platform_device at91sam9261_tcb_device = {
1024+ .name = "atmel_tcb",
1025+ .id = 0,
1026+ .resource = tcb_resources,
1027+ .num_resources = ARRAY_SIZE(tcb_resources),
1028+};
1029+
1030+static void __init at91_add_device_tc(void)
1031+{
1032+ /* this chip has a separate clock and irq for each TC channel */
1033+ at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk");
1034+ at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk");
1035+ at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk");
1036+ platform_device_register(&at91sam9261_tcb_device);
1037+}
1038+#else
1039+static void __init at91_add_device_tc(void) { }
1040+#endif
1041+
1042+
1043+/* --------------------------------------------------------------------
1044  * RTT
1045  * -------------------------------------------------------------------- */
1046
1047@@ -561,13 +610,14 @@ static struct resource rtt_resources[] =
1048
1049 static struct platform_device at91sam9261_rtt_device = {
1050     .name = "at91_rtt",
1051- .id = -1,
1052+ .id = 0,
1053     .resource = rtt_resources,
1054     .num_resources = ARRAY_SIZE(rtt_resources),
1055 };
1056
1057 static void __init at91_add_device_rtt(void)
1058 {
1059+ device_init_wakeup(&at91sam9261_rtt_device.dev, 1);
1060     platform_device_register(&at91sam9261_rtt_device);
1061 }
1062
1063@@ -938,7 +988,7 @@ static inline void configure_usart2_pins
1064         at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */
1065 }
1066
1067-static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1068+static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1069 struct platform_device *atmel_default_console_device; /* the serial console device */
1070
1071 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1072@@ -1019,8 +1069,6 @@ void __init at91_set_serial_console(unsi
1073 {
1074     if (portnr < ATMEL_MAX_UART)
1075         atmel_default_console_device = at91_uarts[portnr];
1076- if (!atmel_default_console_device)
1077- printk(KERN_INFO "AT91: No default serial console defined.\n");
1078 }
1079
1080 void __init at91_add_device_serial(void)
1081@@ -1031,6 +1079,9 @@ void __init at91_add_device_serial(void)
1082         if (at91_uarts[i])
1083             platform_device_register(at91_uarts[i]);
1084     }
1085+
1086+ if (!atmel_default_console_device)
1087+ printk(KERN_INFO "AT91: No default serial console defined.\n");
1088 }
1089 #else
1090 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1091@@ -1050,6 +1101,7 @@ static int __init at91_add_standard_devi
1092 {
1093     at91_add_device_rtt();
1094     at91_add_device_watchdog();
1095+ at91_add_device_tc();
1096     return 0;
1097 }
1098
1099+++ b/arch/arm/mach-at91/at91sam9263.c
1100@@ -11,12 +11,14 @@
1101  */
1102
1103 #include <linux/module.h>
1104+#include <linux/pm.h>
1105
1106 #include <asm/mach/arch.h>
1107 #include <asm/mach/map.h>
1108 #include <asm/arch/at91sam9263.h>
1109 #include <asm/arch/at91_pmc.h>
1110 #include <asm/arch/at91_rstc.h>
1111+#include <asm/arch/at91_shdwc.h>
1112
1113 #include "generic.h"
1114 #include "clock.h"
1115@@ -271,6 +273,11 @@ static void at91sam9263_reset(void)
1116     at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
1117 }
1118
1119+static void at91sam9263_poweroff(void)
1120+{
1121+ at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
1122+}
1123+
1124
1125 /* --------------------------------------------------------------------
1126  * AT91SAM9263 processor initialization
1127@@ -282,6 +289,7 @@ void __init at91sam9263_initialize(unsig
1128     iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
1129
1130     at91_arch_reset = at91sam9263_reset;
1131+ pm_power_off = at91sam9263_poweroff;
1132     at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
1133
1134     /* Init clock subsystem */
1135+++ b/arch/arm/mach-at91/at91sam9263_devices.c
1136@@ -22,8 +22,8 @@
1137 #include <asm/arch/board.h>
1138 #include <asm/arch/gpio.h>
1139 #include <asm/arch/at91sam9263.h>
1140-#include <asm/arch/at91sam926x_mc.h>
1141 #include <asm/arch/at91sam9263_matrix.h>
1142+#include <asm/arch/at91sam9_smc.h>
1143
1144 #include "generic.h"
1145
1146@@ -308,7 +308,7 @@ void __init at91_add_device_mmc(short mm
1147         }
1148
1149         mmc0_data = *data;
1150- at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
1151+ at91_clock_associate("mci0_clk", &at91sam9263_mmc0_device.dev, "mci_clk");
1152         platform_device_register(&at91sam9263_mmc0_device);
1153     } else { /* MCI1 */
1154         /* CLK */
1155@@ -358,10 +358,15 @@ static struct at91_nand_data nand_data;
1156 #define NAND_BASE AT91_CHIPSELECT_3
1157
1158 static struct resource nand_resources[] = {
1159- {
1160+ [0] = {
1161         .start = NAND_BASE,
1162         .end = NAND_BASE + SZ_256M - 1,
1163         .flags = IORESOURCE_MEM,
1164+ },
1165+ [1] = {
1166+ .start = AT91_BASE_SYS + AT91_ECC0,
1167+ .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
1168+ .flags = IORESOURCE_MEM,
1169     }
1170 };
1171
1172@@ -783,6 +788,43 @@ void __init at91_add_device_isi(void) {}
1173
1174
1175 /* --------------------------------------------------------------------
1176+ * Timer/Counter block
1177+ * -------------------------------------------------------------------- */
1178+
1179+#ifdef CONFIG_ATMEL_TCLIB
1180+
1181+static struct resource tcb_resources[] = {
1182+ [0] = {
1183+ .start = AT91SAM9263_BASE_TCB0,
1184+ .end = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
1185+ .flags = IORESOURCE_MEM,
1186+ },
1187+ [1] = {
1188+ .start = AT91SAM9263_ID_TCB,
1189+ .end = AT91SAM9263_ID_TCB,
1190+ .flags = IORESOURCE_IRQ,
1191+ },
1192+};
1193+
1194+static struct platform_device at91sam9263_tcb_device = {
1195+ .name = "atmel_tcb",
1196+ .id = 0,
1197+ .resource = tcb_resources,
1198+ .num_resources = ARRAY_SIZE(tcb_resources),
1199+};
1200+
1201+static void __init at91_add_device_tc(void)
1202+{
1203+ /* this chip has one clock and irq for all three TC channels */
1204+ at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
1205+ platform_device_register(&at91sam9263_tcb_device);
1206+}
1207+#else
1208+static void __init at91_add_device_tc(void) { }
1209+#endif
1210+
1211+
1212+/* --------------------------------------------------------------------
1213  * RTT
1214  * -------------------------------------------------------------------- */
1215
1216@@ -818,7 +860,9 @@ static struct platform_device at91sam926
1217
1218 static void __init at91_add_device_rtt(void)
1219 {
1220+ device_init_wakeup(&at91sam9263_rtt0_device.dev, 1);
1221     platform_device_register(&at91sam9263_rtt0_device);
1222+ device_init_wakeup(&at91sam9263_rtt1_device.dev, 1);
1223     platform_device_register(&at91sam9263_rtt1_device);
1224 }
1225
1226@@ -933,9 +977,6 @@ static inline void configure_ssc1_pins(u
1227 }
1228
1229 /*
1230- * Return the device node so that board init code can use it as the
1231- * parent for the device node reflecting how it's used on this board.
1232- *
1233  * SSC controllers are accessed through library code, instead of any
1234  * kind of all-singing/all-dancing driver. For example one could be
1235  * used by a particular I2S audio codec's driver, while another one
1236@@ -1146,7 +1187,7 @@ static inline void configure_usart2_pins
1237         at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
1238 }
1239
1240-static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1241+static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1242 struct platform_device *atmel_default_console_device; /* the serial console device */
1243
1244 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1245@@ -1227,8 +1268,6 @@ void __init at91_set_serial_console(unsi
1246 {
1247     if (portnr < ATMEL_MAX_UART)
1248         atmel_default_console_device = at91_uarts[portnr];
1249- if (!atmel_default_console_device)
1250- printk(KERN_INFO "AT91: No default serial console defined.\n");
1251 }
1252
1253 void __init at91_add_device_serial(void)
1254@@ -1239,9 +1278,12 @@ void __init at91_add_device_serial(void)
1255         if (at91_uarts[i])
1256             platform_device_register(at91_uarts[i]);
1257     }
1258+
1259+ if (!atmel_default_console_device)
1260+ printk(KERN_INFO "AT91: No default serial console defined.\n");
1261 }
1262 #else
1263-void __init at91_init_serial(struct at91_uart_config *config) {}
1264+void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1265 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1266 void __init at91_set_serial_console(unsigned portnr) {}
1267 void __init at91_add_device_serial(void) {}
1268@@ -1257,6 +1299,7 @@ static int __init at91_add_standard_devi
1269 {
1270     at91_add_device_rtt();
1271     at91_add_device_watchdog();
1272+ at91_add_device_tc();
1273     return 0;
1274 }
1275
1276+++ b/arch/arm/mach-at91/at91sam926x_time.c
1277@@ -1,23 +1,20 @@
1278 /*
1279- * linux/arch/arm/mach-at91/at91sam926x_time.c
1280+ * at91sam926x_time.c - Periodic Interval Timer (PIT) for at91sam926x
1281  *
1282  * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
1283  * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
1284+ * Converted to ClockSource/ClockEvents by David Brownell.
1285  *
1286  * This program is free software; you can redistribute it and/or modify
1287  * it under the terms of the GNU General Public License version 2 as
1288  * published by the Free Software Foundation.
1289  */
1290-
1291-#include <linux/init.h>
1292 #include <linux/interrupt.h>
1293 #include <linux/irq.h>
1294 #include <linux/kernel.h>
1295-#include <linux/sched.h>
1296-#include <linux/time.h>
1297+#include <linux/clk.h>
1298+#include <linux/clockchips.h>
1299
1300-#include <asm/hardware.h>
1301-#include <asm/io.h>
1302 #include <asm/mach/time.h>
1303
1304 #include <asm/arch/at91_pit.h>
1305@@ -26,85 +23,167 @@
1306 #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
1307 #define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
1308
1309+static u32 pit_cycle; /* write-once */
1310+static u32 pit_cnt; /* access only w/system irq blocked */
1311+
1312+
1313 /*
1314- * Returns number of microseconds since last timer interrupt. Note that interrupts
1315- * will have been disabled by do_gettimeofday()
1316- * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
1317+ * Clocksource: just a monotonic counter of MCK/16 cycles.
1318+ * We don't care whether or not PIT irqs are enabled.
1319  */
1320-static unsigned long at91sam926x_gettimeoffset(void)
1321+static cycle_t read_pit_clk(void)
1322 {
1323- unsigned long elapsed;
1324- unsigned long t = at91_sys_read(AT91_PIT_PIIR);
1325+ unsigned long flags;
1326+ u32 elapsed;
1327+ u32 t;
1328+
1329+ raw_local_irq_save(flags);
1330+ elapsed = pit_cnt;
1331+ t = at91_sys_read(AT91_PIT_PIIR);
1332+ raw_local_irq_restore(flags);
1333+
1334+ elapsed += PIT_PICNT(t) * pit_cycle;
1335+ elapsed += PIT_CPIV(t);
1336+ return elapsed;
1337+}
1338+
1339+static struct clocksource pit_clk = {
1340+ .name = "pit",
1341+ .rating = 175,
1342+ .read = read_pit_clk,
1343+ .shift = 20,
1344+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
1345+};
1346+
1347
1348- elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */
1349+/*
1350+ * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16)
1351+ */
1352+static void
1353+pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
1354+{
1355+ unsigned long flags;
1356
1357- return (unsigned long)(elapsed * jiffies_to_usecs(1)) / LATCH;
1358+ switch (mode) {
1359+ case CLOCK_EVT_MODE_PERIODIC:
1360+ /* update clocksource counter, then enable the IRQ */
1361+ raw_local_irq_save(flags);
1362+ pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
1363+ at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
1364+ | AT91_PIT_PITIEN);
1365+ raw_local_irq_restore(flags);
1366+ break;
1367+ case CLOCK_EVT_MODE_ONESHOT:
1368+ BUG();
1369+ /* FALLTHROUGH */
1370+ case CLOCK_EVT_MODE_SHUTDOWN:
1371+ case CLOCK_EVT_MODE_UNUSED:
1372+ /* disable irq, leaving the clocksource active */
1373+ at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
1374+ break;
1375+ case CLOCK_EVT_MODE_RESUME:
1376+ break;
1377+ }
1378 }
1379
1380+static struct clock_event_device pit_clkevt = {
1381+ .name = "pit",
1382+ .features = CLOCK_EVT_FEAT_PERIODIC,
1383+ .shift = 32,
1384+ .rating = 100,
1385+ .cpumask = CPU_MASK_CPU0,
1386+ .set_mode = pit_clkevt_mode,
1387+};
1388+
1389+
1390 /*
1391  * IRQ handler for the timer.
1392  */
1393-static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
1394+static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
1395 {
1396- volatile long nr_ticks;
1397
1398- if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { /* This is a shared interrupt */
1399- /* Get number to ticks performed before interrupt and clear PIT interrupt */
1400+ /* The PIT interrupt may be disabled, and is shared */
1401+ if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
1402+ && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
1403+ unsigned nr_ticks;
1404+
1405+ /* Get number of ticks performed before irq, and ack it */
1406         nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
1407         do {
1408- timer_tick();
1409+ pit_cnt += pit_cycle;
1410+ pit_clkevt.event_handler(&pit_clkevt);
1411             nr_ticks--;
1412         } while (nr_ticks);
1413
1414         return IRQ_HANDLED;
1415- } else
1416- return IRQ_NONE; /* not handled */
1417+ }
1418+
1419+ return IRQ_NONE;
1420 }
1421
1422-static struct irqaction at91sam926x_timer_irq = {
1423+static struct irqaction at91sam926x_pit_irq = {
1424     .name = "at91_tick",
1425     .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
1426- .handler = at91sam926x_timer_interrupt
1427+ .handler = at91sam926x_pit_interrupt
1428 };
1429
1430-void at91sam926x_timer_reset(void)
1431+static void at91sam926x_pit_reset(void)
1432 {
1433- /* Disable timer */
1434+ /* Disable timer and irqs */
1435     at91_sys_write(AT91_PIT_MR, 0);
1436
1437- /* Clear any pending interrupts */
1438- (void) at91_sys_read(AT91_PIT_PIVR);
1439+ /* Clear any pending interrupts, wait for PIT to stop counting */
1440+ while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
1441+ cpu_relax();
1442
1443- /* Set Period Interval timer and enable its interrupt */
1444- at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);
1445+ /* Start PIT but don't enable IRQ */
1446+ at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
1447 }
1448
1449 /*
1450- * Set up timer interrupt.
1451+ * Set up both clocksource and clockevent support.
1452  */
1453-void __init at91sam926x_timer_init(void)
1454+static void __init at91sam926x_pit_init(void)
1455 {
1456+ unsigned long pit_rate;
1457+ unsigned bits;
1458+
1459+ /*
1460+ * Use our actual MCK to figure out how many MCK/16 ticks per
1461+ * 1/HZ period (instead of a compile-time constant LATCH).
1462+ */
1463+ pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16;
1464+ pit_cycle = (pit_rate + HZ/2) / HZ;
1465+ WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
1466+
1467     /* Initialize and enable the timer */
1468- at91sam926x_timer_reset();
1469+ at91sam926x_pit_reset();
1470
1471- /* Make IRQs happen for the system timer. */
1472- setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);
1473+ /*
1474+ * Register clocksource. The high order bits of PIV are unused,
1475+ * so this isn't a 32-bit counter unless we get clockevent irqs.
1476+ */
1477+ pit_clk.mult = clocksource_hz2mult(pit_rate, pit_clk.shift);
1478+ bits = 12 /* PICNT */ + ilog2(pit_cycle) /* PIV */;
1479+ pit_clk.mask = CLOCKSOURCE_MASK(bits);
1480+ clocksource_register(&pit_clk);
1481+
1482+ /* Set up irq handler */
1483+ setup_irq(AT91_ID_SYS, &at91sam926x_pit_irq);
1484+
1485+ /* Set up and register clockevents */
1486+ pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
1487+ clockevents_register_device(&pit_clkevt);
1488 }
1489
1490-#ifdef CONFIG_PM
1491-static void at91sam926x_timer_suspend(void)
1492+static void at91sam926x_pit_suspend(void)
1493 {
1494     /* Disable timer */
1495     at91_sys_write(AT91_PIT_MR, 0);
1496 }
1497-#else
1498-#define at91sam926x_timer_suspend NULL
1499-#endif
1500
1501 struct sys_timer at91sam926x_timer = {
1502- .init = at91sam926x_timer_init,
1503- .offset = at91sam926x_gettimeoffset,
1504- .suspend = at91sam926x_timer_suspend,
1505- .resume = at91sam926x_timer_reset,
1506+ .init = at91sam926x_pit_init,
1507+ .suspend = at91sam926x_pit_suspend,
1508+ .resume = at91sam926x_pit_reset,
1509 };
1510-
1511+++ b/arch/arm/mach-at91/at91sam9rl.c
1512@@ -10,6 +10,7 @@
1513  */
1514
1515 #include <linux/module.h>
1516+#include <linux/pm.h>
1517
1518 #include <asm/mach/arch.h>
1519 #include <asm/mach/map.h>
1520@@ -17,6 +18,7 @@
1521 #include <asm/arch/at91sam9rl.h>
1522 #include <asm/arch/at91_pmc.h>
1523 #include <asm/arch/at91_rstc.h>
1524+#include <asm/arch/at91_shdwc.h>
1525
1526 #include "generic.h"
1527 #include "clock.h"
1528@@ -244,6 +246,11 @@ static void at91sam9rl_reset(void)
1529     at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
1530 }
1531
1532+static void at91sam9rl_poweroff(void)
1533+{
1534+ at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
1535+}
1536+
1537
1538 /* --------------------------------------------------------------------
1539  * AT91SAM9RL processor initialization
1540@@ -274,6 +281,7 @@ void __init at91sam9rl_initialize(unsign
1541     iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
1542
1543     at91_arch_reset = at91sam9rl_reset;
1544+ pm_power_off = at91sam9rl_poweroff;
1545     at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
1546
1547     /* Init clock subsystem */
1548+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
1549@@ -20,12 +20,107 @@
1550 #include <asm/arch/gpio.h>
1551 #include <asm/arch/at91sam9rl.h>
1552 #include <asm/arch/at91sam9rl_matrix.h>
1553-#include <asm/arch/at91sam926x_mc.h>
1554+#include <asm/arch/at91sam9_smc.h>
1555
1556 #include "generic.h"
1557
1558
1559 /* --------------------------------------------------------------------
1560+ * USB HS Device (Gadget)
1561+ * -------------------------------------------------------------------- */
1562+
1563+#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
1564+
1565+static struct resource usba_udc_resources[] = {
1566+ [0] = {
1567+ .start = AT91SAM9RL_UDPHS_FIFO,
1568+ .end = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
1569+ .flags = IORESOURCE_MEM,
1570+ },
1571+ [1] = {
1572+ .start = AT91SAM9RL_BASE_UDPHS,
1573+ .end = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
1574+ .flags = IORESOURCE_MEM,
1575+ },
1576+ [2] = {
1577+ .start = AT91SAM9RL_ID_UDPHS,
1578+ .end = AT91SAM9RL_ID_UDPHS,
1579+ .flags = IORESOURCE_IRQ,
1580+ },
1581+};
1582+
1583+#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
1584+ [idx] = { \
1585+ .name = nam, \
1586+ .index = idx, \
1587+ .fifo_size = maxpkt, \
1588+ .nr_banks = maxbk, \
1589+ .can_dma = dma, \
1590+ .can_isoc = isoc, \
1591+ }
1592+
1593+static struct usba_ep_data usba_udc_ep[] __initdata = {
1594+ EP("ep0", 0, 64, 1, 0, 0),
1595+ EP("ep1", 1, 1024, 2, 1, 1),
1596+ EP("ep2", 2, 1024, 2, 1, 1),
1597+ EP("ep3", 3, 1024, 3, 1, 0),
1598+ EP("ep4", 4, 1024, 3, 1, 0),
1599+ EP("ep5", 5, 1024, 3, 1, 1),
1600+ EP("ep6", 6, 1024, 3, 1, 1),
1601+};
1602+
1603+#undef EP
1604+
1605+/*
1606+ * pdata doesn't have room for any endpoints, so we need to
1607+ * append room for the ones we need right after it.
1608+ */
1609+static struct {
1610+ struct usba_platform_data pdata;
1611+ struct usba_ep_data ep[7];
1612+} usba_udc_data;
1613+
1614+static struct platform_device at91_usba_udc_device = {
1615+ .name = "atmel_usba_udc",
1616+ .id = -1,
1617+ .dev = {
1618+ .platform_data = &usba_udc_data.pdata,
1619+ },
1620+ .resource = usba_udc_resources,
1621+ .num_resources = ARRAY_SIZE(usba_udc_resources),
1622+};
1623+
1624+void __init at91_add_device_usba(struct usba_platform_data *data)
1625+{
1626+ /*
1627+ * Invalid pins are 0 on AT91, but the usba driver is shared
1628+ * with AVR32, which use negative values instead. Once/if
1629+ * gpio_is_valid() is ported to AT91, revisit this code.
1630+ */
1631+ usba_udc_data.pdata.vbus_pin = -EINVAL;
1632+ usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
1633+ memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));;
1634+
1635+ if (data && data->vbus_pin > 0) {
1636+ at91_set_gpio_input(data->vbus_pin, 0);
1637+ at91_set_deglitch(data->vbus_pin, 1);
1638+ usba_udc_data.pdata.vbus_pin = data->vbus_pin;
1639+ }
1640+
1641+ /* Pullup pin is handled internally by USB device peripheral */
1642+
1643+ /* Clocks */
1644+ at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
1645+ at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
1646+
1647+ platform_device_register(&at91_usba_udc_device);
1648+}
1649+#else
1650+void __init at91_add_device_usba(struct usba_platform_data *data) {}
1651+#endif
1652+
1653+
1654+/* --------------------------------------------------------------------
1655  * MMC / SD
1656  * -------------------------------------------------------------------- */
1657
1658@@ -105,10 +200,15 @@ static struct at91_nand_data nand_data;
1659 #define NAND_BASE AT91_CHIPSELECT_3
1660
1661 static struct resource nand_resources[] = {
1662- {
1663+ [0] = {
1664         .start = NAND_BASE,
1665         .end = NAND_BASE + SZ_256M - 1,
1666         .flags = IORESOURCE_MEM,
1667+ },
1668+ [1] = {
1669+ .start = AT91_BASE_SYS + AT91_ECC,
1670+ .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
1671+ .flags = IORESOURCE_MEM,
1672     }
1673 };
1674
1675@@ -385,6 +485,100 @@ void __init at91_add_device_lcdc(struct
1676
1677
1678 /* --------------------------------------------------------------------
1679+ * Timer/Counter block
1680+ * -------------------------------------------------------------------- */
1681+
1682+#ifdef CONFIG_ATMEL_TCLIB
1683+
1684+static struct resource tcb_resources[] = {
1685+ [0] = {
1686+ .start = AT91SAM9RL_BASE_TCB0,
1687+ .end = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
1688+ .flags = IORESOURCE_MEM,
1689+ },
1690+ [1] = {
1691+ .start = AT91SAM9RL_ID_TC0,
1692+ .end = AT91SAM9RL_ID_TC0,
1693+ .flags = IORESOURCE_IRQ,
1694+ },
1695+ [2] = {
1696+ .start = AT91SAM9RL_ID_TC1,
1697+ .end = AT91SAM9RL_ID_TC1,
1698+ .flags = IORESOURCE_IRQ,
1699+ },
1700+ [3] = {
1701+ .start = AT91SAM9RL_ID_TC2,
1702+ .end = AT91SAM9RL_ID_TC2,
1703+ .flags = IORESOURCE_IRQ,
1704+ },
1705+};
1706+
1707+static struct platform_device at91sam9rl_tcb_device = {
1708+ .name = "atmel_tcb",
1709+ .id = 0,
1710+ .resource = tcb_resources,
1711+ .num_resources = ARRAY_SIZE(tcb_resources),
1712+};
1713+
1714+static void __init at91_add_device_tc(void)
1715+{
1716+ /* this chip has a separate clock and irq for each TC channel */
1717+ at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk");
1718+ at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk");
1719+ at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk");
1720+ platform_device_register(&at91sam9rl_tcb_device);
1721+}
1722+#else
1723+static void __init at91_add_device_tc(void) { }
1724+#endif
1725+
1726+
1727+/* --------------------------------------------------------------------
1728+ * Touchscreen
1729+ * -------------------------------------------------------------------- */
1730+
1731+#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
1732+static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
1733+
1734+static struct resource tsadcc_resources[] = {
1735+ [0] = {
1736+ .start = AT91SAM9RL_BASE_TSC,
1737+ .end = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
1738+ .flags = IORESOURCE_MEM,
1739+ },
1740+ [1] = {
1741+ .start = AT91SAM9RL_ID_TSC,
1742+ .end = AT91SAM9RL_ID_TSC,
1743+ .flags = IORESOURCE_IRQ,
1744+ }
1745+};
1746+
1747+static struct platform_device at91_tsadcc_device = {
1748+ .name = "atmel_tsadcc",
1749+ .id = -1,
1750+ .dev = {
1751+ .dma_mask = &tsadcc_dmamask,
1752+ .coherent_dma_mask = DMA_BIT_MASK(32),
1753+ },
1754+ .resource = tsadcc_resources,
1755+ .num_resources = ARRAY_SIZE(tsadcc_resources),
1756+};
1757+
1758+void __init at91_add_device_tsadcc(void)
1759+{
1760+ at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */
1761+ at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */
1762+ at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */
1763+ at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */
1764+
1765+ platform_device_register(&at91_tsadcc_device);
1766+}
1767+#else
1768+void __init at91_add_device_tsadcc(void) {}
1769+#endif
1770+
1771+
1772+/* --------------------------------------------------------------------
1773  * RTC
1774  * -------------------------------------------------------------------- */
1775
1776@@ -397,6 +591,7 @@ static struct platform_device at91sam9rl
1777
1778 static void __init at91_add_device_rtc(void)
1779 {
1780+ device_init_wakeup(&at91sam9rl_rtc_device.dev, 1);
1781     platform_device_register(&at91sam9rl_rtc_device);
1782 }
1783 #else
1784@@ -418,13 +613,14 @@ static struct resource rtt_resources[] =
1785
1786 static struct platform_device at91sam9rl_rtt_device = {
1787     .name = "at91_rtt",
1788- .id = -1,
1789+ .id = 0,
1790     .resource = rtt_resources,
1791     .num_resources = ARRAY_SIZE(rtt_resources),
1792 };
1793
1794 static void __init at91_add_device_rtt(void)
1795 {
1796+ device_init_wakeup(&at91sam9rl_rtt_device.dev, 1);
1797     platform_device_register(&at91sam9rl_rtt_device);
1798 }
1799
1800@@ -539,9 +735,6 @@ static inline void configure_ssc1_pins(u
1801 }
1802
1803 /*
1804- * Return the device node so that board init code can use it as the
1805- * parent for the device node reflecting how it's used on this board.
1806- *
1807  * SSC controllers are accessed through library code, instead of any
1808  * kind of all-singing/all-dancing driver. For example one could be
1809  * used by a particular I2S audio codec's driver, while another one
1810@@ -802,7 +995,7 @@ static inline void configure_usart3_pins
1811         at91_set_B_periph(AT91_PIN_PD3, 0); /* CTS3 */
1812 }
1813
1814-static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1815+static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1816 struct platform_device *atmel_default_console_device; /* the serial console device */
1817
1818 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1819@@ -893,8 +1086,6 @@ void __init at91_set_serial_console(unsi
1820 {
1821     if (portnr < ATMEL_MAX_UART)
1822         atmel_default_console_device = at91_uarts[portnr];
1823- if (!atmel_default_console_device)
1824- printk(KERN_INFO "AT91: No default serial console defined.\n");
1825 }
1826
1827 void __init at91_add_device_serial(void)
1828@@ -905,6 +1096,9 @@ void __init at91_add_device_serial(void)
1829         if (at91_uarts[i])
1830             platform_device_register(at91_uarts[i]);
1831     }
1832+
1833+ if (!atmel_default_console_device)
1834+ printk(KERN_INFO "AT91: No default serial console defined.\n");
1835 }
1836 #else
1837 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1838@@ -925,6 +1119,7 @@ static int __init at91_add_standard_devi
1839     at91_add_device_rtc();
1840     at91_add_device_rtt();
1841     at91_add_device_watchdog();
1842+ at91_add_device_tc();
1843     return 0;
1844 }
1845
1846+++ b/arch/arm/mach-at91/board-cam60.c
1847@@ -0,0 +1,180 @@
1848+/*
1849+ * KwikByte CAM60 (KB9260)
1850+ *
1851+ * based on board-sam9260ek.c
1852+ * Copyright (C) 2005 SAN People
1853+ * Copyright (C) 2006 Atmel
1854+ *
1855+ * This program is free software; you can redistribute it and/or modify
1856+ * it under the terms of the GNU General Public License as published by
1857+ * the Free Software Foundation; either version 2 of the License, or
1858+ * (at your option) any later version.
1859+ *
1860+ * This program is distributed in the hope that it will be useful,
1861+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1862+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1863+ * GNU General Public License for more details.
1864+ *
1865+ * You should have received a copy of the GNU General Public License
1866+ * along with this program; if not, write to the Free Software
1867+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1868+ */
1869+
1870+#include <linux/types.h>
1871+#include <linux/init.h>
1872+#include <linux/mm.h>
1873+#include <linux/module.h>
1874+#include <linux/platform_device.h>
1875+#include <linux/spi/spi.h>
1876+#include <linux/spi/flash.h>
1877+
1878+#include <asm/hardware.h>
1879+#include <asm/setup.h>
1880+#include <asm/mach-types.h>
1881+#include <asm/irq.h>
1882+
1883+#include <asm/mach/arch.h>
1884+#include <asm/mach/map.h>
1885+#include <asm/mach/irq.h>
1886+
1887+#include <asm/arch/board.h>
1888+#include <asm/arch/gpio.h>
1889+
1890+#include "generic.h"
1891+
1892+
1893+static void __init cam60_map_io(void)
1894+{
1895+ /* Initialize processor: 10 MHz crystal */
1896+ at91sam9260_initialize(10000000);
1897+
1898+ /* DGBU on ttyS0. (Rx & Tx only) */
1899+ at91_register_uart(0, 0, 0);
1900+
1901+ /* set serial console to ttyS0 (ie, DBGU) */
1902+ at91_set_serial_console(0);
1903+}
1904+
1905+static void __init cam60_init_irq(void)
1906+{
1907+ at91sam9260_init_interrupts(NULL);
1908+}
1909+
1910+
1911+/*
1912+ * USB Host
1913+ */
1914+static struct at91_usbh_data __initdata cam60_usbh_data = {
1915+ .ports = 1,
1916+};
1917+
1918+
1919+/*
1920+ * SPI devices.
1921+ */
1922+#if defined(CONFIG_MTD_DATAFLASH)
1923+static struct mtd_partition __initdata cam60_spi_partitions[] = {
1924+ {
1925+ .name = "BOOT1",
1926+ .offset = 0,
1927+ .size = 4 * 1056,
1928+ },
1929+ {
1930+ .name = "BOOT2",
1931+ .offset = MTDPART_OFS_NXTBLK,
1932+ .size = 256 * 1056,
1933+ },
1934+ {
1935+ .name = "kernel",
1936+ .offset = MTDPART_OFS_NXTBLK,
1937+ .size = 2222 * 1056,
1938+ },
1939+ {
1940+ .name = "file system",
1941+ .offset = MTDPART_OFS_NXTBLK,
1942+ .size = MTDPART_SIZ_FULL,
1943+ },
1944+};
1945+
1946+static struct flash_platform_data __initdata cam60_spi_flash_platform_data = {
1947+ .name = "spi_flash",
1948+ .parts = cam60_spi_partitions,
1949+ .nr_parts = ARRAY_SIZE(cam60_spi_partitions)
1950+};
1951+#endif
1952+
1953+static struct spi_board_info cam60_spi_devices[] = {
1954+#if defined(CONFIG_MTD_DATAFLASH)
1955+ { /* DataFlash chip */
1956+ .modalias = "mtd_dataflash",
1957+ .chip_select = 0,
1958+ .max_speed_hz = 15 * 1000 * 1000,
1959+ .bus_num = 0,
1960+ .platform_data = &cam60_spi_flash_platform_data
1961+ },
1962+#endif
1963+};
1964+
1965+
1966+/*
1967+ * MACB Ethernet device
1968+ */
1969+static struct __initdata at91_eth_data cam60_macb_data = {
1970+ .phy_irq_pin = AT91_PIN_PB5,
1971+ .is_rmii = 0,
1972+};
1973+
1974+
1975+/*
1976+ * NAND Flash
1977+ */
1978+static struct mtd_partition __initdata cam60_nand_partition[] = {
1979+ {
1980+ .name = "nand_fs",
1981+ .offset = 0,
1982+ .size = MTDPART_SIZ_FULL,
1983+ },
1984+};
1985+
1986+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
1987+{
1988+ *num_partitions = ARRAY_SIZE(cam60_nand_partition);
1989+ return cam60_nand_partition;
1990+}
1991+
1992+static struct at91_nand_data __initdata cam60_nand_data = {
1993+ .ale = 21,
1994+ .cle = 22,
1995+ // .det_pin = ... not there
1996+ .rdy_pin = AT91_PIN_PA9,
1997+ .enable_pin = AT91_PIN_PA7,
1998+ .partition_info = nand_partitions,
1999+};
2000+
2001+
2002+static void __init cam60_board_init(void)
2003+{
2004+ /* Serial */
2005+ at91_add_device_serial();
2006+ /* SPI */
2007+ at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
2008+ /* Ethernet */
2009+ at91_add_device_eth(&cam60_macb_data);
2010+ /* USB Host */
2011+ /* enable USB power supply circuit */
2012+ at91_set_gpio_output(AT91_PIN_PB18, 1);
2013+ at91_add_device_usbh(&cam60_usbh_data);
2014+ /* NAND */
2015+ at91_add_device_nand(&cam60_nand_data);
2016+}
2017+
2018+MACHINE_START(CAM60, "KwikByte CAM60")
2019+ /* Maintainer: KwikByte */
2020+ .phys_io = AT91_BASE_SYS,
2021+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
2022+ .boot_params = AT91_SDRAM_BASE + 0x100,
2023+ .timer = &at91sam926x_timer,
2024+ .map_io = cam60_map_io,
2025+ .init_irq = cam60_init_irq,
2026+ .init_machine = cam60_board_init,
2027+MACHINE_END
2028+++ b/arch/arm/mach-at91/board-cap9adk.c
2029@@ -36,16 +36,14 @@
2030 #include <asm/hardware.h>
2031 #include <asm/setup.h>
2032 #include <asm/mach-types.h>
2033-#include <asm/irq.h>
2034
2035 #include <asm/mach/arch.h>
2036 #include <asm/mach/map.h>
2037-#include <asm/mach/irq.h>
2038
2039 #include <asm/arch/board.h>
2040 #include <asm/arch/gpio.h>
2041 #include <asm/arch/at91cap9_matrix.h>
2042-#include <asm/arch/at91sam926x_mc.h>
2043+#include <asm/arch/at91sam9_smc.h>
2044
2045 #include "generic.h"
2046
2047@@ -78,6 +76,12 @@ static struct at91_usbh_data __initdata
2048     .ports = 2,
2049 };
2050
2051+/*
2052+ * USB HS Device port
2053+ */
2054+static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
2055+ .vbus_pin = AT91_PIN_PB31,
2056+};
2057
2058 /*
2059  * ADS7846 Touchscreen
2060@@ -130,7 +134,7 @@ static struct spi_board_info cap9adk_spi
2061     {
2062         .modalias = "ads7846",
2063         .chip_select = 3, /* can be 2 or 3, depending on J2 jumper */
2064- .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
2065+ .max_speed_hz = 125000 * 16, /* max sample rate * clocks per sample */
2066         .bus_num = 0,
2067         .platform_data = &ads_info,
2068         .irq = AT91_PIN_PC4,
2069@@ -324,8 +328,9 @@ static void __init cap9adk_board_init(vo
2070     /* Serial */
2071     at91_add_device_serial();
2072     /* USB Host */
2073- set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
2074     at91_add_device_usbh(&cap9adk_usbh_data);
2075+ /* USB HS */
2076+ at91_add_device_usba(&cap9adk_usba_udc_data);
2077     /* SPI */
2078     at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
2079     /* Touchscreen */
2080@@ -341,7 +346,6 @@ static void __init cap9adk_board_init(vo
2081     /* I2C */
2082     at91_add_device_i2c(NULL, 0);
2083     /* LCD Controller */
2084- set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH);
2085     at91_add_device_lcdc(&cap9adk_lcdc_data);
2086     /* AC97 */
2087     at91_add_device_ac97(&cap9adk_ac97_data);
2088+++ b/arch/arm/mach-at91/board-carmeva.c
2089@@ -40,24 +40,21 @@
2090 #include "generic.h"
2091
2092
2093-/*
2094- * Serial port configuration.
2095- * 0 .. 3 = USART0 .. USART3
2096- * 4 = DBGU
2097- */
2098-static struct at91_uart_config __initdata carmeva_uart_config = {
2099- .console_tty = 0, /* ttyS0 */
2100- .nr_tty = 2,
2101- .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2102-};
2103-
2104 static void __init carmeva_map_io(void)
2105 {
2106     /* Initialize processor: 20.000 MHz crystal */
2107     at91rm9200_initialize(20000000, AT91RM9200_BGA);
2108
2109- /* Setup the serial ports and console */
2110- at91_init_serial(&carmeva_uart_config);
2111+ /* DBGU on ttyS0. (Rx & Tx only) */
2112+ at91_register_uart(0, 0, 0);
2113+
2114+ /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
2115+ at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
2116+ | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
2117+ | ATMEL_UART_RI);
2118+
2119+ /* set serial console to ttyS0 (ie, DBGU) */
2120+ at91_set_serial_console(0);
2121 }
2122
2123 static void __init carmeva_init_irq(void)
2124@@ -117,6 +114,30 @@ static struct spi_board_info carmeva_spi
2125     },
2126 };
2127
2128+static struct gpio_led carmeva_leds[] = {
2129+ { /* "user led 1", LED9 */
2130+ .name = "led9",
2131+ .gpio = AT91_PIN_PA21,
2132+ .active_low = 1,
2133+ .default_trigger = "heartbeat",
2134+ },
2135+ { /* "user led 2", LED10 */
2136+ .name = "led10",
2137+ .gpio = AT91_PIN_PA25,
2138+ .active_low = 1,
2139+ },
2140+ { /* "user led 3", LED11 */
2141+ .name = "led11",
2142+ .gpio = AT91_PIN_PA26,
2143+ .active_low = 1,
2144+ },
2145+ { /* "user led 4", LED12 */
2146+ .name = "led12",
2147+ .gpio = AT91_PIN_PA18,
2148+ .active_low = 1,
2149+ }
2150+};
2151+
2152 static void __init carmeva_board_init(void)
2153 {
2154     /* Serial */
2155@@ -135,6 +156,8 @@ static void __init carmeva_board_init(vo
2156 // at91_add_device_cf(&carmeva_cf_data);
2157     /* MMC */
2158     at91_add_device_mmc(0, &carmeva_mmc_data);
2159+ /* LEDs */
2160+ at91_gpio_leds(carmeva_leds, ARRAY_SIZE(carmeva_leds));
2161 }
2162
2163 MACHINE_START(CARMEVA, "Carmeva")
2164+++ b/arch/arm/mach-at91/board-chub.c
2165@@ -0,0 +1,132 @@
2166+/*
2167+ * linux/arch/arm/mach-at91/board-chub.c
2168+ *
2169+ * Copyright (C) 2005 SAN People, adapted for Promwad Chub board
2170+ * by Kuten Ivan
2171+ *
2172+ * This program is free software; you can redistribute it and/or modify
2173+ * it under the terms of the GNU General Public License as published by
2174+ * the Free Software Foundation; either version 2 of the License, or
2175+ * (at your option) any later version.
2176+ *
2177+ * This program is distributed in the hope that it will be useful,
2178+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
2179+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2180+ * GNU General Public License for more details.
2181+ *
2182+ * You should have received a copy of the GNU General Public License
2183+ * along with this program; if not, write to the Free Software
2184+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2185+ */
2186+
2187+#include <linux/types.h>
2188+#include <linux/init.h>
2189+#include <linux/mm.h>
2190+#include <linux/module.h>
2191+#include <linux/platform_device.h>
2192+
2193+#include <asm/hardware.h>
2194+#include <asm/setup.h>
2195+#include <asm/mach-types.h>
2196+#include <asm/irq.h>
2197+
2198+#include <asm/mach/arch.h>
2199+#include <asm/mach/map.h>
2200+#include <asm/mach/irq.h>
2201+
2202+#include <asm/arch/board.h>
2203+#include <asm/arch/gpio.h>
2204+
2205+#include "generic.h"
2206+
2207+/*
2208+ * Serial port configuration.
2209+ * 0 .. 3 = USART0 .. USART3
2210+ * 4 = DBGU
2211+ */
2212+static struct at91_uart_config __initdata chub_uart_config = {
2213+ .console_tty = 0, /* ttyS0 */
2214+ .nr_tty = 5,
2215+ .tty_map = { 4, 0, 1, 2, 3 } /* ttyS0, ..., ttyS4 */
2216+};
2217+
2218+static void __init chub_init_irq(void)
2219+{
2220+ at91rm9200_init_interrupts(NULL);
2221+}
2222+
2223+static void __init chub_map_io(void)
2224+{
2225+ /* Initialize clocks: 18.432 MHz crystal */
2226+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
2227+
2228+ /* Setup the serial ports and console */
2229+ at91_init_serial(&chub_uart_config);
2230+}
2231+
2232+static struct at91_eth_data __initdata chub_eth_data = {
2233+ .phy_irq_pin = AT91_PIN_PB29,
2234+ .is_rmii = 0,
2235+};
2236+
2237+static struct mtd_partition __initdata chub_nand_partition[] = {
2238+ {
2239+ .name = "NAND Partition 1",
2240+ .offset = 0,
2241+ .size = MTDPART_SIZ_FULL,
2242+ },
2243+};
2244+
2245+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
2246+{
2247+ *num_partitions = ARRAY_SIZE(chub_nand_partition);
2248+ return chub_nand_partition;
2249+}
2250+
2251+static struct at91_nand_data __initdata chub_nand_data = {
2252+ .ale = 22,
2253+ .cle = 21,
2254+ .enable_pin = AT91_PIN_PA27,
2255+ .partition_info = nand_partitions,
2256+};
2257+
2258+static struct spi_board_info chub_spi_devices[] = {
2259+ { /* DataFlash chip */
2260+ .modalias = "mtd_dataflash",
2261+ .chip_select = 0,
2262+ .max_speed_hz = 15 * 1000 * 1000,
2263+ },
2264+};
2265+
2266+static void __init chub_board_init(void)
2267+{
2268+ /* Serial */
2269+ at91_add_device_serial();
2270+ /* I2C */
2271+ at91_add_device_i2c(NULL, 0);
2272+ /* Ethernet */
2273+ at91_add_device_eth(&chub_eth_data);
2274+ /* SPI */
2275+ at91_add_device_spi(chub_spi_devices, ARRAY_SIZE(chub_spi_devices));
2276+ /* NAND Flash */
2277+ at91_add_device_nand(&chub_nand_data);
2278+ /* Disable write protect for NAND */
2279+ at91_set_gpio_output(AT91_PIN_PB7, 1);
2280+ /* Power enable for 3x RS-232 and 1x RS-485 */
2281+ at91_set_gpio_output(AT91_PIN_PB9, 1);
2282+ /* Disable write protect for FRAM */
2283+ at91_set_gpio_output(AT91_PIN_PA21, 1);
2284+ /* Disable write protect for Dataflash */
2285+ at91_set_gpio_output(AT91_PIN_PA19, 1);
2286+}
2287+
2288+MACHINE_START(CHUB, "Promwad Chub")
2289+ /* Maintainer: Ivan Kuten AT Promwad DOT com */
2290+ .phys_io = AT91_BASE_SYS,
2291+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
2292+ .boot_params = AT91_SDRAM_BASE + 0x100,
2293+ .timer = &at91rm9200_timer,
2294+ .map_io = chub_map_io,
2295+ .init_irq = chub_init_irq,
2296+ .init_machine = chub_board_init,
2297+MACHINE_END
2298+++ b/arch/arm/mach-at91/board-csb337.c
2299@@ -61,6 +61,7 @@ static void __init csb337_map_io(void)
2300
2301     /* Setup the LEDs */
2302     at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
2303+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* third (unused) LED */
2304
2305     /* Setup the serial ports and console */
2306     at91_init_serial(&csb337_uart_config);
2307@@ -202,11 +203,11 @@ static struct platform_device csb300_but
2308
2309 static void __init csb300_add_device_buttons(void)
2310 {
2311- at91_set_gpio_input(AT91_PIN_PB29, 0); /* sw0 */
2312+ at91_set_gpio_input(AT91_PIN_PB29, 1); /* sw0 */
2313     at91_set_deglitch(AT91_PIN_PB29, 1);
2314- at91_set_gpio_input(AT91_PIN_PB28, 0); /* sw1 */
2315+ at91_set_gpio_input(AT91_PIN_PB28, 1); /* sw1 */
2316     at91_set_deglitch(AT91_PIN_PB28, 1);
2317- at91_set_gpio_input(AT91_PIN_PA21, 0); /* sw2 */
2318+ at91_set_gpio_input(AT91_PIN_PA21, 1); /* sw2 */
2319     at91_set_deglitch(AT91_PIN_PA21, 1);
2320
2321     platform_device_register(&csb300_button_device);
2322@@ -233,7 +234,7 @@ static struct gpio_led csb_leds[] = {
2323         .gpio = AT91_PIN_PB0,
2324         .active_low = 1,
2325         .default_trigger = "ide-disk",
2326- },
2327+ }
2328 };
2329
2330
2331+++ b/arch/arm/mach-at91/board-csb637.c
2332@@ -40,27 +40,16 @@
2333 #include "generic.h"
2334
2335
2336-/*
2337- * Serial port configuration.
2338- * 0 .. 3 = USART0 .. USART3
2339- * 4 = DBGU
2340- */
2341-static struct at91_uart_config __initdata csb637_uart_config = {
2342- .console_tty = 0, /* ttyS0 */
2343- .nr_tty = 2,
2344- .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2345-};
2346-
2347 static void __init csb637_map_io(void)
2348 {
2349     /* Initialize processor: 3.6864 MHz crystal */
2350     at91rm9200_initialize(3686400, AT91RM9200_BGA);
2351
2352- /* Setup the LEDs */
2353- at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
2354+ /* DBGU on ttyS0. (Rx & Tx only) */
2355+ at91_register_uart(0, 0, 0);
2356
2357- /* Setup the serial ports and console */
2358- at91_init_serial(&csb637_uart_config);
2359+ /* make console=ttyS0 (ie, DBGU) the default */
2360+ at91_set_serial_console(0);
2361 }
2362
2363 static void __init csb637_init_irq(void)
2364@@ -118,8 +107,19 @@ static struct platform_device csb_flash
2365     .num_resources = ARRAY_SIZE(csb_flash_resources),
2366 };
2367
2368+static struct gpio_led csb_leds[] = {
2369+ { /* "d1", red */
2370+ .name = "d1",
2371+ .gpio = AT91_PIN_PB2,
2372+ .active_low = 1,
2373+ .default_trigger = "heartbeat",
2374+ }
2375+};
2376+
2377 static void __init csb637_board_init(void)
2378 {
2379+ /* LED(s) */
2380+ at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));
2381     /* Serial */
2382     at91_add_device_serial();
2383     /* Ethernet */
2384+++ b/arch/arm/mach-at91/board-dk.c
2385@@ -25,6 +25,7 @@
2386 #include <linux/init.h>
2387 #include <linux/mm.h>
2388 #include <linux/module.h>
2389+#include <linux/dma-mapping.h>
2390 #include <linux/platform_device.h>
2391 #include <linux/spi/spi.h>
2392 #include <linux/mtd/physmap.h>
2393@@ -45,17 +46,6 @@
2394 #include "generic.h"
2395
2396
2397-/*
2398- * Serial port configuration.
2399- * 0 .. 3 = USART0 .. USART3
2400- * 4 = DBGU
2401- */
2402-static struct at91_uart_config __initdata dk_uart_config = {
2403- .console_tty = 0, /* ttyS0 */
2404- .nr_tty = 2,
2405- .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2406-};
2407-
2408 static void __init dk_map_io(void)
2409 {
2410     /* Initialize processor: 18.432 MHz crystal */
2411@@ -64,8 +54,16 @@ static void __init dk_map_io(void)
2412     /* Setup the LEDs */
2413     at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
2414
2415- /* Setup the serial ports and console */
2416- at91_init_serial(&dk_uart_config);
2417+ /* DBGU on ttyS0. (Rx & Tx only) */
2418+ at91_register_uart(0, 0, 0);
2419+
2420+ /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
2421+ at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
2422+ | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
2423+ | ATMEL_UART_RI);
2424+
2425+ /* set serial console to ttyS0 (ie, DBGU) */
2426+ at91_set_serial_console(0);
2427 }
2428
2429 static void __init dk_init_irq(void)
2430@@ -73,6 +71,185 @@ static void __init dk_init_irq(void)
2431     at91rm9200_init_interrupts(NULL);
2432 }
2433
2434+#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
2435+#include <video/s1d13xxxfb.h>
2436+#include <asm/arch/ics1523.h>
2437+
2438+/* EPSON S1D13806 FB */
2439+#define AT91_FB_REG_BASE 0x30000000L
2440+#define AT91_FB_REG_SIZE 0x200
2441+#define AT91_FB_VMEM_BASE 0x30200000L
2442+#define AT91_FB_VMEM_SIZE 0x140000L
2443+
2444+static void dk_init_video(void)
2445+{
2446+ /* NWAIT Signal */
2447+ at91_set_A_periph(AT91_PIN_PC6, 0);
2448+
2449+ /* Initialization of the Static Memory Controller for Chip Select 2 */
2450+ at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */
2451+ | AT91_SMC_WSEN | AT91_SMC_NWS_(4) /* wait states */
2452+ | AT91_SMC_TDF_(1) /* float time */
2453+ );
2454+
2455+ at91_ics1523_init();
2456+}
2457+
2458+/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)
2459+ Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
2460+static const struct s1d13xxxfb_regval dk_s1dfb_initregs[] = {
2461+ {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */
2462+ {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */
2463+ {S1DREG_GPIO_CNF0, 0x00},
2464+ {S1DREG_GPIO_CNF1, 0x00},
2465+ {S1DREG_GPIO_CTL0, 0x08},
2466+ {S1DREG_GPIO_CTL1, 0x00},
2467+ {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/
2468+ {S1DREG_LCD_CLK_CNF, 0x00},
2469+ {S1DREG_CRT_CLK_CNF, 0x00},
2470+ {S1DREG_MPLUG_CLK_CNF, 0x00},
2471+ {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */
2472+ {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */
2473+ {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */
2474+ {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */
2475+ {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */
2476+ {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */
2477+ {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */
2478+ {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */
2479+ {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */
2480+ {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */
2481+ {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */
2482+ {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},
2483+ {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2484+ {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */
2485+ {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */
2486+ {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */
2487+ {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */
2488+ {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */
2489+ {S1DREG_LCD_DISP_START0, 0x00},
2490+ {S1DREG_LCD_DISP_START1, 0xC8},
2491+ {S1DREG_LCD_DISP_START2, 0x00},
2492+ {S1DREG_LCD_MEM_OFF0, 0x80},
2493+ {S1DREG_LCD_MEM_OFF1, 0x02},
2494+ {S1DREG_LCD_PIX_PAN, 0x00},
2495+ {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},
2496+ {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},
2497+ {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */
2498+ {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */
2499+ {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */
2500+ {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */
2501+ {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},
2502+ {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2503+ {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */
2504+ {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */
2505+ {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */
2506+ {S1DREG_TV_OUT_CTL, 0x10},
2507+ {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */
2508+ {S1DREG_CRT_DISP_START0, 0x00},
2509+ {S1DREG_CRT_DISP_START1, 0x00},
2510+ {S1DREG_CRT_DISP_START2, 0x00},
2511+ {S1DREG_CRT_MEM_OFF0, 0x80},
2512+ {S1DREG_CRT_MEM_OFF1, 0x02},
2513+ {S1DREG_CRT_PIX_PAN, 0x00},
2514+ {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},
2515+ {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},
2516+ {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */
2517+ {S1DREG_LCD_CUR_START, 0x01},
2518+ {S1DREG_LCD_CUR_XPOS0, 0x00},
2519+ {S1DREG_LCD_CUR_XPOS1, 0x00},
2520+ {S1DREG_LCD_CUR_YPOS0, 0x00},
2521+ {S1DREG_LCD_CUR_YPOS1, 0x00},
2522+ {S1DREG_LCD_CUR_BCTL0, 0x00},
2523+ {S1DREG_LCD_CUR_GCTL0, 0x00},
2524+ {S1DREG_LCD_CUR_RCTL0, 0x00},
2525+ {S1DREG_LCD_CUR_BCTL1, 0x1F},
2526+ {S1DREG_LCD_CUR_GCTL1, 0x3F},
2527+ {S1DREG_LCD_CUR_RCTL1, 0x1F},
2528+ {S1DREG_LCD_CUR_FIFO_HTC, 0x00},
2529+ {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */
2530+ {S1DREG_CRT_CUR_START, 0x01},
2531+ {S1DREG_CRT_CUR_XPOS0, 0x00},
2532+ {S1DREG_CRT_CUR_XPOS1, 0x00},
2533+ {S1DREG_CRT_CUR_YPOS0, 0x00},
2534+ {S1DREG_CRT_CUR_YPOS1, 0x00},
2535+ {S1DREG_CRT_CUR_BCTL0, 0x00},
2536+ {S1DREG_CRT_CUR_GCTL0, 0x00},
2537+ {S1DREG_CRT_CUR_RCTL0, 0x00},
2538+ {S1DREG_CRT_CUR_BCTL1, 0x1F},
2539+ {S1DREG_CRT_CUR_GCTL1, 0x3F},
2540+ {S1DREG_CRT_CUR_RCTL1, 0x1F},
2541+ {S1DREG_CRT_CUR_FIFO_HTC, 0x00},
2542+ {S1DREG_BBLT_CTL0, 0x00},
2543+ {S1DREG_BBLT_CTL0, 0x00},
2544+ {S1DREG_BBLT_CC_EXP, 0x00},
2545+ {S1DREG_BBLT_OP, 0x00},
2546+ {S1DREG_BBLT_SRC_START0, 0x00},
2547+ {S1DREG_BBLT_SRC_START1, 0x00},
2548+ {S1DREG_BBLT_SRC_START2, 0x00},
2549+ {S1DREG_BBLT_DST_START0, 0x00},
2550+ {S1DREG_BBLT_DST_START1, 0x00},
2551+ {S1DREG_BBLT_DST_START2, 0x00},
2552+ {S1DREG_BBLT_MEM_OFF0, 0x00},
2553+ {S1DREG_BBLT_MEM_OFF1, 0x00},
2554+ {S1DREG_BBLT_WIDTH0, 0x00},
2555+ {S1DREG_BBLT_WIDTH1, 0x00},
2556+ {S1DREG_BBLT_HEIGHT0, 0x00},
2557+ {S1DREG_BBLT_HEIGHT1, 0x00},
2558+ {S1DREG_BBLT_BGC0, 0x00},
2559+ {S1DREG_BBLT_BGC1, 0x00},
2560+ {S1DREG_BBLT_FGC0, 0x00},
2561+ {S1DREG_BBLT_FGC1, 0x00},
2562+ {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */
2563+ {S1DREG_LKUP_ADDR, 0x00},
2564+ {S1DREG_PS_CNF, 0x00}, /* Power Save disable */
2565+ {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */
2566+ {S1DREG_CPU2MEM_WDOGT, 0x00},
2567+ {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */
2568+};
2569+
2570+static struct s1d13xxxfb_pdata dk_s1dfb_pdata = {
2571+ .initregs = dk_s1dfb_initregs,
2572+ .initregssize = ARRAY_SIZE(dk_s1dfb_initregs),
2573+ .platform_init_video = dk_init_video,
2574+};
2575+
2576+static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
2577+
2578+static struct resource dk_s1dfb_resource[] = {
2579+ [0] = { /* video mem */
2580+ .name = "s1d13806 memory",
2581+ .start = AT91_FB_VMEM_BASE,
2582+ .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
2583+ .flags = IORESOURCE_MEM,
2584+ },
2585+ [1] = { /* video registers */
2586+ .name = "s1d13806 registers",
2587+ .start = AT91_FB_REG_BASE,
2588+ .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
2589+ .flags = IORESOURCE_MEM,
2590+ },
2591+};
2592+
2593+static struct platform_device dk_s1dfb_device = {
2594+ .name = "s1d13806fb",
2595+ .id = -1,
2596+ .dev = {
2597+ .dma_mask = &s1dfb_dmamask,
2598+ .coherent_dma_mask = DMA_BIT_MASK(32),
2599+ .platform_data = &dk_s1dfb_pdata,
2600+ },
2601+ .resource = dk_s1dfb_resource,
2602+ .num_resources = ARRAY_SIZE(dk_s1dfb_resource),
2603+};
2604+
2605+static void __init dk_add_device_video(void)
2606+{
2607+ platform_device_register(&dk_s1dfb_device);
2608+}
2609+#else
2610+static void __init dk_add_device_video(void) {}
2611+#endif
2612+
2613 static struct at91_eth_data __initdata dk_eth_data = {
2614     .phy_irq_pin = AT91_PIN_PC4,
2615     .is_rmii = 1,
2616@@ -164,7 +341,7 @@ static struct at91_nand_data __initdata
2617 #define DK_FLASH_SIZE 0x200000
2618
2619 static struct physmap_flash_data dk_flash_data = {
2620- .width = 2,
2621+ .width = 2,
2622 };
2623
2624 static struct resource dk_flash_resource = {
2625@@ -223,8 +400,12 @@ static void __init dk_board_init(void)
2626     platform_device_register(&dk_flash);
2627     /* LEDs */
2628     at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
2629+ /* SSC (to LM4549 audio codec) */
2630+ at91_add_device_ssc(AT91RM9200_ID_SSC1, ATMEL_SSC_TD | ATMEL_SSC_RX);
2631+ /* SSC (to SI3021 line interface) */
2632+ at91_add_device_ssc(AT91RM9200_ID_SSC2, ATMEL_SSC_TD | ATMEL_SSC_TK | ATMEL_SSC_RD | ATMEL_SSC_RF);
2633     /* VGA */
2634-// dk_add_device_video();
2635+ dk_add_device_video();
2636 }
2637
2638 MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
2639+++ b/arch/arm/mach-at91/board-eb9200.c
2640@@ -40,24 +40,24 @@
2641 #include "generic.h"
2642
2643
2644-/*
2645- * Serial port configuration.
2646- * 0 .. 3 = USART0 .. USART3
2647- * 4 = DBGU
2648- */
2649-static struct at91_uart_config __initdata eb9200_uart_config = {
2650- .console_tty = 0, /* ttyS0 */
2651- .nr_tty = 2,
2652- .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2653-};
2654-
2655 static void __init eb9200_map_io(void)
2656 {
2657     /* Initialize processor: 18.432 MHz crystal */
2658     at91rm9200_initialize(18432000, AT91RM9200_BGA);
2659
2660- /* Setup the serial ports and console */
2661- at91_init_serial(&eb9200_uart_config);
2662+ /* DBGU on ttyS0. (Rx & Tx only) */
2663+ at91_register_uart(0, 0, 0);
2664+
2665+ /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
2666+ at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
2667+ | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
2668+ | ATMEL_UART_RI);
2669+
2670+ /* USART2 on ttyS2. (Rx, Tx) - IRDA */
2671+ at91_register_uart(AT91RM9200_ID_US2, 2, 0);
2672+
2673+ /* set serial console to ttyS0 (ie, DBGU) */
2674+ at91_set_serial_console(0);
2675 }
2676
2677 static void __init eb9200_init_irq(void)
2678+++ b/arch/arm/mach-at91/board-ecbat91.c
2679@@ -0,0 +1,178 @@
2680+/*
2681+ * linux/arch/arm/mach-at91rm9200/board-ecbat91.c
2682+ * Copyright (C) 2007 emQbit.com.
2683+ *
2684+ * We started from board-dk.c, which is Copyright (C) 2005 SAN People.
2685+ *
2686+ * This program is free software; you can redistribute it and/or modify
2687+ * it under the terms of the GNU General Public License as published by
2688+ * the Free Software Foundation; either version 2 of the License, or
2689+ * (at your option) any later version.
2690+ *
2691+ * This program is distributed in the hope that it will be useful,
2692+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
2693+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2694+ * GNU General Public License for more details.
2695+ *
2696+ * You should have received a copy of the GNU General Public License
2697+ * along with this program; if not, write to the Free Software
2698+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2699+ */
2700+
2701+#include <linux/types.h>
2702+#include <linux/init.h>
2703+#include <linux/mm.h>
2704+#include <linux/module.h>
2705+#include <linux/platform_device.h>
2706+#include <linux/spi/spi.h>
2707+#include <linux/spi/flash.h>
2708+
2709+#include <asm/hardware.h>
2710+#include <asm/setup.h>
2711+#include <asm/mach-types.h>
2712+#include <asm/irq.h>
2713+
2714+#include <asm/mach/arch.h>
2715+#include <asm/mach/map.h>
2716+#include <asm/mach/irq.h>
2717+
2718+#include <asm/arch/board.h>
2719+#include <asm/arch/gpio.h>
2720+
2721+#include "generic.h"
2722+
2723+
2724+static void __init ecb_at91map_io(void)
2725+{
2726+ /* Initialize processor: 18.432 MHz crystal */
2727+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
2728+
2729+ /* Setup the LEDs */
2730+ at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
2731+
2732+ /* DBGU on ttyS0. (Rx & Tx only) */
2733+ at91_register_uart(0, 0, 0);
2734+
2735+ /* USART0 on ttyS1. (Rx & Tx only) */
2736+ at91_register_uart(AT91RM9200_ID_US0, 1, 0);
2737+
2738+ /* set serial console to ttyS0 (ie, DBGU) */
2739+ at91_set_serial_console(0);
2740+}
2741+
2742+static void __init ecb_at91init_irq(void)
2743+{
2744+ at91rm9200_init_interrupts(NULL);
2745+}
2746+
2747+static struct at91_eth_data __initdata ecb_at91eth_data = {
2748+ .phy_irq_pin = AT91_PIN_PC4,
2749+ .is_rmii = 0,
2750+};
2751+
2752+static struct at91_usbh_data __initdata ecb_at91usbh_data = {
2753+ .ports = 1,
2754+};
2755+
2756+static struct at91_mmc_data __initdata ecb_at91mmc_data = {
2757+ .slot_b = 0,
2758+ .wire4 = 1,
2759+};
2760+
2761+
2762+#if defined(CONFIG_MTD_DATAFLASH)
2763+static struct mtd_partition __initdata my_flash0_partitions[] =
2764+{
2765+ { /* 0x8400 */
2766+ .name = "Darrell-loader",
2767+ .offset = 0,
2768+ .size = 12* 1056,
2769+ },
2770+ {
2771+ .name = "U-boot",
2772+ .offset = MTDPART_OFS_NXTBLK,
2773+ .size = 110 * 1056,
2774+ },
2775+ { /* 1336 (167 blocks) pages * 1056 bytes = 0x158700 bytes */
2776+ .name = "Uoot-env",
2777+ .offset = MTDPART_OFS_NXTBLK,
2778+ .size = 8 * 1056,
2779+ },
2780+ { /* 1336 (167 blocks) pages * 1056 bytes = 0x158700 bytes */
2781+ .name = "Kernel",
2782+ .offset = MTDPART_OFS_NXTBLK,
2783+ .size = 1534 * 1056,
2784+ },
2785+ { /* 190200 - jffs2 root filesystem */
2786+ .name = "Filesystem",
2787+ .offset = MTDPART_OFS_NXTBLK,
2788+ .size = MTDPART_SIZ_FULL, /* 26 sectors */
2789+ }
2790+};
2791+
2792+static struct flash_platform_data __initdata my_flash0_platform = {
2793+ .name = "Removable flash card",
2794+ .parts = my_flash0_partitions,
2795+ .nr_parts = ARRAY_SIZE(my_flash0_partitions)
2796+};
2797+
2798+#endif
2799+
2800+static struct spi_board_info __initdata ecb_at91spi_devices[] = {
2801+ { /* DataFlash chip */
2802+ .modalias = "mtd_dataflash",
2803+ .chip_select = 0,
2804+ .max_speed_hz = 10 * 1000 * 1000,
2805+ .bus_num = 0,
2806+#if defined(CONFIG_MTD_DATAFLASH)
2807+ .platform_data = &my_flash0_platform,
2808+#endif
2809+ },
2810+ { /* User accessable spi - cs1 (250KHz) */
2811+ .modalias = "spi-cs1",
2812+ .chip_select = 1,
2813+ .max_speed_hz = 250 * 1000,
2814+ },
2815+ { /* User accessable spi - cs2 (1MHz) */
2816+ .modalias = "spi-cs2",
2817+ .chip_select = 2,
2818+ .max_speed_hz = 1 * 1000 * 1000,
2819+ },
2820+ { /* User accessable spi - cs3 (10MHz) */
2821+ .modalias = "spi-cs3",
2822+ .chip_select = 3,
2823+ .max_speed_hz = 10 * 1000 * 1000,
2824+ },
2825+};
2826+
2827+static void __init ecb_at91board_init(void)
2828+{
2829+ /* Serial */
2830+ at91_add_device_serial();
2831+
2832+ /* Ethernet */
2833+ at91_add_device_eth(&ecb_at91eth_data);
2834+
2835+ /* USB Host */
2836+ at91_add_device_usbh(&ecb_at91usbh_data);
2837+
2838+ /* I2C */
2839+ at91_add_device_i2c(NULL, 0);
2840+
2841+ /* MMC */
2842+ at91_add_device_mmc(0, &ecb_at91mmc_data);
2843+
2844+ /* SPI */
2845+ at91_add_device_spi(ecb_at91spi_devices, ARRAY_SIZE(ecb_at91spi_devices));
2846+}
2847+
2848+MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
2849+ /* Maintainer: emQbit.com */
2850+ .phys_io = AT91_BASE_SYS,
2851+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
2852+ .boot_params = AT91_SDRAM_BASE + 0x100,
2853+ .timer = &at91rm9200_timer,
2854+ .map_io = ecb_at91map_io,
2855+ .init_irq = ecb_at91init_irq,
2856+ .init_machine = ecb_at91board_init,
2857+MACHINE_END
2858+++ b/arch/arm/mach-at91/board-ek.c
2859@@ -25,6 +25,7 @@
2860 #include <linux/init.h>
2861 #include <linux/mm.h>
2862 #include <linux/module.h>
2863+#include <linux/dma-mapping.h>
2864 #include <linux/platform_device.h>
2865 #include <linux/spi/spi.h>
2866 #include <linux/mtd/physmap.h>
2867@@ -45,17 +46,6 @@
2868 #include "generic.h"
2869
2870
2871-/*
2872- * Serial port configuration.
2873- * 0 .. 3 = USART0 .. USART3
2874- * 4 = DBGU
2875- */
2876-static struct at91_uart_config __initdata ek_uart_config = {
2877- .console_tty = 0, /* ttyS0 */
2878- .nr_tty = 2,
2879- .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2880-};
2881-
2882 static void __init ek_map_io(void)
2883 {
2884     /* Initialize processor: 18.432 MHz crystal */
2885@@ -64,8 +54,16 @@ static void __init ek_map_io(void)
2886     /* Setup the LEDs */
2887     at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
2888
2889- /* Setup the serial ports and console */
2890- at91_init_serial(&ek_uart_config);
2891+ /* DBGU on ttyS0. (Rx & Tx only) */
2892+ at91_register_uart(0, 0, 0);
2893+
2894+ /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
2895+ at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
2896+ | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
2897+ | ATMEL_UART_RI);
2898+
2899+ /* set serial console to ttyS0 (ie, DBGU) */
2900+ at91_set_serial_console(0);
2901 }
2902
2903 static void __init ek_init_irq(void)
2904@@ -73,6 +71,187 @@ static void __init ek_init_irq(void)
2905     at91rm9200_init_interrupts(NULL);
2906 }
2907
2908+#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
2909+#include <video/s1d13xxxfb.h>
2910+#include <asm/arch/ics1523.h>
2911+
2912+/* EPSON S1D13806 FB */
2913+#define AT91_FB_REG_BASE 0x40000000L
2914+#define AT91_FB_REG_SIZE 0x200
2915+#define AT91_FB_VMEM_BASE 0x40200000L
2916+#define AT91_FB_VMEM_SIZE 0x140000L
2917+
2918+static void ek_init_video(void)
2919+{
2920+ /* NWAIT Signal */
2921+ at91_set_A_periph(AT91_PIN_PC6, 0);
2922+
2923+ /* Initialization of the Static Memory Controller for Chip Select 3 */
2924+ at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_DBW_16 /* 16 bit */
2925+ | AT91_SMC_WSEN | AT91_SMC_NWS_(5) /* wait states */
2926+ | AT91_SMC_TDF_(1) /* float time */
2927+ );
2928+
2929+ at91_ics1523_init();
2930+}
2931+
2932+/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)
2933+ Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
2934+static const struct s1d13xxxfb_regval ek_s1dfb_initregs[] = {
2935+ {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */
2936+ {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */
2937+ {S1DREG_GPIO_CNF0, 0xFF}, // 0x00
2938+ {S1DREG_GPIO_CNF1, 0x1F}, // 0x08
2939+ {S1DREG_GPIO_CTL0, 0x00},
2940+ {S1DREG_GPIO_CTL1, 0x00},
2941+ {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/
2942+ {S1DREG_LCD_CLK_CNF, 0x00},
2943+ {S1DREG_CRT_CLK_CNF, 0x00},
2944+ {S1DREG_MPLUG_CLK_CNF, 0x00},
2945+ {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */
2946+ {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */
2947+ {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */
2948+ {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */
2949+ {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */
2950+ {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */
2951+ {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */
2952+ {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */
2953+ {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */
2954+ {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */
2955+ {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */
2956+ {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},
2957+ {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2958+ {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */
2959+ {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */
2960+ {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */
2961+ {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */
2962+ {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */
2963+ {S1DREG_LCD_DISP_START0, 0x00},
2964+ {S1DREG_LCD_DISP_START1, 0xC8},
2965+ {S1DREG_LCD_DISP_START2, 0x00},
2966+ {S1DREG_LCD_MEM_OFF0, 0x80},
2967+ {S1DREG_LCD_MEM_OFF1, 0x02},
2968+ {S1DREG_LCD_PIX_PAN, 0x00},
2969+ {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},
2970+ {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},
2971+ {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */
2972+ {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */
2973+ {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */
2974+ {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */
2975+ {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},
2976+ {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2977+ {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */
2978+ {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */
2979+ {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */
2980+ {S1DREG_TV_OUT_CTL, 0x10},
2981+ {0x005E, 0x9F},
2982+ {0x005F, 0x00},
2983+ {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */
2984+ {S1DREG_CRT_DISP_START0, 0x00},
2985+ {S1DREG_CRT_DISP_START1, 0x00},
2986+ {S1DREG_CRT_DISP_START2, 0x00},
2987+ {S1DREG_CRT_MEM_OFF0, 0x80},
2988+ {S1DREG_CRT_MEM_OFF1, 0x02},
2989+ {S1DREG_CRT_PIX_PAN, 0x00},
2990+ {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},
2991+ {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},
2992+ {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */
2993+ {S1DREG_LCD_CUR_START, 0x01},
2994+ {S1DREG_LCD_CUR_XPOS0, 0x00},
2995+ {S1DREG_LCD_CUR_XPOS1, 0x00},
2996+ {S1DREG_LCD_CUR_YPOS0, 0x00},
2997+ {S1DREG_LCD_CUR_YPOS1, 0x00},
2998+ {S1DREG_LCD_CUR_BCTL0, 0x00},
2999+ {S1DREG_LCD_CUR_GCTL0, 0x00},
3000+ {S1DREG_LCD_CUR_RCTL0, 0x00},
3001+ {S1DREG_LCD_CUR_BCTL1, 0x1F},
3002+ {S1DREG_LCD_CUR_GCTL1, 0x3F},
3003+ {S1DREG_LCD_CUR_RCTL1, 0x1F},
3004+ {S1DREG_LCD_CUR_FIFO_HTC, 0x00},
3005+ {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */
3006+ {S1DREG_CRT_CUR_START, 0x01},
3007+ {S1DREG_CRT_CUR_XPOS0, 0x00},
3008+ {S1DREG_CRT_CUR_XPOS1, 0x00},
3009+ {S1DREG_CRT_CUR_YPOS0, 0x00},
3010+ {S1DREG_CRT_CUR_YPOS1, 0x00},
3011+ {S1DREG_CRT_CUR_BCTL0, 0x00},
3012+ {S1DREG_CRT_CUR_GCTL0, 0x00},
3013+ {S1DREG_CRT_CUR_RCTL0, 0x00},
3014+ {S1DREG_CRT_CUR_BCTL1, 0x1F},
3015+ {S1DREG_CRT_CUR_GCTL1, 0x3F},
3016+ {S1DREG_CRT_CUR_RCTL1, 0x1F},
3017+ {S1DREG_CRT_CUR_FIFO_HTC, 0x00},
3018+ {S1DREG_BBLT_CTL0, 0x00},
3019+ {S1DREG_BBLT_CTL0, 0x00},
3020+ {S1DREG_BBLT_CC_EXP, 0x00},
3021+ {S1DREG_BBLT_OP, 0x00},
3022+ {S1DREG_BBLT_SRC_START0, 0x00},
3023+ {S1DREG_BBLT_SRC_START1, 0x00},
3024+ {S1DREG_BBLT_SRC_START2, 0x00},
3025+ {S1DREG_BBLT_DST_START0, 0x00},
3026+ {S1DREG_BBLT_DST_START1, 0x00},
3027+ {S1DREG_BBLT_DST_START2, 0x00},
3028+ {S1DREG_BBLT_MEM_OFF0, 0x00},
3029+ {S1DREG_BBLT_MEM_OFF1, 0x00},
3030+ {S1DREG_BBLT_WIDTH0, 0x00},
3031+ {S1DREG_BBLT_WIDTH1, 0x00},
3032+ {S1DREG_BBLT_HEIGHT0, 0x00},
3033+ {S1DREG_BBLT_HEIGHT1, 0x00},
3034+ {S1DREG_BBLT_BGC0, 0x00},
3035+ {S1DREG_BBLT_BGC1, 0x00},
3036+ {S1DREG_BBLT_FGC0, 0x00},
3037+ {S1DREG_BBLT_FGC1, 0x00},
3038+ {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */
3039+ {S1DREG_LKUP_ADDR, 0x00},
3040+ {S1DREG_PS_CNF, 0x10}, /* Power Save disable */
3041+ {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */
3042+ {S1DREG_CPU2MEM_WDOGT, 0x00},
3043+ {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */
3044+};
3045+
3046+static struct s1d13xxxfb_pdata ek_s1dfb_pdata = {
3047+ .initregs = ek_s1dfb_initregs,
3048+ .initregssize = ARRAY_SIZE(ek_s1dfb_initregs),
3049+ .platform_init_video = ek_init_video,
3050+};
3051+
3052+static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
3053+
3054+static struct resource ek_s1dfb_resource[] = {
3055+ [0] = { /* video mem */
3056+ .name = "s1d13806 memory",
3057+ .start = AT91_FB_VMEM_BASE,
3058+ .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
3059+ .flags = IORESOURCE_MEM,
3060+ },
3061+ [1] = { /* video registers */
3062+ .name = "s1d13806 registers",
3063+ .start = AT91_FB_REG_BASE,
3064+ .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
3065+ .flags = IORESOURCE_MEM,
3066+ },
3067+};
3068+
3069+static struct platform_device ek_s1dfb_device = {
3070+ .name = "s1d13806fb",
3071+ .id = -1,
3072+ .dev = {
3073+ .dma_mask = &s1dfb_dmamask,
3074+ .coherent_dma_mask = DMA_BIT_MASK(32),
3075+ .platform_data = &ek_s1dfb_pdata,
3076+ },
3077+ .resource = ek_s1dfb_resource,
3078+ .num_resources = ARRAY_SIZE(ek_s1dfb_resource),
3079+};
3080+
3081+static void __init ek_add_device_video(void)
3082+{
3083+ platform_device_register(&ek_s1dfb_device);
3084+}
3085+#else
3086+static void __init ek_add_device_video(void) {}
3087+#endif
3088+
3089 static struct at91_eth_data __initdata ek_eth_data = {
3090     .phy_irq_pin = AT91_PIN_PC4,
3091     .is_rmii = 1,
3092@@ -122,7 +301,7 @@ static struct i2c_board_info __initdata
3093 #define EK_FLASH_SIZE 0x200000
3094
3095 static struct physmap_flash_data ek_flash_data = {
3096- .width = 2,
3097+ .width = 2,
3098 };
3099
3100 static struct resource ek_flash_resource = {
3101@@ -189,7 +368,7 @@ static void __init ek_board_init(void)
3102     /* LEDs */
3103     at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
3104     /* VGA */
3105-// ek_add_device_video();
3106+ ek_add_device_video();
3107 }
3108
3109 MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
3110+++ b/arch/arm/mach-at91/board-homematic.c
3111@@ -0,0 +1,163 @@
3112+/*
3113+ * linux/arch/arm/mach-at91/board-homematic.c
3114+ *
3115+ * Copyright (C) 2007 eQ-3 Entwicklung GmbH
3116+ *
3117+ * based on work
3118+ * Copyright (C) 2005 SAN People
3119+ *
3120+ * This program is free software; you can redistribute it and/or modify
3121+ * it under the terms of the GNU General Public License as published by
3122+ * the Free Software Foundation; either version 2 of the License, or
3123+ * (at your option) any later version.
3124+ *
3125+ * This program is distributed in the hope that it will be useful,
3126+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
3127+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3128+ * GNU General Public License for more details.
3129+ *
3130+ * You should have received a copy of the GNU General Public License
3131+ * along with this program; if not, write to the Free Software
3132+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3133+ */
3134+
3135+#include <linux/types.h>
3136+#include <linux/init.h>
3137+#include <linux/mm.h>
3138+#include <linux/module.h>
3139+#include <linux/platform_device.h>
3140+#include <linux/spi/spi.h>
3141+#include <linux/mtd/physmap.h>
3142+
3143+#include <asm/hardware.h>
3144+#include <asm/setup.h>
3145+#include <asm/mach-types.h>
3146+#include <asm/irq.h>
3147+
3148+#include <asm/mach/arch.h>
3149+#include <asm/mach/map.h>
3150+#include <asm/mach/irq.h>
3151+
3152+#include <asm/arch/board.h>
3153+#include <asm/arch/gpio.h>
3154+#include <asm/arch/at91rm9200_mc.h>
3155+
3156+#include "generic.h"
3157+
3158+
3159+/*
3160+ * Serial port configuration.
3161+ * 0 .. 3 = USART0 .. USART3
3162+ * 4 = DBGU
3163+ */
3164+static struct at91_uart_config __initdata homematic_uart_config = {
3165+ .console_tty = 0, /* ttyS0 */
3166+ .nr_tty = 2,
3167+ .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
3168+};
3169+
3170+static void __init homematic_map_io(void)
3171+{
3172+ /* Initialize processor: 18.432 MHz crystal */
3173+ at91rm9200_initialize(18432000, AT91RM9200_BGA);
3174+
3175+ /* Setup the serial ports and console */
3176+ at91_init_serial(&homematic_uart_config);
3177+}
3178+
3179+static void __init homematic_init_irq(void)
3180+{
3181+ at91rm9200_init_interrupts(NULL);
3182+}
3183+
3184+static struct at91_eth_data __initdata homematic_eth_data = {
3185+ .phy_irq_pin = AT91_PIN_PC4,
3186+ .is_rmii = 0,
3187+};
3188+
3189+static struct at91_usbh_data __initdata homematic_usbh_data = {
3190+ .ports = 2,
3191+};
3192+
3193+static struct at91_udc_data __initdata homematic_udc_data = {
3194+ .vbus_pin = AT91_PIN_PD4,
3195+ .pullup_pin = AT91_PIN_PD5,
3196+};
3197+
3198+static struct at91_mmc_data __initdata homematic_mmc_data = {
3199+ .slot_b = 0,
3200+ .wire4 = 1,
3201+};
3202+
3203+static struct spi_board_info homematic_spi_devices[] = {
3204+ { /* DataFlash chip */
3205+ .modalias = "mtd_dataflash",
3206+ .chip_select = 0,
3207+ .max_speed_hz = 15 * 1000 * 1000,
3208+ },
3209+};
3210+
3211+static struct mtd_partition __initdata homematic_nand_partition[] = {
3212+ {
3213+ .name = "root",
3214+ .offset = 0,
3215+ .size = 0x02000000,
3216+ }, {
3217+ .name = "storage",
3218+ .offset = 0x02000000,
3219+ .size = MTDPART_SIZ_FULL,
3220+ },
3221+};
3222+
3223+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
3224+{
3225+ *num_partitions = ARRAY_SIZE(homematic_nand_partition);
3226+ return homematic_nand_partition;
3227+}
3228+
3229+static struct at91_nand_data __initdata homematic_nand_data = {
3230+ .ale = 22,
3231+ .cle = 21,
3232+// .det_pin = AT91_PIN_PB1,
3233+ .rdy_pin = AT91_PIN_PC2,
3234+ .enable_pin = AT91_PIN_PC0,
3235+ .partition_info = nand_partitions,
3236+};
3237+
3238+static void __init homematic_board_init(void)
3239+{
3240+ /* Serial */
3241+ at91_add_device_serial();
3242+ /* Ethernet */
3243+ at91_add_device_eth(&homematic_eth_data);
3244+ /* USB Host */
3245+ at91_add_device_usbh(&homematic_usbh_data);
3246+ /* USB Device */
3247+ at91_add_device_udc(&homematic_udc_data);
3248+ at91_set_multi_drive(homematic_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
3249+ /* I2C */
3250+ at91_add_device_i2c(NULL, 0);
3251+ /* SPI */
3252+ at91_add_device_spi(homematic_spi_devices, ARRAY_SIZE(homematic_spi_devices));
3253+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
3254+ /* DataFlash card */
3255+ at91_set_gpio_output(AT91_PIN_PB7, 0);
3256+#else
3257+ /* MMC */
3258+ at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
3259+ at91_add_device_mmc(0, &homematic_mmc_data);
3260+#endif
3261+ /* NAND */
3262+ at91_add_device_nand(&homematic_nand_data);
3263+}
3264+
3265+MACHINE_START(HOMEMATIC, "HomeMatic")
3266+ /* Maintainer: eQ-3 */
3267+ .phys_io = AT91_BASE_SYS,
3268+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
3269+ .boot_params = AT91_SDRAM_BASE + 0x100,
3270+ .timer = &at91rm9200_timer,
3271+ .map_io = homematic_map_io,
3272+ .init_irq = homematic_init_irq,
3273+ .init_machine = homematic_board_init,
3274+MACHINE_END
3275+++ b/arch/arm/mach-at91/board-kb9202.c
3276@@ -37,19 +37,10 @@
3277 #include <asm/arch/board.h>
3278 #include <asm/arch/gpio.h>
3279
3280-#include "generic.h"
3281+#include <asm/arch/at91rm9200_mc.h>
3282
3283+#include "generic.h"
3284
3285-/*
3286- * Serial port configuration.
3287- * 0 .. 3 = USART0 .. USART3
3288- * 4 = DBGU
3289- */
3290-static struct at91_uart_config __initdata kb9202_uart_config = {
3291- .console_tty = 0, /* ttyS0 */
3292- .nr_tty = 3,
3293- .tty_map = { 4, 0, 1, -1, -1 } /* ttyS0, ..., ttyS4 */
3294-};
3295
3296 static void __init kb9202_map_io(void)
3297 {
3298@@ -59,8 +50,20 @@ static void __init kb9202_map_io(void)
3299     /* Set up the LEDs */
3300     at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
3301
3302- /* Setup the serial ports and console */
3303- at91_init_serial(&kb9202_uart_config);
3304+ /* DBGU on ttyS0. (Rx & Tx only) */
3305+ at91_register_uart(0, 0, 0);
3306+
3307+ /* USART0 on ttyS1 (Rx & Tx only) */
3308+ at91_register_uart(AT91RM9200_ID_US0, 1, 0);
3309+
3310+ /* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
3311+ at91_register_uart(AT91RM9200_ID_US1, 2, 0);
3312+
3313+ /* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
3314+ at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
3315+
3316+ /* set serial console to ttyS0 (ie, DBGU) */
3317+ at91_set_serial_console(0);
3318 }
3319
3320 static void __init kb9202_init_irq(void)
3321@@ -111,6 +114,48 @@ static struct at91_nand_data __initdata
3322     .partition_info = nand_partitions,
3323 };
3324
3325+
3326+#if defined(CONFIG_FB_S1D15605)
3327+#warning "The Reset pin must be passed via platform_data, not this way"
3328+static struct resource kb9202_lcd_resources[] = {
3329+ [0] = {
3330+ .start = AT91_CHIPSELECT_2,
3331+ .end = AT91_CHIPSELECT_2 + 0x200FF,
3332+ .flags = IORESOURCE_MEM
3333+ },
3334+ [1] = { /* reset pin */
3335+ .start = AT91_PIN_PC22,
3336+ .end = AT91_PIN_PC22,
3337+ .flags = IORESOURCE_MEM
3338+ },
3339+};
3340+
3341+static struct platform_device kb9202_lcd_device = {
3342+ .name = "s1d15605fb",
3343+ .id = 0,
3344+ .num_resources = ARRAY_SIZE(kb9202_lcd_resources),
3345+ .resource = kb9202_lcd_resources,
3346+};
3347+
3348+static void __init kb9202_add_device_lcd(void)
3349+{
3350+ /* In case the boot loader did not set the chip select mode and timing */
3351+ at91_sys_write(AT91_SMC_CSR(2),
3352+ AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 |
3353+ AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1));
3354+
3355+ /* Backlight pin = output, off */
3356+ at91_set_gpio_output(AT91_PIN_PC23, 0);
3357+
3358+ /* Reset pin = output, in reset */
3359+ at91_set_gpio_output(AT91_PIN_PC22, 0);
3360+
3361+ platform_device_register(&kb9202_lcd_device);
3362+}
3363+#else
3364+static void __init kb9202_add_device_lcd(void) {}
3365+#endif
3366+
3367 static void __init kb9202_board_init(void)
3368 {
3369     /* Serial */
3370@@ -129,6 +174,8 @@ static void __init kb9202_board_init(voi
3371     at91_add_device_spi(NULL, 0);
3372     /* NAND */
3373     at91_add_device_nand(&kb9202_nand_data);
3374+ /* LCD */
3375+ kb9202_add_device_lcd();
3376 }
3377
3378 MACHINE_START(KB9200, "KB920x")
3379+++ b/arch/arm/mach-at91/board-qil-a9260.c
3380@@ -0,0 +1,255 @@
3381+/*
3382+ * linux/arch/arm/mach-at91/board-qil-a9260.c
3383+ *
3384+ * Copyright (C) 2005 SAN People
3385+ * Copyright (C) 2006 Atmel
3386+ * Copyright (C) 2007 Calao-systems
3387+ *
3388+ * This program is free software; you can redistribute it and/or modify
3389+ * it under the terms of the GNU General Public License as published by
3390+ * the Free Software Foundation; either version 2 of the License, or
3391+ * (at your option) any later version.
3392+ *
3393+ * This program is distributed in the hope that it will be useful,
3394+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
3395+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3396+ * GNU General Public License for more details.
3397+ *
3398+ * You should have received a copy of the GNU General Public License
3399+ * along with this program; if not, write to the Free Software
3400+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3401+ */
3402+
3403+#include <linux/types.h>
3404+#include <linux/init.h>
3405+#include <linux/mm.h>
3406+#include <linux/module.h>
3407+#include <linux/platform_device.h>
3408+#include <linux/spi/spi.h>
3409+#include <linux/gpio_keys.h>
3410+#include <linux/input.h>
3411+#include <linux/clk.h>
3412+
3413+#include <asm/hardware.h>
3414+#include <asm/setup.h>
3415+#include <asm/mach-types.h>
3416+#include <asm/irq.h>
3417+
3418+#include <asm/mach/arch.h>
3419+#include <asm/mach/map.h>
3420+#include <asm/mach/irq.h>
3421+
3422+#include <asm/arch/board.h>
3423+#include <asm/arch/gpio.h>
3424+#include <asm/arch/at91_shdwc.h>
3425+
3426+#include "generic.h"
3427+
3428+
3429+static void __init ek_map_io(void)
3430+{
3431+ /* Initialize processor: 12.000 MHz crystal */
3432+ at91sam9260_initialize(12000000);
3433+
3434+ /* DGBU on ttyS0. (Rx & Tx only) */
3435+ at91_register_uart(0, 0, 0);
3436+
3437+ /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
3438+ at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
3439+ | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
3440+ | ATMEL_UART_RI);
3441+
3442+ /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
3443+ at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
3444+
3445+ /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
3446+ at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
3447+
3448+ /* set serial console to ttyS1 (ie, USART0) */
3449+ at91_set_serial_console(1);
3450+
3451+}
3452+
3453+static void __init ek_init_irq(void)
3454+{
3455+ at91sam9260_init_interrupts(NULL);
3456+}
3457+
3458+
3459+/*
3460+ * USB Host port
3461+ */
3462+static struct at91_usbh_data __initdata ek_usbh_data = {
3463+ .ports = 2,
3464+};
3465+
3466+/*
3467+ * USB Device port
3468+ */
3469+static struct at91_udc_data __initdata ek_udc_data = {
3470+ .vbus_pin = AT91_PIN_PC5,
3471+ .pullup_pin = 0, /* pull-up driven by UDC */
3472+};
3473+
3474+/*
3475+ * SPI devices.
3476+ */
3477+static struct spi_board_info ek_spi_devices[] = {
3478+#if defined(CONFIG_RTC_DRV_M41T94)
3479+ { /* M41T94 RTC */
3480+ .modalias = "m41t94",
3481+ .chip_select = 0,
3482+ .max_speed_hz = 1 * 1000 * 1000,
3483+ .bus_num = 0,
3484+ }
3485+#endif
3486+};
3487+
3488+/*
3489+ * MACB Ethernet device
3490+ */
3491+static struct at91_eth_data __initdata ek_macb_data = {
3492+ .phy_irq_pin = AT91_PIN_PA31,
3493+ .is_rmii = 1,
3494+};
3495+
3496+/*
3497+ * NAND flash
3498+ */
3499+static struct mtd_partition __initdata ek_nand_partition[] = {
3500+ {
3501+ .name = "Uboot & Kernel",
3502+ .offset = 0x00000000,
3503+ .size = 16 * 1024 * 1024,
3504+ },
3505+ {
3506+ .name = "Root FS",
3507+ .offset = 0x01000000,
3508+ .size = 120 * 1024 * 1024,
3509+ },
3510+ {
3511+ .name = "FS",
3512+ .offset = 0x08800000,
3513+ .size = 120 * 1024 * 1024,
3514+ },
3515+};
3516+
3517+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
3518+{
3519+ *num_partitions = ARRAY_SIZE(ek_nand_partition);
3520+ return ek_nand_partition;
3521+}
3522+
3523+static struct at91_nand_data __initdata ek_nand_data = {
3524+ .ale = 21,
3525+ .cle = 22,
3526+// .det_pin = ... not connected
3527+ .rdy_pin = AT91_PIN_PC13,
3528+ .enable_pin = AT91_PIN_PC14,
3529+ .partition_info = nand_partitions,
3530+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
3531+ .bus_width_16 = 1,
3532+#else
3533+ .bus_width_16 = 0,
3534+#endif
3535+};
3536+
3537+/*
3538+ * MCI (SD/MMC)
3539+ */
3540+static struct at91_mmc_data __initdata ek_mmc_data = {
3541+ .slot_b = 0,
3542+ .wire4 = 1,
3543+// .det_pin = ... not connected
3544+// .wp_pin = ... not connected
3545+// .vcc_pin = ... not connected
3546+};
3547+
3548+/*
3549+ * GPIO Buttons
3550+ */
3551+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
3552+static struct gpio_keys_button ek_buttons[] = {
3553+ { /* USER PUSH BUTTON */
3554+ .code = KEY_ENTER,
3555+ .gpio = AT91_PIN_PB10,
3556+ .active_low = 1,
3557+ .desc = "user_pb",
3558+ .wakeup = 1,
3559+ }
3560+};
3561+
3562+static struct gpio_keys_platform_data ek_button_data = {
3563+ .buttons = ek_buttons,
3564+ .nbuttons = ARRAY_SIZE(ek_buttons),
3565+};
3566+
3567+static struct platform_device ek_button_device = {
3568+ .name = "gpio-keys",
3569+ .id = -1,
3570+ .num_resources = 0,
3571+ .dev = {
3572+ .platform_data = &ek_button_data,
3573+ }
3574+};
3575+
3576+static void __init ek_add_device_buttons(void)
3577+{
3578+ at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
3579+ at91_set_deglitch(AT91_PIN_PB10, 1);
3580+
3581+ platform_device_register(&ek_button_device);
3582+}
3583+#else
3584+static void __init ek_add_device_buttons(void) {}
3585+#endif
3586+
3587+/*
3588+ * LEDs
3589+ */
3590+static struct gpio_led ek_leds[] = {
3591+ { /* user_led (green) */
3592+ .name = "user_led",
3593+ .gpio = AT91_PIN_PB21,
3594+ .active_low = 0,
3595+ .default_trigger = "heartbeat",
3596+ }
3597+};
3598+
3599+static void __init ek_board_init(void)
3600+{
3601+ /* Serial */
3602+ at91_add_device_serial();
3603+ /* USB Host */
3604+ at91_add_device_usbh(&ek_usbh_data);
3605+ /* USB Device */
3606+ at91_add_device_udc(&ek_udc_data);
3607+ /* SPI */
3608+ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
3609+ /* NAND */
3610+ at91_add_device_nand(&ek_nand_data);
3611+ /* I2C */
3612+ at91_add_device_i2c(NULL, 0);
3613+ /* Ethernet */
3614+ at91_add_device_eth(&ek_macb_data);
3615+ /* MMC */
3616+ at91_add_device_mmc(0, &ek_mmc_data);
3617+ /* Push Buttons */
3618+ ek_add_device_buttons();
3619+ /* LEDs */
3620+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
3621+ /* shutdown controller, wakeup button (5 msec low) */
3622+ at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
3623+ | AT91_SHDW_RTTWKEN);
3624+}
3625+
3626+MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
3627+ /* Maintainer: calao-systems */
3628+ .phys_io = AT91_BASE_SYS,
3629+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
3630+ .boot_params = AT91_SDRAM_BASE + 0x100,
3631+ .timer = &at91sam926x_timer,
3632+ .map_io = ek_map_io,
3633+ .init_irq = ek_init_irq,
3634+ .init_machine = ek_board_init,
3635+MACHINE_END
3636+++ b/arch/arm/mach-at91/board-sam9-l9260.c
3637@@ -0,0 +1,199 @@
3638+/*
3639+ * linux/arch/arm/mach-at91/board-sam9-l9260.c
3640+ *
3641+ * Copyright (C) 2005 SAN People
3642+ * Copyright (C) 2006 Atmel
3643+ * Copyright (C) 2007 Olimex Ltd
3644+ *
3645+ * This program is free software; you can redistribute it and/or modify
3646+ * it under the terms of the GNU General Public License as published by
3647+ * the Free Software Foundation; either version 2 of the License, or
3648+ * (at your option) any later version.
3649+ *
3650+ * This program is distributed in the hope that it will be useful,
3651+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
3652+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3653+ * GNU General Public License for more details.
3654+ *
3655+ * You should have received a copy of the GNU General Public License
3656+ * along with this program; if not, write to the Free Software
3657+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3658+ */
3659+
3660+#include <linux/types.h>
3661+#include <linux/init.h>
3662+#include <linux/mm.h>
3663+#include <linux/module.h>
3664+#include <linux/platform_device.h>
3665+#include <linux/spi/spi.h>
3666+
3667+#include <asm/hardware.h>
3668+#include <asm/setup.h>
3669+#include <asm/mach-types.h>
3670+#include <asm/irq.h>
3671+
3672+#include <asm/mach/arch.h>
3673+#include <asm/mach/map.h>
3674+#include <asm/mach/irq.h>
3675+
3676+#include <asm/arch/board.h>
3677+#include <asm/arch/gpio.h>
3678+
3679+#include "generic.h"
3680+
3681+
3682+static void __init ek_map_io(void)
3683+{
3684+ /* Initialize processor: 18.432 MHz crystal */
3685+ at91sam9260_initialize(18432000);
3686+
3687+ /* Setup the LEDs */
3688+ at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
3689+
3690+ /* DBGU on ttyS0. (Rx & Tx only) */
3691+ at91_register_uart(0, 0, 0);
3692+
3693+ /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
3694+ at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
3695+ | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
3696+ | ATMEL_UART_RI);
3697+
3698+ /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
3699+ at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
3700+
3701+ /* set serial console to ttyS0 (ie, DBGU) */
3702+ at91_set_serial_console(0);
3703+}
3704+
3705+static void __init ek_init_irq(void)
3706+{
3707+ at91sam9260_init_interrupts(NULL);
3708+}
3709+
3710+
3711+/*
3712+ * USB Host port
3713+ */
3714+static struct at91_usbh_data __initdata ek_usbh_data = {
3715+ .ports = 2,
3716+};
3717+
3718+/*
3719+ * USB Device port
3720+ */
3721+static struct at91_udc_data __initdata ek_udc_data = {
3722+ .vbus_pin = AT91_PIN_PC5,
3723+ .pullup_pin = 0, /* pull-up driven by UDC */
3724+};
3725+
3726+
3727+/*
3728+ * SPI devices.
3729+ */
3730+static struct spi_board_info ek_spi_devices[] = {
3731+#if !defined(CONFIG_MMC_AT91)
3732+ { /* DataFlash chip */
3733+ .modalias = "mtd_dataflash",
3734+ .chip_select = 1,
3735+ .max_speed_hz = 15 * 1000 * 1000,
3736+ .bus_num = 0,
3737+ },
3738+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
3739+ { /* DataFlash card */
3740+ .modalias = "mtd_dataflash",
3741+ .chip_select = 0,
3742+ .max_speed_hz = 15 * 1000 * 1000,
3743+ .bus_num = 0,
3744+ },
3745+#endif
3746+#endif
3747+};
3748+
3749+
3750+/*
3751+ * MACB Ethernet device
3752+ */
3753+static struct at91_eth_data __initdata ek_macb_data = {
3754+ .phy_irq_pin = AT91_PIN_PA7,
3755+ .is_rmii = 0,
3756+};
3757+
3758+
3759+/*
3760+ * NAND flash
3761+ */
3762+static struct mtd_partition __initdata ek_nand_partition[] = {
3763+ {
3764+ .name = "Bootloader Area",
3765+ .offset = 0,
3766+ .size = 10 * 1024 * 1024,
3767+ },
3768+ {
3769+ .name = "User Area",
3770+ .offset = 10 * 1024 * 1024,
3771+ .size = MTDPART_SIZ_FULL,
3772+ },
3773+};
3774+
3775+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
3776+{
3777+ *num_partitions = ARRAY_SIZE(ek_nand_partition);
3778+ return ek_nand_partition;
3779+}
3780+
3781+static struct at91_nand_data __initdata ek_nand_data = {
3782+ .ale = 21,
3783+ .cle = 22,
3784+// .det_pin = ... not connected
3785+ .rdy_pin = AT91_PIN_PC13,
3786+ .enable_pin = AT91_PIN_PC14,
3787+ .partition_info = nand_partitions,
3788+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
3789+ .bus_width_16 = 1,
3790+#else
3791+ .bus_width_16 = 0,
3792+#endif
3793+};
3794+
3795+
3796+/*
3797+ * MCI (SD/MMC)
3798+ */
3799+static struct at91_mmc_data __initdata ek_mmc_data = {
3800+ .slot_b = 1,
3801+ .wire4 = 1,
3802+ .det_pin = AT91_PIN_PC8,
3803+ .wp_pin = AT91_PIN_PC4,
3804+// .vcc_pin = ... not connected
3805+};
3806+
3807+static void __init ek_board_init(void)
3808+{
3809+ /* Serial */
3810+ at91_add_device_serial();
3811+ /* USB Host */
3812+ at91_add_device_usbh(&ek_usbh_data);
3813+ /* USB Device */
3814+ at91_add_device_udc(&ek_udc_data);
3815+ /* SPI */
3816+ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
3817+ /* NAND */
3818+ at91_add_device_nand(&ek_nand_data);
3819+ /* Ethernet */
3820+ at91_add_device_eth(&ek_macb_data);
3821+ /* MMC */
3822+ at91_add_device_mmc(0, &ek_mmc_data);
3823+ /* I2C */
3824+ at91_add_device_i2c(NULL, 0);
3825+}
3826+
3827+MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
3828+ /* Maintainer: Olimex */
3829+ .phys_io = AT91_BASE_SYS,
3830+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
3831+ .boot_params = AT91_SDRAM_BASE + 0x100,
3832+ .timer = &at91sam926x_timer,
3833+ .map_io = ek_map_io,
3834+ .init_irq = ek_init_irq,
3835+ .init_machine = ek_board_init,
3836+MACHINE_END
3837+++ b/arch/arm/mach-at91/board-sam9260ek.c
3838@@ -25,6 +25,10 @@
3839 #include <linux/module.h>
3840 #include <linux/platform_device.h>
3841 #include <linux/spi/spi.h>
3842+#include <linux/spi/at73c213.h>
3843+#include <linux/clk.h>
3844+#include <linux/gpio_keys.h>
3845+#include <linux/input.h>
3846
3847 #include <asm/hardware.h>
3848 #include <asm/setup.h>
3849@@ -37,29 +41,29 @@
3850
3851 #include <asm/arch/board.h>
3852 #include <asm/arch/gpio.h>
3853-#include <asm/arch/at91sam926x_mc.h>
3854+#include <asm/arch/at91_shdwc.h>
3855
3856 #include "generic.h"
3857
3858
3859-/*
3860- * Serial port configuration.
3861- * 0 .. 5 = USART0 .. USART5
3862- * 6 = DBGU
3863- */
3864-static struct at91_uart_config __initdata ek_uart_config = {
3865- .console_tty = 0, /* ttyS0 */
3866- .nr_tty = 3,
3867- .tty_map = { 6, 0, 1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */
3868-};
3869-
3870 static void __init ek_map_io(void)
3871 {
3872     /* Initialize processor: 18.432 MHz crystal */
3873     at91sam9260_initialize(18432000);
3874
3875- /* Setup the serial ports and console */
3876- at91_init_serial(&ek_uart_config);
3877+ /* DGBU on ttyS0. (Rx & Tx only) */
3878+ at91_register_uart(0, 0, 0);
3879+
3880+ /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
3881+ at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
3882+ | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
3883+ | ATMEL_UART_RI);
3884+
3885+ /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
3886+ at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
3887+
3888+ /* set serial console to ttyS0 (ie, DBGU) */
3889+ at91_set_serial_console(0);
3890 }
3891
3892 static void __init ek_init_irq(void)
3893@@ -85,6 +89,35 @@ static struct at91_udc_data __initdata e
3894
3895
3896 /*
3897+ * Audio
3898+ */
3899+static struct at73c213_board_info at73c213_data = {
3900+ .ssc_id = 0,
3901+ .shortname = "AT91SAM9260-EK external DAC",
3902+};
3903+
3904+#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
3905+static void __init at73c213_set_clk(struct at73c213_board_info *info)
3906+{
3907+ struct clk *pck0;
3908+ struct clk *plla;
3909+
3910+ pck0 = clk_get(NULL, "pck0");
3911+ plla = clk_get(NULL, "plla");
3912+
3913+ /* AT73C213 MCK Clock */
3914+ at91_set_B_periph(AT91_PIN_PC1, 0); /* PCK0 */
3915+
3916+ clk_set_parent(pck0, plla);
3917+ clk_put(plla);
3918+
3919+ info->dac_clk = pck0;
3920+}
3921+#else
3922+static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
3923+#endif
3924+
3925+/*
3926  * SPI devices.
3927  */
3928 static struct spi_board_info ek_spi_devices[] = {
3929@@ -110,6 +143,8 @@ static struct spi_board_info ek_spi_devi
3930         .chip_select = 0,
3931         .max_speed_hz = 10 * 1000 * 1000,
3932         .bus_num = 1,
3933+ .mode = SPI_MODE_1,
3934+ .platform_data = &at73c213_data,
3935     },
3936 #endif
3937 };
3938@@ -172,6 +207,74 @@ static struct at91_mmc_data __initdata e
3939 // .vcc_pin = ... not connected
3940 };
3941
3942+
3943+/*
3944+ * LEDs
3945+ */
3946+static struct gpio_led ek_leds[] = {
3947+ { /* "bottom" led, green, userled1 to be defined */
3948+ .name = "ds5",
3949+ .gpio = AT91_PIN_PA6,
3950+ .active_low = 1,
3951+ .default_trigger = "none",
3952+ },
3953+ { /* "power" led, yellow */
3954+ .name = "ds1",
3955+ .gpio = AT91_PIN_PA9,
3956+ .default_trigger = "heartbeat",
3957+ }
3958+};
3959+
3960+
3961+/*
3962+ * GPIO Buttons
3963+ */
3964+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
3965+static struct gpio_keys_button ek_buttons[] = {
3966+ {
3967+ .gpio = AT91_PIN_PA30,
3968+ .code = BTN_3,
3969+ .desc = "Button 3",
3970+ .active_low = 1,
3971+ .wakeup = 1,
3972+ },
3973+ {
3974+ .gpio = AT91_PIN_PA31,
3975+ .code = BTN_4,
3976+ .desc = "Button 4",
3977+ .active_low = 1,
3978+ .wakeup = 1,
3979+ }
3980+};
3981+
3982+static struct gpio_keys_platform_data ek_button_data = {
3983+ .buttons = ek_buttons,
3984+ .nbuttons = ARRAY_SIZE(ek_buttons),
3985+};
3986+
3987+static struct platform_device ek_button_device = {
3988+ .name = "gpio-keys",
3989+ .id = -1,
3990+ .num_resources = 0,
3991+ .dev = {
3992+ .platform_data = &ek_button_data,
3993+ }
3994+};
3995+
3996+static void __init ek_add_device_buttons(void)
3997+{
3998+ at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
3999+ at91_set_deglitch(AT91_PIN_PA30, 1);
4000+ at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
4001+ at91_set_deglitch(AT91_PIN_PA31, 1);
4002+
4003+ platform_device_register(&ek_button_device);
4004+}
4005+#else
4006+static void __init ek_add_device_buttons(void) {}
4007+#endif
4008+
4009+
4010 static void __init ek_board_init(void)
4011 {
4012     /* Serial */
4013@@ -190,6 +293,16 @@ static void __init ek_board_init(void)
4014     at91_add_device_mmc(0, &ek_mmc_data);
4015     /* I2C */
4016     at91_add_device_i2c(NULL, 0);
4017+ /* SSC (to AT73C213) */
4018+ at73c213_set_clk(&at73c213_data);
4019+ at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
4020+ /* LEDs */
4021+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
4022+ /* Push Buttons */
4023+ ek_add_device_buttons();
4024+ /* shutdown controller, wakeup button (5 msec low) */
4025+ at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4026+ | AT91_SHDW_RTTWKEN);
4027 }
4028
4029 MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
4030+++ b/arch/arm/mach-at91/board-sam9261ek.c
4031@@ -26,6 +26,8 @@
4032 #include <linux/platform_device.h>
4033 #include <linux/spi/spi.h>
4034 #include <linux/spi/ads7846.h>
4035+#include <linux/spi/at73c213.h>
4036+#include <linux/clk.h>
4037 #include <linux/dm9000.h>
4038 #include <linux/fb.h>
4039 #include <linux/gpio_keys.h>
4040@@ -44,22 +46,12 @@
4041
4042 #include <asm/arch/board.h>
4043 #include <asm/arch/gpio.h>
4044-#include <asm/arch/at91sam926x_mc.h>
4045+#include <asm/arch/at91sam9_smc.h>
4046+#include <asm/arch/at91_shdwc.h>
4047
4048 #include "generic.h"
4049
4050
4051-/*
4052- * Serial port configuration.
4053- * 0 .. 2 = USART0 .. USART2
4054- * 3 = DBGU
4055- */
4056-static struct at91_uart_config __initdata ek_uart_config = {
4057- .console_tty = 0, /* ttyS0 */
4058- .nr_tty = 1,
4059- .tty_map = { 3, -1, -1, -1 } /* ttyS0, ..., ttyS3 */
4060-};
4061-
4062 static void __init ek_map_io(void)
4063 {
4064     /* Initialize processor: 18.432 MHz crystal */
4065@@ -68,8 +60,11 @@ static void __init ek_map_io(void)
4066     /* Setup the LEDs */
4067     at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
4068
4069- /* Setup the serial ports and console */
4070- at91_init_serial(&ek_uart_config);
4071+ /* DGBU on ttyS0. (Rx & Tx only) */
4072+ at91_register_uart(0, 0, 0);
4073+
4074+ /* set serial console to ttyS0 (ie, DBGU) */
4075+ at91_set_serial_console(0);
4076 }
4077
4078 static void __init ek_init_irq(void)
4079@@ -239,6 +234,35 @@ static void __init ek_add_device_ts(void
4080 #endif
4081
4082 /*
4083+ * Audio
4084+ */
4085+static struct at73c213_board_info at73c213_data = {
4086+ .ssc_id = 1,
4087+ .shortname = "AT91SAM9261-EK external DAC",
4088+};
4089+
4090+#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
4091+static void __init at73c213_set_clk(struct at73c213_board_info *info)
4092+{
4093+ struct clk *pck2;
4094+ struct clk *plla;
4095+
4096+ pck2 = clk_get(NULL, "pck2");
4097+ plla = clk_get(NULL, "plla");
4098+
4099+ /* AT73C213 MCK Clock */
4100+ at91_set_B_periph(AT91_PIN_PB31, 0); /* PCK2 */
4101+
4102+ clk_set_parent(pck2, plla);
4103+ clk_put(plla);
4104+
4105+ info->dac_clk = pck2;
4106+}
4107+#else
4108+static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
4109+#endif
4110+
4111+/*
4112  * SPI devices
4113  */
4114 static struct spi_board_info ek_spi_devices[] = {
4115@@ -252,10 +276,11 @@ static struct spi_board_info ek_spi_devi
4116     {
4117         .modalias = "ads7846",
4118         .chip_select = 2,
4119- .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
4120+ .max_speed_hz = 125000 * 16, /* max sample rate * clocks per sample */
4121         .bus_num = 0,
4122         .platform_data = &ads_info,
4123         .irq = AT91SAM9261_ID_IRQ0,
4124+ .controller_data = (void *) AT91_PIN_PA28, /* CS pin */
4125     },
4126 #endif
4127 #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
4128@@ -271,6 +296,9 @@ static struct spi_board_info ek_spi_devi
4129         .chip_select = 3,
4130         .max_speed_hz = 10 * 1000 * 1000,
4131         .bus_num = 0,
4132+ .mode = SPI_MODE_1,
4133+ .platform_data = &at73c213_data,
4134+ .controller_data = (void*) AT91_PIN_PA29, /* default for CS3 is PA6, but it must be PA29 */
4135     },
4136 #endif
4137 };
4138@@ -408,24 +436,28 @@ static struct gpio_keys_button ek_button
4139         .code = BTN_0,
4140         .desc = "Button 0",
4141         .active_low = 1,
4142+ .wakeup = 1,
4143     },
4144     {
4145         .gpio = AT91_PIN_PA26,
4146         .code = BTN_1,
4147         .desc = "Button 1",
4148         .active_low = 1,
4149+ .wakeup = 1,
4150     },
4151     {
4152         .gpio = AT91_PIN_PA25,
4153         .code = BTN_2,
4154         .desc = "Button 2",
4155         .active_low = 1,
4156+ .wakeup = 1,
4157     },
4158     {
4159         .gpio = AT91_PIN_PA24,
4160         .code = BTN_3,
4161         .desc = "Button 3",
4162         .active_low = 1,
4163+ .wakeup = 1,
4164     }
4165 };
4166
4167@@ -445,13 +477,13 @@ static struct platform_device ek_button_
4168
4169 static void __init ek_add_device_buttons(void)
4170 {
4171- at91_set_gpio_input(AT91_PIN_PA27, 0); /* btn0 */
4172+ at91_set_gpio_input(AT91_PIN_PA27, 1); /* btn0 */
4173     at91_set_deglitch(AT91_PIN_PA27, 1);
4174- at91_set_gpio_input(AT91_PIN_PA26, 0); /* btn1 */
4175+ at91_set_gpio_input(AT91_PIN_PA26, 1); /* btn1 */
4176     at91_set_deglitch(AT91_PIN_PA26, 1);
4177- at91_set_gpio_input(AT91_PIN_PA25, 0); /* btn2 */
4178+ at91_set_gpio_input(AT91_PIN_PA25, 1); /* btn2 */
4179     at91_set_deglitch(AT91_PIN_PA25, 1);
4180- at91_set_gpio_input(AT91_PIN_PA24, 0); /* btn3 */
4181+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* btn3 */
4182     at91_set_deglitch(AT91_PIN_PA24, 1);
4183
4184     platform_device_register(&ek_button_device);
4185@@ -460,6 +492,29 @@ static void __init ek_add_device_buttons
4186 static void __init ek_add_device_buttons(void) {}
4187 #endif
4188
4189+/*
4190+ * LEDs
4191+ */
4192+static struct gpio_led ek_leds[] = {
4193+ { /* "bottom" led, green, userled1 to be defined */
4194+ .name = "ds7",
4195+ .gpio = AT91_PIN_PA14,
4196+ .active_low = 1,
4197+ .default_trigger = "none",
4198+ },
4199+ { /* "top" led, green, userled2 to be defined */
4200+ .name = "ds8",
4201+ .gpio = AT91_PIN_PA13,
4202+ .active_low = 1,
4203+ .default_trigger = "none",
4204+ },
4205+ { /* "power" led, yellow */
4206+ .name = "ds1",
4207+ .gpio = AT91_PIN_PA23,
4208+ .default_trigger = "heartbeat",
4209+ }
4210+};
4211+
4212 static void __init ek_board_init(void)
4213 {
4214     /* Serial */
4215@@ -481,6 +536,9 @@ static void __init ek_board_init(void)
4216     at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
4217     /* Touchscreen */
4218     ek_add_device_ts();
4219+ /* SSC (to AT73C213) */
4220+ at73c213_set_clk(&at73c213_data);
4221+ at91_add_device_ssc(AT91SAM9261_ID_SSC1, ATMEL_SSC_TX);
4222 #else
4223     /* MMC */
4224     at91_add_device_mmc(0, &ek_mmc_data);
4225@@ -489,6 +547,11 @@ static void __init ek_board_init(void)
4226     at91_add_device_lcdc(&ek_lcdc_data);
4227     /* Push Buttons */
4228     ek_add_device_buttons();
4229+ /* LEDs */
4230+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
4231+ /* shutdown controller, wakeup button (5 msec low) */
4232+ at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4233+ | AT91_SHDW_RTTWKEN);
4234 }
4235
4236 MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
4237+++ b/arch/arm/mach-at91/board-sam9263ek.c
4238@@ -43,29 +43,24 @@
4239
4240 #include <asm/arch/board.h>
4241 #include <asm/arch/gpio.h>
4242-#include <asm/arch/at91sam926x_mc.h>
4243+#include <asm/arch/at91_shdwc.h>
4244
4245 #include "generic.h"
4246
4247
4248-/*
4249- * Serial port configuration.
4250- * 0 .. 2 = USART0 .. USART2
4251- * 3 = DBGU
4252- */
4253-static struct at91_uart_config __initdata ek_uart_config = {
4254- .console_tty = 0, /* ttyS0 */
4255- .nr_tty = 2,
4256- .tty_map = { 3, 0, -1, -1, } /* ttyS0, ..., ttyS3 */
4257-};
4258-
4259 static void __init ek_map_io(void)
4260 {
4261     /* Initialize processor: 16.367 MHz crystal */
4262     at91sam9263_initialize(16367660);
4263
4264- /* Setup the serial ports and console */
4265- at91_init_serial(&ek_uart_config);
4266+ /* DGBU on ttyS0. (Rx & Tx only) */
4267+ at91_register_uart(0, 0, 0);
4268+
4269+ /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
4270+ at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
4271+
4272+ /* set serial console to ttyS0 (ie, DBGU) */
4273+ at91_set_serial_console(0);
4274 }
4275
4276 static void __init ek_init_irq(void)
4277@@ -141,7 +136,7 @@ static struct spi_board_info ek_spi_devi
4278     {
4279         .modalias = "ads7846",
4280         .chip_select = 3,
4281- .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
4282+ .max_speed_hz = 125000 * 16, /* max sample rate * clocks per sample */
4283         .bus_num = 0,
4284         .platform_data = &ads_info,
4285         .irq = AT91SAM9263_ID_IRQ1,
4286@@ -301,9 +296,9 @@ static struct platform_device ek_button_
4287
4288 static void __init ek_add_device_buttons(void)
4289 {
4290- at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */
4291+ at91_set_GPIO_periph(AT91_PIN_PC5, 1); /* left button */
4292     at91_set_deglitch(AT91_PIN_PC5, 1);
4293- at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */
4294+ at91_set_GPIO_periph(AT91_PIN_PC4, 1); /* right button */
4295     at91_set_deglitch(AT91_PIN_PC4, 1);
4296
4297     platform_device_register(&ek_button_device);
4298@@ -341,7 +336,7 @@ static struct gpio_led ek_leds[] = {
4299         .name = "ds3",
4300         .gpio = AT91_PIN_PB7,
4301         .default_trigger = "heartbeat",
4302- },
4303+ }
4304 };
4305
4306
4307@@ -374,6 +369,9 @@ static void __init ek_board_init(void)
4308     at91_add_device_ac97(&ek_ac97_data);
4309     /* LEDs */
4310     at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
4311+ /* shutdown controller, wakeup button (5 msec low) */
4312+ at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4313+ | AT91_SHDW_RTTWKEN);
4314 }
4315
4316 MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
4317+++ b/arch/arm/mach-at91/board-sam9rlek.c
4318@@ -29,29 +29,24 @@
4319
4320 #include <asm/arch/board.h>
4321 #include <asm/arch/gpio.h>
4322-#include <asm/arch/at91sam926x_mc.h>
4323+#include <asm/arch/at91_shdwc.h>
4324
4325 #include "generic.h"
4326
4327
4328-/*
4329- * Serial port configuration.
4330- * 0 .. 3 = USART0 .. USART3
4331- * 4 = DBGU
4332- */
4333-static struct at91_uart_config __initdata ek_uart_config = {
4334- .console_tty = 0, /* ttyS0 */
4335- .nr_tty = 2,
4336- .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
4337-};
4338-
4339 static void __init ek_map_io(void)
4340 {
4341     /* Initialize processor: 12.000 MHz crystal */
4342     at91sam9rl_initialize(12000000);
4343
4344- /* Setup the serial ports and console */
4345- at91_init_serial(&ek_uart_config);
4346+ /* DGBU on ttyS0. (Rx & Tx only) */
4347+ at91_register_uart(0, 0, 0);
4348+
4349+ /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
4350+ at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
4351+
4352+ /* set serial console to ttyS0 (ie, DBGU) */
4353+ at91_set_serial_console(0);
4354 }
4355
4356 static void __init ek_init_irq(void)
4357@@ -61,6 +56,14 @@ static void __init ek_init_irq(void)
4358
4359
4360 /*
4361+ * USB HS Device port
4362+ */
4363+static struct usba_platform_data __initdata ek_usba_udc_data = {
4364+ .vbus_pin = AT91_PIN_PA8,
4365+};
4366+
4367+
4368+/*
4369  * MCI (SD/MMC)
4370  */
4371 static struct at91_mmc_data __initdata ek_mmc_data = {
4372@@ -180,6 +183,8 @@ static void __init ek_board_init(void)
4373 {
4374     /* Serial */
4375     at91_add_device_serial();
4376+ /* USB HS */
4377+ at91_add_device_usba(&ek_usba_udc_data);
4378     /* I2C */
4379     at91_add_device_i2c(NULL, 0);
4380     /* NAND */
4381@@ -190,6 +195,9 @@ static void __init ek_board_init(void)
4382     at91_add_device_mmc(0, &ek_mmc_data);
4383     /* LCD Controller */
4384     at91_add_device_lcdc(&ek_lcdc_data);
4385+ /* shutdown controller, wakeup button (5 msec low) */
4386+ at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4387+ | AT91_SHDW_RTTWKEN);
4388 }
4389
4390 MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
4391+++ b/arch/arm/mach-at91/board-tms.c
4392@@ -0,0 +1,198 @@
4393+/*
4394+* linux/arch/arm/mach-at91/board-tms.c
4395+*
4396+* Copyright (C) 2005 SAN People
4397+*
4398+* Adapted from board-dk to sweda TMS-100 by Luiz de Barros <lboneto@gmail.com>
4399+*
4400+* This program is free software; you can redistribute it and/or modify
4401+* it under the terms of the GNU General Public License as published by
4402+* the Free Software Foundation; either version 2 of the License, or
4403+* (at your option) any later version.
4404+*
4405+* This program is distributed in the hope that it will be useful,
4406+* but WITHOUT ANY WARRANTY; without even the implied warranty of
4407+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4408+* GNU General Public License for more details.
4409+*
4410+* You should have received a copy of the GNU General Public License
4411+* along with this program; if not, write to the Free Software
4412+* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4413+*/
4414+
4415+#include <linux/types.h>
4416+#include <linux/init.h>
4417+#include <linux/mm.h>
4418+#include <linux/module.h>
4419+#include <linux/platform_device.h>
4420+#include <linux/spi/spi.h>
4421+#include <linux/mtd/physmap.h>
4422+
4423+#include <asm/hardware.h>
4424+#include <asm/setup.h>
4425+#include <asm/mach-types.h>
4426+#include <asm/irq.h>
4427+
4428+#include <asm/mach/arch.h>
4429+#include <asm/mach/map.h>
4430+#include <asm/mach/irq.h>
4431+
4432+#include <asm/arch/board.h>
4433+#include <asm/arch/gpio.h>
4434+#include <asm/arch/at91rm9200_mc.h>
4435+
4436+#include "generic.h"
4437+#include <linux/serial_8250.h>
4438+
4439+
4440+#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP| UPF_SHARE_IRQ)
4441+#define SERIAL_CLK (1843200)
4442+
4443+
4444+/*---------------------------------------------------------------------
4445+ * External UART
4446+ */
4447+
4448+#define PORT(_base, _irq) \
4449+ { \
4450+ .mapbase = _base, \
4451+ .irq = _irq, \
4452+ .uartclk = SERIAL_CLK, \
4453+ .iotype = UPIO_MEM, \
4454+ .regshift = 0, \
4455+ .flags = SERIAL_FLAGS, \
4456+ }
4457+
4458+static struct plat_serial8250_port tms_data[] = {
4459+ PORT(0x70000000, AT91_PIN_PC3),
4460+ PORT(0x80000000, AT91_PIN_PC5),
4461+ { },
4462+};
4463+
4464+static struct platform_device tms_device = {
4465+ .name = "serial8250",
4466+ .id = PLAT8250_DEV_PLATFORM,
4467+ .dev =
4468+ {
4469+ .platform_data = &tms_data,
4470+ },
4471+};
4472+
4473+static void setup_external_uart(void)
4474+{
4475+ at91_sys_write(AT91_SMC_CSR(2),
4476+ AT91_SMC_ACSS_STD
4477+ | AT91_SMC_DBW_8
4478+ | AT91_SMC_BAT
4479+ | AT91_SMC_WSEN
4480+ | AT91_SMC_NWS_(32) /* wait states */
4481+ | AT91_SMC_RWSETUP_(6) /* setup time */
4482+ | AT91_SMC_RWHOLD_(4) /* hold time */
4483+
4484+ );
4485+ at91_sys_write(AT91_SMC_CSR(6),
4486+ AT91_SMC_ACSS_STD
4487+ | AT91_SMC_DBW_8
4488+ | AT91_SMC_BAT
4489+ | AT91_SMC_WSEN
4490+ | AT91_SMC_NWS_(32) /* wait states */
4491+ | AT91_SMC_RWSETUP_(6) /* setup time */
4492+ | AT91_SMC_RWHOLD_(4) /* hold time */
4493+
4494+ );
4495+ at91_sys_write(AT91_SMC_CSR(7),
4496+ AT91_SMC_ACSS_STD
4497+ | AT91_SMC_DBW_8
4498+ | AT91_SMC_BAT
4499+ | AT91_SMC_WSEN
4500+ | AT91_SMC_NWS_(32) /* wait states */
4501+ | AT91_SMC_RWSETUP_(6) /* setup time */
4502+ | AT91_SMC_RWHOLD_(4) /* hold time */
4503+ );
4504+
4505+ platform_device_register(&tms_device);
4506+}
4507+
4508+
4509+/*
4510+ * Serial port configuration.
4511+ * 0 .. 3 = USART0 .. USART3
4512+ * 4 = DBGU
4513+ */
4514+static struct at91_uart_config __initdata tms_uart_config = {
4515+ .console_tty = 0, /* ttyS0 */
4516+ .nr_tty = 5,
4517+ .tty_map = { 4, 0, 1, 2, 3 } /* ttyS0, ..., ttyS4 */
4518+};
4519+
4520+static void __init tms_map_io(void)
4521+{
4522+ /* Initialize processor: 18.432 MHz crystal */
4523+ at91rm9200_initialize(18432000, AT91RM9200_BGA);
4524+
4525+ /* Setup the LEDs */
4526+ at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
4527+
4528+ /* Setup the serial ports and console */
4529+ at91_init_serial(&tms_uart_config);
4530+}
4531+
4532+static void __init tms_init_irq(void)
4533+{
4534+ at91rm9200_init_interrupts(NULL);
4535+}
4536+
4537+
4538+static struct at91_eth_data __initdata tms_eth_data = {
4539+ .phy_irq_pin = AT91_PIN_PC4,
4540+ .is_rmii = 1,
4541+};
4542+
4543+static struct at91_usbh_data __initdata tms_usbh_data = {
4544+ .ports = 2,
4545+};
4546+
4547+static struct spi_board_info tms_spi_devices[] = {
4548+ { /* DataFlash chip */
4549+ .modalias = "mtd_dataflash",
4550+ .chip_select = 0,
4551+ .max_speed_hz = 15 * 1000 * 1000,
4552+ },
4553+ { /* DataFlash chip */
4554+ .modalias = "mtd_dataflash",
4555+ .chip_select = 1,
4556+ .max_speed_hz = 15 * 1000 * 1000,
4557+ }
4558+};
4559+
4560+static struct i2c_board_info __initdata tms_i2c_devices[] = {
4561+ {
4562+ I2C_BOARD_INFO("isl1208", 0x6f),
4563+ }
4564+};
4565+
4566+static void __init tms_board_init(void)
4567+{
4568+ /* Serial */
4569+ at91_add_device_serial();
4570+ /* Ethernet */
4571+ at91_add_device_eth(&tms_eth_data);
4572+ at91_add_device_usbh(&tms_usbh_data);
4573+ /* I2C */
4574+ at91_add_device_i2c(tms_i2c_devices, ARRAY_SIZE(tms_i2c_devices));
4575+ /* SPI */
4576+ at91_add_device_spi(tms_spi_devices, ARRAY_SIZE(tms_spi_devices));
4577+ /* Two port external UART */
4578+ setup_external_uart();
4579+}
4580+
4581+MACHINE_START(SWEDATMS, "Sweda TMS-100 Board")
4582+ /* Maintainer: Luiz de Barros */
4583+ .phys_io = AT91_BASE_SYS,
4584+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
4585+ .boot_params = AT91_SDRAM_BASE + 0x100,
4586+ .timer = &at91rm9200_timer,
4587+ .map_io = tms_map_io,
4588+ .init_irq = tms_init_irq,
4589+ .init_machine = tms_board_init,
4590+MACHINE_END
4591+++ b/arch/arm/mach-at91/board-tt9200.c
4592@@ -0,0 +1,192 @@
4593+/*
4594+ * linux/arch/arm/mach-at91rm9200/board-tt9200.c
4595+ * Copyright (C) 2007 Toptechnology
4596+ *
4597+ * Based on board-ecbat91.c
4598+ *
4599+ * This program is free software; you can redistribute it and/or modify
4600+ * it under the terms of the GNU General Public License as published by
4601+ * the Free Software Foundation; either version 2 of the License, or
4602+ * (at your option) any later version.
4603+ *
4604+ * This program is distributed in the hope that it will be useful,
4605+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
4606+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4607+ * GNU General Public License for more details.
4608+ *
4609+ * You should have received a copy of the GNU General Public License
4610+ * along with this program; if not, write to the Free Software
4611+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4612+ */
4613+
4614+#include <linux/types.h>
4615+#include <linux/init.h>
4616+#include <linux/mm.h>
4617+#include <linux/module.h>
4618+#include <linux/platform_device.h>
4619+#include <linux/spi/spi.h>
4620+#include <linux/spi/flash.h>
4621+
4622+#include <asm/hardware.h>
4623+#include <asm/setup.h>
4624+#include <asm/mach-types.h>
4625+#include <asm/irq.h>
4626+
4627+#include <asm/mach/arch.h>
4628+#include <asm/mach/map.h>
4629+#include <asm/mach/irq.h>
4630+
4631+#include <asm/arch/board.h>
4632+#include <asm/arch/gpio.h>
4633+
4634+#include "generic.h"
4635+
4636+
4637+static void __init tt9200_map_io(void)
4638+{
4639+ /* Initialize processor: 18.432 MHz crystal */
4640+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
4641+
4642+ /* Setup the LEDs */
4643+ at91_init_leds(AT91_PIN_PB27, AT91_PIN_PB27);
4644+
4645+ /* DBGU on ttyS0. (Rx & Tx only) */
4646+ at91_register_uart(0, 0, 0);
4647+
4648+ /* USART0 on ttyS1. (Rx & Tx only) */
4649+ at91_register_uart(AT91RM9200_ID_US0, 1, 0);
4650+
4651+ /* USART1 on ttyS2. (Rx & Tx only) */
4652+ at91_register_uart(AT91RM9200_ID_US1, 2, 0);
4653+
4654+ /* USART2 on ttyS3. (Rx & Tx only) */
4655+ at91_register_uart(AT91RM9200_ID_US2, 3, 0);
4656+
4657+ /* USART3 on ttyS4. (Rx, Tx, CTS, RTS) */
4658+ at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS | ATMEL_UART_RTS);
4659+
4660+ /* Console on ttyS0 (ie, DBGU) */
4661+ at91_set_serial_console(0);
4662+}
4663+
4664+static void __init tt9200_init_irq(void)
4665+{
4666+ at91rm9200_init_interrupts(NULL);
4667+}
4668+
4669+static struct at91_eth_data __initdata tt9200_eth_data = {
4670+ .phy_irq_pin = AT91_PIN_PB29,
4671+ .is_rmii = 0,
4672+};
4673+
4674+static struct at91_usbh_data __initdata tt9200_usbh_data = {
4675+ .ports = 1,
4676+};
4677+
4678+static struct i2c_board_info __initdata tt9200_i2c_devices[] = {
4679+ {
4680+ I2C_BOARD_INFO("rtc-m41t80", 0x68),
4681+ .type = "m41t80",
4682+ }
4683+};
4684+
4685+static struct at91_mmc_data __initdata tt9200_mmc_data = {
4686+ .slot_b = 0,
4687+ .wire4 = 1,
4688+};
4689+
4690+
4691+#if defined(CONFIG_MTD_DATAFLASH)
4692+static struct mtd_partition __initdata tt9200_flash_partitions[] =
4693+{
4694+ {
4695+ .name = "Darrell",
4696+ .offset = 0,
4697+ .size = 12 * 1056,
4698+ },
4699+ {
4700+ .name = "U-boot",
4701+ .offset = MTDPART_OFS_NXTBLK,
4702+ .size = 110 * 1056,
4703+ },
4704+ {
4705+ .name = "U-boot env",
4706+ .offset = MTDPART_OFS_NXTBLK,
4707+ .size = 8 * 1056,
4708+ },
4709+ {
4710+ .name = "Kernel",
4711+ .offset = MTDPART_OFS_NXTBLK,
4712+ .size = 1534 * 1056,
4713+ },
4714+ {
4715+ .name = "Filesystem",
4716+ .offset = MTDPART_OFS_NXTBLK,
4717+ .size = MTDPART_SIZ_FULL,
4718+ }
4719+};
4720+
4721+static struct flash_platform_data __initdata tt9200_flash_platform = {
4722+ .name = "SPI Dataflash",
4723+ .parts = tt9200_flash_partitions,
4724+ .nr_parts = ARRAY_SIZE(tt9200_flash_partitions)
4725+};
4726+
4727+#endif
4728+
4729+static struct spi_board_info __initdata tt9200_spi_devices[] = {
4730+ { /* DataFlash chip */
4731+ .modalias = "mtd_dataflash",
4732+ .chip_select = 0,
4733+ /* Errata #13 */
4734+ .max_speed_hz = 5 * 1000 * 1000,
4735+ .bus_num = 0,
4736+#if defined(CONFIG_MTD_DATAFLASH)
4737+ .platform_data = &tt9200_flash_platform,
4738+#endif
4739+ },
4740+};
4741+
4742+static struct gpio_led tt9200_leds[] = {
4743+ {
4744+ .name = "led0",
4745+ .gpio = AT91_PIN_PB27,
4746+ .active_low = 1,
4747+ .default_trigger = "heartbeat",
4748+ }
4749+};
4750+
4751+static void __init tt9200_board_init(void)
4752+{
4753+ /* Serial */
4754+ at91_add_device_serial();
4755+
4756+ /* Ethernet */
4757+ at91_add_device_eth(&tt9200_eth_data);
4758+
4759+ /* USB Host */
4760+ at91_add_device_usbh(&tt9200_usbh_data);
4761+
4762+ /* I2C */
4763+ at91_add_device_i2c(tt9200_i2c_devices, ARRAY_SIZE(tt9200_i2c_devices));
4764+
4765+ /* MMC */
4766+ at91_add_device_mmc(0, &tt9200_mmc_data);
4767+
4768+ /* LEDS */
4769+ at91_gpio_leds(tt9200_leds, ARRAY_SIZE(tt9200_leds));
4770+
4771+ /* SPI */
4772+ at91_add_device_spi(tt9200_spi_devices, ARRAY_SIZE(tt9200_spi_devices));
4773+}
4774+
4775+MACHINE_START(TT9200, "Toptech TT9200")
4776+ /* Maintainer: toptech.com.ar */
4777+ .phys_io = AT91_BASE_SYS,
4778+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
4779+ .boot_params = AT91_SDRAM_BASE + 0x100,
4780+ .timer = &at91rm9200_timer,
4781+ .map_io = tt9200_map_io,
4782+ .init_irq = tt9200_init_irq,
4783+ .init_machine = tt9200_board_init,
4784+MACHINE_END
4785+++ b/arch/arm/mach-at91/board-usb-a9260.c
4786@@ -0,0 +1,215 @@
4787+/*
4788+ * linux/arch/arm/mach-at91/board-usb-a9260.c
4789+ *
4790+ * Copyright (C) 2005 SAN People
4791+ * Copyright (C) 2006 Atmel
4792+ * Copyright (C) 2007 Calao-systems
4793+ *
4794+ * This program is free software; you can redistribute it and/or modify
4795+ * it under the terms of the GNU General Public License as published by
4796+ * the Free Software Foundation; either version 2 of the License, or
4797+ * (at your option) any later version.
4798+ *
4799+ * This program is distributed in the hope that it will be useful,
4800+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
4801+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4802+ * GNU General Public License for more details.
4803+ *
4804+ * You should have received a copy of the GNU General Public License
4805+ * along with this program; if not, write to the Free Software
4806+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4807+ */
4808+
4809+#include <linux/types.h>
4810+#include <linux/init.h>
4811+#include <linux/mm.h>
4812+#include <linux/module.h>
4813+#include <linux/platform_device.h>
4814+#include <linux/spi/spi.h>
4815+#include <linux/gpio_keys.h>
4816+#include <linux/input.h>
4817+#include <linux/clk.h>
4818+
4819+#include <asm/hardware.h>
4820+#include <asm/setup.h>
4821+#include <asm/mach-types.h>
4822+#include <asm/irq.h>
4823+
4824+#include <asm/mach/arch.h>
4825+#include <asm/mach/map.h>
4826+#include <asm/mach/irq.h>
4827+
4828+#include <asm/arch/board.h>
4829+#include <asm/arch/gpio.h>
4830+#include <asm/arch/at91_shdwc.h>
4831+
4832+#include "generic.h"
4833+
4834+
4835+static void __init ek_map_io(void)
4836+{
4837+ /* Initialize processor: 12.000 MHz crystal */
4838+ at91sam9260_initialize(12000000);
4839+
4840+ /* DGBU on ttyS0. (Rx & Tx only) */
4841+ at91_register_uart(0, 0, 0);
4842+
4843+ /* set serial console to ttyS0 (ie, DBGU) */
4844+ at91_set_serial_console(0);
4845+}
4846+
4847+static void __init ek_init_irq(void)
4848+{
4849+ at91sam9260_init_interrupts(NULL);
4850+}
4851+
4852+
4853+/*
4854+ * USB Host port
4855+ */
4856+static struct at91_usbh_data __initdata ek_usbh_data = {
4857+ .ports = 2,
4858+};
4859+
4860+/*
4861+ * USB Device port
4862+ */
4863+static struct at91_udc_data __initdata ek_udc_data = {
4864+ .vbus_pin = AT91_PIN_PC5,
4865+ .pullup_pin = 0, /* pull-up driven by UDC */
4866+};
4867+
4868+/*
4869+ * MACB Ethernet device
4870+ */
4871+static struct at91_eth_data __initdata ek_macb_data = {
4872+ .phy_irq_pin = AT91_PIN_PA31,
4873+ .is_rmii = 1,
4874+};
4875+
4876+/*
4877+ * NAND flash
4878+ */
4879+static struct mtd_partition __initdata ek_nand_partition[] = {
4880+ {
4881+ .name = "Uboot & Kernel",
4882+ .offset = 0x00000000,
4883+ .size = 16 * 1024 * 1024,
4884+ },
4885+ {
4886+ .name = "Root FS",
4887+ .offset = 0x01000000,
4888+ .size = 120 * 1024 * 1024,
4889+ },
4890+ {
4891+ .name = "FS",
4892+ .offset = 0x08800000,
4893+ .size = 120 * 1024 * 1024,
4894+ }
4895+};
4896+
4897+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
4898+{
4899+ *num_partitions = ARRAY_SIZE(ek_nand_partition);
4900+ return ek_nand_partition;
4901+}
4902+
4903+static struct at91_nand_data __initdata ek_nand_data = {
4904+ .ale = 21,
4905+ .cle = 22,
4906+// .det_pin = ... not connected
4907+ .rdy_pin = AT91_PIN_PC13,
4908+ .enable_pin = AT91_PIN_PC14,
4909+ .partition_info = nand_partitions,
4910+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
4911+ .bus_width_16 = 1,
4912+#else
4913+ .bus_width_16 = 0,
4914+#endif
4915+};
4916+
4917+/*
4918+ * GPIO Buttons
4919+ */
4920+
4921+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
4922+static struct gpio_keys_button ek_buttons[] = {
4923+ { /* USER PUSH BUTTON */
4924+ .code = KEY_ENTER,
4925+ .gpio = AT91_PIN_PB10,
4926+ .active_low = 1,
4927+ .desc = "user_pb",
4928+ .wakeup = 1,
4929+ }
4930+};
4931+
4932+static struct gpio_keys_platform_data ek_button_data = {
4933+ .buttons = ek_buttons,
4934+ .nbuttons = ARRAY_SIZE(ek_buttons),
4935+};
4936+
4937+static struct platform_device ek_button_device = {
4938+ .name = "gpio-keys",
4939+ .id = -1,
4940+ .num_resources = 0,
4941+ .dev = {
4942+ .platform_data = &ek_button_data,
4943+ }
4944+};
4945+
4946+static void __init ek_add_device_buttons(void)
4947+{
4948+ at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
4949+ at91_set_deglitch(AT91_PIN_PB10, 1);
4950+
4951+ platform_device_register(&ek_button_device);
4952+}
4953+#else
4954+static void __init ek_add_device_buttons(void) {}
4955+#endif
4956+
4957+/*
4958+ * LEDs
4959+ */
4960+static struct gpio_led ek_leds[] = {
4961+ { /* user_led (green) */
4962+ .name = "user_led",
4963+ .gpio = AT91_PIN_PB21,
4964+ .active_low = 0,
4965+ .default_trigger = "heartbeat",
4966+ }
4967+};
4968+
4969+static void __init ek_board_init(void)
4970+{
4971+ /* Serial */
4972+ at91_add_device_serial();
4973+ /* USB Host */
4974+ at91_add_device_usbh(&ek_usbh_data);
4975+ /* USB Device */
4976+ at91_add_device_udc(&ek_udc_data);
4977+ /* NAND */
4978+ at91_add_device_nand(&ek_nand_data);
4979+ /* I2C */
4980+ at91_add_device_i2c(NULL, 0);
4981+ /* Ethernet */
4982+ at91_add_device_eth(&ek_macb_data);
4983+ /* Push Buttons */
4984+ ek_add_device_buttons();
4985+ /* LEDs */
4986+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
4987+ /* shutdown controller, wakeup button (5 msec low) */
4988+ at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4989+ | AT91_SHDW_RTTWKEN);
4990+}
4991+
4992+MACHINE_START(USB_A9260, "CALAO USB_A9260")
4993+ /* Maintainer: calao-systems */
4994+ .phys_io = AT91_BASE_SYS,
4995+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
4996+ .boot_params = AT91_SDRAM_BASE + 0x100,
4997+ .timer = &at91sam926x_timer,
4998+ .map_io = ek_map_io,
4999+ .init_irq = ek_init_irq,
5000+ .init_machine = ek_board_init,
5001+MACHINE_END
5002+++ b/arch/arm/mach-at91/board-usb-a9263.c
5003@@ -0,0 +1,230 @@
5004+/*
5005+ * linux/arch/arm/mach-at91/board-usb-a9263.c
5006+ *
5007+ * Copyright (C) 2005 SAN People
5008+ * Copyright (C) 2007 Atmel Corporation.
5009+ * Copyright (C) 2007 Calao-systems
5010+ *
5011+ * This program is free software; you can redistribute it and/or modify
5012+ * it under the terms of the GNU General Public License as published by
5013+ * the Free Software Foundation; either version 2 of the License, or
5014+ * (at your option) any later version.
5015+ *
5016+ * This program is distributed in the hope that it will be useful,
5017+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
5018+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5019+ * GNU General Public License for more details.
5020+ *
5021+ * You should have received a copy of the GNU General Public License
5022+ * along with this program; if not, write to the Free Software
5023+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
5024+ */
5025+
5026+#include <linux/types.h>
5027+#include <linux/init.h>
5028+#include <linux/mm.h>
5029+#include <linux/module.h>
5030+#include <linux/platform_device.h>
5031+#include <linux/spi/spi.h>
5032+#include <linux/gpio_keys.h>
5033+#include <linux/input.h>
5034+
5035+#include <asm/hardware.h>
5036+#include <asm/setup.h>
5037+#include <asm/mach-types.h>
5038+#include <asm/irq.h>
5039+
5040+#include <asm/mach/arch.h>
5041+#include <asm/mach/map.h>
5042+#include <asm/mach/irq.h>
5043+
5044+#include <asm/arch/board.h>
5045+#include <asm/arch/gpio.h>
5046+#include <asm/arch/at91_shdwc.h>
5047+
5048+#include "generic.h"
5049+
5050+
5051+static void __init ek_map_io(void)
5052+{
5053+ /* Initialize processor: 12.00 MHz crystal */
5054+ at91sam9263_initialize(12000000);
5055+
5056+ /* DGBU on ttyS0. (Rx & Tx only) */
5057+ at91_register_uart(0, 0, 0);
5058+
5059+ /* set serial console to ttyS0 (ie, DBGU) */
5060+ at91_set_serial_console(0);
5061+}
5062+
5063+static void __init ek_init_irq(void)
5064+{
5065+ at91sam9263_init_interrupts(NULL);
5066+}
5067+
5068+
5069+/*
5070+ * USB Host port
5071+ */
5072+static struct at91_usbh_data __initdata ek_usbh_data = {
5073+ .ports = 2,
5074+};
5075+
5076+/*
5077+ * USB Device port
5078+ */
5079+static struct at91_udc_data __initdata ek_udc_data = {
5080+ .vbus_pin = AT91_PIN_PB11,
5081+ .pullup_pin = 0, /* pull-up driven by UDC */
5082+};
5083+
5084+/*
5085+ * SPI devices.
5086+ */
5087+static struct spi_board_info ek_spi_devices[] = {
5088+#if !defined(CONFIG_MMC_AT91)
5089+ { /* DataFlash chip */
5090+ .modalias = "mtd_dataflash",
5091+ .chip_select = 0,
5092+ .max_speed_hz = 15 * 1000 * 1000,
5093+ .bus_num = 0,
5094+ }
5095+#endif
5096+};
5097+
5098+/*
5099+ * MACB Ethernet device
5100+ */
5101+static struct at91_eth_data __initdata ek_macb_data = {
5102+ .phy_irq_pin = AT91_PIN_PE31,
5103+ .is_rmii = 1,
5104+};
5105+
5106+/*
5107+ * NAND flash
5108+ */
5109+static struct mtd_partition __initdata ek_nand_partition[] = {
5110+ {
5111+ .name = "Linux Kernel",
5112+ .offset = 0x00000000,
5113+ .size = 16 * 1024 * 1024,
5114+ },
5115+ {
5116+ .name = "Root FS",
5117+ .offset = 0x01000000,
5118+ .size = 120 * 1024 * 1024,
5119+ },
5120+ {
5121+ .name = "FS",
5122+ .offset = 0x08800000,
5123+ .size = 120 * 1024 * 1024,
5124+ }
5125+};
5126+
5127+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
5128+{
5129+ *num_partitions = ARRAY_SIZE(ek_nand_partition);
5130+ return ek_nand_partition;
5131+}
5132+
5133+static struct at91_nand_data __initdata ek_nand_data = {
5134+ .ale = 21,
5135+ .cle = 22,
5136+// .det_pin = ... not connected
5137+ .rdy_pin = AT91_PIN_PA22,
5138+ .enable_pin = AT91_PIN_PD15,
5139+ .partition_info = nand_partitions,
5140+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
5141+ .bus_width_16 = 1,
5142+#else
5143+ .bus_width_16 = 0,
5144+#endif
5145+};
5146+
5147+/*
5148+ * GPIO Buttons
5149+ */
5150+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
5151+static struct gpio_keys_button ek_buttons[] = {
5152+ { /* USER PUSH BUTTON */
5153+ .code = KEY_ENTER,
5154+ .gpio = AT91_PIN_PB10,
5155+ .active_low = 1,
5156+ .desc = "user_pb",
5157+ .wakeup = 1,
5158+ }
5159+};
5160+
5161+static struct gpio_keys_platform_data ek_button_data = {
5162+ .buttons = ek_buttons,
5163+ .nbuttons = ARRAY_SIZE(ek_buttons),
5164+};
5165+
5166+static struct platform_device ek_button_device = {
5167+ .name = "gpio-keys",
5168+ .id = -1,
5169+ .num_resources = 0,
5170+ .dev = {
5171+ .platform_data = &ek_button_data,
5172+ }
5173+};
5174+
5175+static void __init ek_add_device_buttons(void)
5176+{
5177+ at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
5178+ at91_set_deglitch(AT91_PIN_PB10, 1);
5179+
5180+ platform_device_register(&ek_button_device);
5181+}
5182+#else
5183+static void __init ek_add_device_buttons(void) {}
5184+#endif
5185+
5186+/*
5187+ * LEDs
5188+ */
5189+static struct gpio_led ek_leds[] = {
5190+ { /* user_led (green) */
5191+ .name = "user_led",
5192+ .gpio = AT91_PIN_PB21,
5193+ .active_low = 1,
5194+ .default_trigger = "heartbeat",
5195+ }
5196+};
5197+
5198+
5199+static void __init ek_board_init(void)
5200+{
5201+ /* Serial */
5202+ at91_add_device_serial();
5203+ /* USB Host */
5204+ at91_add_device_usbh(&ek_usbh_data);
5205+ /* USB Device */
5206+ at91_add_device_udc(&ek_udc_data);
5207+ /* SPI */
5208+ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
5209+ /* Ethernet */
5210+ at91_add_device_eth(&ek_macb_data);
5211+ /* NAND */
5212+ at91_add_device_nand(&ek_nand_data);
5213+ /* I2C */
5214+ at91_add_device_i2c(NULL, 0);
5215+ /* Push Buttons */
5216+ ek_add_device_buttons();
5217+ /* LEDs */
5218+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
5219+ /* shutdown controller, wakeup button (5 msec low) */
5220+ at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
5221+ | AT91_SHDW_RTTWKEN);
5222+}
5223+
5224+MACHINE_START(USB_A9263, "CALAO USB_A9263")
5225+ /* Maintainer: calao-systems */
5226+ .phys_io = AT91_BASE_SYS,
5227+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
5228+ .boot_params = AT91_SDRAM_BASE + 0x100,
5229+ .timer = &at91sam926x_timer,
5230+ .map_io = ek_map_io,
5231+ .init_irq = ek_init_irq,
5232+ .init_machine = ek_board_init,
5233+MACHINE_END
5234+++ b/arch/arm/mach-at91/clock.c
5235@@ -32,6 +32,7 @@
5236 #include <asm/arch/cpu.h>
5237
5238 #include "clock.h"
5239+#include "generic.h"
5240
5241
5242 /*
5243@@ -113,12 +114,34 @@ static void pmc_sys_mode(struct clk *clk
5244         at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
5245 }
5246
5247+static void pmc_uckr_mode(struct clk *clk, int is_on)
5248+{
5249+ unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
5250+
5251+ if (is_on) {
5252+ is_on = AT91_PMC_LOCKU;
5253+ at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
5254+ } else
5255+ at91_sys_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
5256+
5257+ do {
5258+ cpu_relax();
5259+ } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
5260+}
5261+
5262 /* USB function clocks (PLLB must be 48 MHz) */
5263 static struct clk udpck = {
5264     .name = "udpck",
5265     .parent = &pllb,
5266     .mode = pmc_sys_mode,
5267 };
5268+static struct clk utmi_clk = {
5269+ .name = "utmi_clk",
5270+ .parent = &main_clk,
5271+ .pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */
5272+ .mode = pmc_uckr_mode,
5273+ .type = CLK_TYPE_PLL,
5274+};
5275 static struct clk uhpck = {
5276     .name = "uhpck",
5277     .parent = &pllb,
5278@@ -254,6 +277,23 @@ EXPORT_SYMBOL(clk_get_rate);
5279
5280 /*------------------------------------------------------------------------*/
5281
5282+#ifdef CONFIG_PM
5283+
5284+int clk_must_disable(struct clk *clk)
5285+{
5286+ if (!at91_suspend_entering_slow_clock())
5287+ return 0;
5288+
5289+ while (clk->parent)
5290+ clk = clk->parent;
5291+ return clk != &clk32k;
5292+}
5293+EXPORT_SYMBOL(clk_must_disable);
5294+
5295+#endif
5296+
5297+/*------------------------------------------------------------------------*/
5298+
5299 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
5300
5301 /*
5302@@ -362,7 +402,7 @@ static void __init init_programmable_clo
5303
5304 static int at91_clk_show(struct seq_file *s, void *unused)
5305 {
5306- u32 scsr, pcsr, sr;
5307+ u32 scsr, pcsr, uckr = 0, sr;
5308     struct clk *clk;
5309
5310     seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
5311@@ -370,7 +410,10 @@ static int at91_clk_show(struct seq_file
5312     seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR));
5313     seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
5314     seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
5315- seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
5316+ if (!cpu_is_at91sam9rl())
5317+ seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
5318+ if (cpu_is_at91cap9() || cpu_is_at91sam9rl())
5319+ seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR));
5320     seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
5321     seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
5322
5323@@ -383,6 +426,8 @@ static int at91_clk_show(struct seq_file
5324             state = (scsr & clk->pmc_mask) ? "on" : "off";
5325         else if (clk->mode == pmc_periph_mode)
5326             state = (pcsr & clk->pmc_mask) ? "on" : "off";
5327+ else if (clk->mode == pmc_uckr_mode)
5328+ state = (uckr & clk->pmc_mask) ? "on" : "off";
5329         else if (clk->pmc_mask)
5330             state = (sr & clk->pmc_mask) ? "on" : "off";
5331         else if (clk == &clk32k || clk == &main_clk)
5332@@ -583,6 +628,17 @@ int __init at91_clock_init(unsigned long
5333     uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
5334
5335     /*
5336+ * USB HS clock init
5337+ */
5338+ if (cpu_is_at91cap9() || cpu_is_at91sam9rl()) {
5339+ /*
5340+ * multiplier is hard-wired to 40
5341+ * (obtain the USB High Speed 480 MHz when input is 12 MHz)
5342+ */
5343+ utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz;
5344+ }
5345+
5346+ /*
5347      * MCK and CPU derive from one of those primary clocks.
5348      * For now, assume this parentage won't change.
5349      */
5350@@ -599,6 +655,9 @@ int __init at91_clock_init(unsigned long
5351     for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
5352         list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
5353
5354+ if (cpu_is_at91cap9() || cpu_is_at91sam9rl())
5355+ list_add_tail(&utmi_clk.node, &clocks);
5356+
5357     /* MCK and CPU clock are "always on" */
5358     clk_enable(&mck);
5359
5360+++ b/arch/arm/mach-at91/generic.h
5361@@ -41,6 +41,7 @@ extern void __init at91_clock_associate(
5362  /* Power Management */
5363 extern void at91_irq_suspend(void);
5364 extern void at91_irq_resume(void);
5365+extern int at91_suspend_entering_slow_clock(void);
5366
5367  /* GPIO */
5368 #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
5369+++ b/arch/arm/mach-at91/gpio.c
5370@@ -490,7 +490,8 @@ postcore_initcall(at91_gpio_debugfs_init
5371
5372 /*--------------------------------------------------------------------------*/
5373
5374-/* This lock class tells lockdep that GPIO irqs are in a different
5375+/*
5376+ * This lock class tells lockdep that GPIO irqs are in a different
5377  * category than their parents, so it won't report false recursion.
5378  */
5379 static struct lock_class_key gpio_lock_class;
5380@@ -557,6 +558,7 @@ void __init at91_gpio_init(struct at91_g
5381         data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS;
5382
5383         /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
5384+ /* AT91CAP9_ID_PIOABCD groups PIOA, PIOB, PIOC, PIOD */
5385         if (last && last->id == data->id)
5386             last->next = data;
5387     }
5388+++ b/arch/arm/mach-at91/ics1523.c
5389@@ -0,0 +1,208 @@
5390+/*
5391+ * arch/arm/mach-at91rm9200/ics1523.c
5392+ *
5393+ * Copyright (C) 2003 ATMEL Rousset
5394+ *
5395+ * This program is free software; you can redistribute it and/or modify
5396+ * it under the terms of the GNU General Public License as published by
5397+ * the Free Software Foundation; either version 2 of the License, or
5398+ * (at your option) any later version.
5399+ *
5400+ * This program is distributed in the hope that it will be useful,
5401+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
5402+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5403+ * GNU General Public License for more details.
5404+ *
5405+ * You should have received a copy of the GNU General Public License
5406+ * along with this program; if not, write to the Free Software
5407+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
5408+ */
5409+
5410+#include <asm/hardware.h>
5411+#include <asm/io.h>
5412+
5413+#include <linux/clk.h>
5414+#include <linux/delay.h>
5415+#include <linux/err.h>
5416+#include <linux/init.h>
5417+#include <linux/kernel.h>
5418+
5419+#include <asm/arch/ics1523.h>
5420+#include <asm/arch/at91_twi.h>
5421+#include <asm/arch/gpio.h>
5422+
5423+/* TWI Errors */
5424+#define AT91_TWI_ERROR (AT91_TWI_NACK | AT91_TWI_UNRE | AT91_TWI_OVRE)
5425+
5426+
5427+static void __iomem *twi_base;
5428+
5429+#define at91_twi_read(reg) __raw_readl(twi_base + (reg))
5430+#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
5431+
5432+
5433+/* -----------------------------------------------------------------------------
5434+ * Initialization of TWI CLOCK
5435+ * ----------------------------------------------------------------------------- */
5436+
5437+static void at91_ics1523_SetTwiClock(unsigned int mck_khz)
5438+{
5439+ int sclock;
5440+
5441+ /* Here, CKDIV = 1 and CHDIV = CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
5442+ sclock = (10*mck_khz / ICS_TRANSFER_RATE);
5443+ if (sclock % 10 >= 5)
5444+ sclock = (sclock /10) - 5;
5445+ else
5446+ sclock = (sclock /10)- 6;
5447+ sclock = (sclock + (4 - sclock %4)) >> 2; /* div 4 */
5448+
5449+ at91_twi_write(AT91_TWI_CWGR, 0x00010000 | sclock | (sclock << 8));
5450+}
5451+
5452+/* -----------------------------------------------------------------------------
5453+ * Read a byte with TWI Interface from the Clock Generator ICS1523
5454+ * ----------------------------------------------------------------------------- */
5455+
5456+static int at91_ics1523_ReadByte(unsigned char reg_address, unsigned char *data_in)
5457+{
5458+ int Status, nb_trial;
5459+
5460+ at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
5461+ at91_twi_write(AT91_TWI_IADR, reg_address);
5462+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
5463+
5464+ /* Program temporizing period (300us) */
5465+ udelay(300);
5466+
5467+ /* Wait TXcomplete ... */
5468+ nb_trial = 0;
5469+ Status = at91_twi_read(AT91_TWI_SR);
5470+ while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
5471+ nb_trial++;
5472+ Status = at91_twi_read(AT91_TWI_SR);
5473+ }
5474+
5475+ if (Status & AT91_TWI_TXCOMP) {
5476+ *data_in = (unsigned char) at91_twi_read(AT91_TWI_RHR);
5477+ return ICS1523_ACCESS_OK;
5478+ }
5479+ else
5480+ return ICS1523_ACCESS_ERROR;
5481+}
5482+
5483+/* -----------------------------------------------------------------------------
5484+ * Write a byte with TWI Interface to the Clock Generator ICS1523
5485+ * ----------------------------------------------------------------------------- */
5486+
5487+static int at91_ics1523_WriteByte(unsigned char reg_address, unsigned char data_out)
5488+{
5489+ int Status, nb_trial;
5490+
5491+ at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
5492+ at91_twi_write(AT91_TWI_IADR, reg_address);
5493+ at91_twi_write(AT91_TWI_THR, data_out);
5494+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
5495+
5496+ /* Program temporizing period (300us) */
5497+ udelay(300);
5498+
5499+ nb_trial = 0;
5500+ Status = at91_twi_read(AT91_TWI_SR);
5501+ while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
5502+ nb_trial++;
5503+ if (Status & AT91_TWI_ERROR) {
5504+ /* If Underrun OR NACK - Start again */
5505+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
5506+
5507+ /* Program temporizing period (300us) */
5508+ udelay(300);
5509+ }
5510+ Status = at91_twi_read(AT91_TWI_SR);
5511+ };
5512+
5513+ if (Status & AT91_TWI_TXCOMP)
5514+ return ICS1523_ACCESS_OK;
5515+ else
5516+ return ICS1523_ACCESS_ERROR;
5517+}
5518+
5519+/* -----------------------------------------------------------------------------
5520+ * Initialization of the Clock Generator ICS1523
5521+ * ----------------------------------------------------------------------------- */
5522+
5523+int at91_ics1523_init(void)
5524+{
5525+ int nb_trial;
5526+ int ack = ICS1523_ACCESS_OK;
5527+ unsigned int status = 0xffffffff;
5528+ struct clk *twi_clk;
5529+
5530+ /* Map in TWI peripheral */
5531+ twi_base = ioremap(AT91RM9200_BASE_TWI, SZ_16K);
5532+ if (!twi_base)
5533+ return -ENOMEM;
5534+
5535+ /* pins used for TWI interface */
5536+ at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
5537+ at91_set_multi_drive(AT91_PIN_PA25, 1);
5538+ at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
5539+ at91_set_multi_drive(AT91_PIN_PA26, 1);
5540+
5541+ /* Enable the TWI clock */
5542+ twi_clk = clk_get(NULL, "twi_clk");
5543+ if (IS_ERR(twi_clk))
5544+ return ICS1523_ACCESS_ERROR;
5545+ clk_enable(twi_clk);
5546+
5547+ /* Disable interrupts */
5548+ at91_twi_write(AT91_TWI_IDR, -1);
5549+
5550+ /* Reset peripheral */
5551+ at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);
5552+
5553+ /* Set Master mode */
5554+ at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);
5555+
5556+ /* Set TWI Clock Waveform Generator Register */
5557+ at91_ics1523_SetTwiClock(60000); /* MCK in KHz = 60000 KHz */
5558+
5559+ /* ICS1523 Initialisation */
5560+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0);
5561+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK));
5562+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F));
5563+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0);
5564+
5565+ nb_trial = 0;
5566+ do {
5567+ nb_trial++;
5568+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/));
5569+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD));
5570+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */
5571+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00);
5572+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR));
5573+
5574+ /* Program 1ms temporizing period */
5575+ mdelay(1);
5576+
5577+ at91_ics1523_ReadByte ((unsigned char) ICS_SR, (char *)&status);
5578+ } while (!((unsigned int) status & (unsigned int) ICS_PLLLOCK) && (nb_trial < 10));
5579+
5580+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */
5581+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR));
5582+
5583+ /* Program 1ms temporizing period */
5584+ mdelay(1);
5585+
5586+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00);
5587+
5588+ /* Program 1ms temporizing period */
5589+ mdelay(1);
5590+
5591+ /* All done - cleanup */
5592+ iounmap(twi_base);
5593+ clk_disable(twi_clk);
5594+ clk_put(twi_clk);
5595+
5596+ return ack;
5597+}
5598+++ b/arch/arm/mach-at91/pm.c
5599@@ -26,12 +26,144 @@
5600 #include <asm/mach-types.h>
5601
5602 #include <asm/arch/at91_pmc.h>
5603-#include <asm/arch/at91rm9200_mc.h>
5604 #include <asm/arch/gpio.h>
5605 #include <asm/arch/cpu.h>
5606
5607 #include "generic.h"
5608
5609+#ifdef CONFIG_ARCH_AT91RM9200
5610+#include <asm/arch/at91rm9200_mc.h>
5611+
5612+/*
5613+ * The AT91RM9200 goes into self-refresh mode with this command, and will
5614+ * terminate self-refresh automatically on the next SDRAM access.
5615+ */
5616+#define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1)
5617+#define sdram_selfrefresh_disable() do {} while (0)
5618+
5619+#elif defined(CONFIG_ARCH_AT91CAP9)
5620+#include <asm/arch/at91cap9_ddrsdr.h>
5621+
5622+static u32 saved_lpr;
5623+
5624+static inline void sdram_selfrefresh_enable(void)
5625+{
5626+ u32 lpr;
5627+
5628+ saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR);
5629+
5630+ lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
5631+ at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
5632+}
5633+
5634+#define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr)
5635+
5636+#else
5637+#include <asm/arch/at91sam9_sdramc.h>
5638+
5639+#ifdef CONFIG_ARCH_AT91SAM9263
5640+/*
5641+ * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
5642+ * handle those cases both here and in the Suspend-To-RAM support.
5643+ */
5644+#define AT91_SDRAMC AT91_SDRAMC0
5645+#warning Assuming EB1 SDRAM controller is *NOT* used
5646+#endif
5647+
5648+static u32 saved_lpr;
5649+
5650+static inline void sdram_selfrefresh_enable(void)
5651+{
5652+ u32 lpr;
5653+
5654+ saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
5655+
5656+ lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
5657+ at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
5658+}
5659+
5660+#define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
5661+
5662+/*
5663+ * FIXME: The AT91SAM9263 has a second EBI controller which may have
5664+ * additional SDRAM. pm_slowclock.S will require a similar fix.
5665+ */
5666+
5667+#endif
5668+
5669+
5670+/*
5671+ * Show the reason for the previous system reset.
5672+ */
5673+#if defined(AT91_SHDWC)
5674+
5675+#include <asm/arch/at91_rstc.h>
5676+#include <asm/arch/at91_shdwc.h>
5677+
5678+static void __init show_reset_status(void)
5679+{
5680+ static char reset[] __initdata = "reset";
5681+
5682+ static char general[] __initdata = "general";
5683+ static char wakeup[] __initdata = "wakeup";
5684+ static char watchdog[] __initdata = "watchdog";
5685+ static char software[] __initdata = "software";
5686+ static char user[] __initdata = "user";
5687+ static char unknown[] __initdata = "unknown";
5688+
5689+ static char signal[] __initdata = "signal";
5690+ static char rtc[] __initdata = "rtc";
5691+ static char rtt[] __initdata = "rtt";
5692+ static char restore[] __initdata = "power-restored";
5693+
5694+ char *reason, *r2 = reset;
5695+ u32 reset_type, wake_type;
5696+
5697+ reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
5698+ wake_type = at91_sys_read(AT91_SHDW_SR);
5699+
5700+ switch (reset_type) {
5701+ case AT91_RSTC_RSTTYP_GENERAL:
5702+ reason = general;
5703+ break;
5704+ case AT91_RSTC_RSTTYP_WAKEUP:
5705+ /* board-specific code enabled the wakeup sources */
5706+ reason = wakeup;
5707+
5708+ /* "wakeup signal" */
5709+ if (wake_type & AT91_SHDW_WAKEUP0)
5710+ r2 = signal;
5711+ else {
5712+ r2 = reason;
5713+ if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
5714+ reason = rtt;
5715+ else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
5716+ reason = rtc;
5717+ else if (wake_type == 0) /* power-restored wakeup */
5718+ reason = restore;
5719+ else /* unknown wakeup */
5720+ reason = unknown;
5721+ }
5722+ break;
5723+ case AT91_RSTC_RSTTYP_WATCHDOG:
5724+ reason = watchdog;
5725+ break;
5726+ case AT91_RSTC_RSTTYP_SOFTWARE:
5727+ reason = software;
5728+ break;
5729+ case AT91_RSTC_RSTTYP_USER:
5730+ reason = user;
5731+ break;
5732+ default:
5733+ reason = unknown;
5734+ break;
5735+ }
5736+ pr_info("AT91: Starting after %s %s\n", reason, r2);
5737+}
5738+#else
5739+static void __init show_reset_status(void) {}
5740+#endif
5741+
5742
5743 static int at91_pm_valid_state(suspend_state_t state)
5744 {
5745@@ -62,6 +194,7 @@ static int at91_pm_begin(suspend_state_t
5746  * Verify that all the clocks are correct before entering
5747  * slow-clock mode.
5748  */
5749+#warning "This should probably be moved to clocks.c"
5750 static int at91_pm_verify_clocks(void)
5751 {
5752     unsigned long scsr;
5753@@ -107,24 +240,24 @@ static int at91_pm_verify_clocks(void)
5754 }
5755
5756 /*
5757- * Call this from platform driver suspend() to see how deeply to suspend.
5758+ * This is called from clk_must_disable(), to see how deeply to suspend.
5759  * For example, some controllers (like OHCI) need one of the PLL clocks
5760  * in order to act as a wakeup source, and those are not available when
5761  * going into slow clock mode.
5762- *
5763- * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
5764- * the very same problem (but not using at91 main_clk), and it'd be better
5765- * to add one generic API rather than lots of platform-specific ones.
5766  */
5767 int at91_suspend_entering_slow_clock(void)
5768 {
5769     return (target_state == PM_SUSPEND_MEM);
5770 }
5771-EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
5772
5773
5774 static void (*slow_clock)(void);
5775
5776+#ifdef CONFIG_AT91_SLOW_CLOCK
5777+extern void at91_slow_clock(void);
5778+extern u32 at91_slow_clock_sz;
5779+#endif
5780+
5781
5782 static int at91_pm_enter(suspend_state_t state)
5783 {
5784@@ -158,11 +291,14 @@ static int at91_pm_enter(suspend_state_t
5785              * turning off the main oscillator; reverse on wakeup.
5786              */
5787             if (slow_clock) {
5788+#ifdef CONFIG_AT91_SLOW_CLOCK
5789+ /* copy slow_clock handler to SRAM, and call it */
5790+ memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
5791+#endif
5792                 slow_clock();
5793                 break;
5794             } else {
5795- /* DEVELOPMENT ONLY */
5796- pr_info("AT91: PM - no slow clock mode yet ...\n");
5797+ pr_info("AT91: PM - no slow clock mode enabled ...\n");
5798                 /* FALLTHROUGH leaving master clock alone */
5799             }
5800
5801@@ -175,13 +311,15 @@ static int at91_pm_enter(suspend_state_t
5802         case PM_SUSPEND_STANDBY:
5803             /*
5804              * NOTE: the Wait-for-Interrupt instruction needs to be
5805- * in icache so the SDRAM stays in self-refresh mode until
5806- * the wakeup IRQ occurs.
5807+ * in icache so no SDRAM accesses are needed until the
5808+ * wakeup IRQ occurs and self-refresh is terminated.
5809              */
5810             asm("b 1f; .align 5; 1:");
5811             asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
5812- at91_sys_write(AT91_SDRAMC_SRR, 1); /* self-refresh mode */
5813- /* fall though to next state */
5814+ sdram_selfrefresh_enable();
5815+ asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
5816+ sdram_selfrefresh_disable();
5817+ break;
5818
5819         case PM_SUSPEND_ON:
5820             asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
5821@@ -196,6 +334,7 @@ static int at91_pm_enter(suspend_state_t
5822             at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
5823
5824 error:
5825+ sdram_selfrefresh_disable();
5826     target_state = PM_SUSPEND_ON;
5827     at91_irq_resume();
5828     at91_gpio_resume();
5829@@ -220,21 +359,20 @@ static struct platform_suspend_ops at91_
5830
5831 static int __init at91_pm_init(void)
5832 {
5833- printk("AT91: Power Management\n");
5834-
5835-#ifdef CONFIG_AT91_PM_SLOW_CLOCK
5836- /* REVISIT allocations of SRAM should be dynamically managed.
5837- * FIQ handlers and other components will want SRAM/TCM too...
5838- */
5839- slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
5840- memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
5841+#ifdef CONFIG_AT91_SLOW_CLOCK
5842+ slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
5843 #endif
5844
5845- /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */
5846+ pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
5847+
5848+#ifdef CONFIG_ARCH_AT91RM9200
5849+ /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
5850     at91_sys_write(AT91_SDRAMC_LPR, 0);
5851+#endif
5852
5853     suspend_set_ops(&at91_pm_ops);
5854
5855+ show_reset_status();
5856     return 0;
5857 }
5858 arch_initcall(at91_pm_init);
5859+++ b/arch/arm/mach-at91/pm_slowclock.S
5860@@ -0,0 +1,283 @@
5861+/*
5862+ * arch/arm/mach-at91/pm_slow_clock.S
5863+ *
5864+ * Copyright (C) 2006 Savin Zlobec
5865+ *
5866+ * AT91SAM9 support:
5867+ * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee
5868+ *
5869+ * This program is free software; you can redistribute it and/or modify
5870+ * it under the terms of the GNU General Public License version 2 as
5871+ * published by the Free Software Foundation.
5872+ *
5873+ */
5874+
5875+#include <linux/linkage.h>
5876+#include <asm/hardware.h>
5877+#include <asm/arch/at91_pmc.h>
5878+
5879+#ifdef CONFIG_ARCH_AT91RM9200
5880+#include <asm/arch/at91rm9200_mc.h>
5881+#elif defined(CONFIG_ARCH_AT91CAP9)
5882+#include <asm/arch/at91cap9_ddrsdr.h>
5883+#else
5884+#include <asm/arch/at91sam9_sdramc.h>
5885+#endif
5886+
5887+
5888+#ifdef CONFIG_ARCH_AT91SAM9263
5889+/*
5890+ * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
5891+ * handle those cases both here and in the Suspend-To-RAM support.
5892+ */
5893+#define AT91_SDRAMC AT91_SDRAMC0
5894+#warning Assuming EB1 SDRAM controller is *NOT* used
5895+#endif
5896+
5897+/*
5898+ * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master
5899+ * clock during suspend by adjusting its prescalar and divisor.
5900+ * NOTE: This hasn't been shown to be stable on SAM9s; and on the RM9200 there
5901+ * are errata regarding adjusting the prescalar and divisor.
5902+ */
5903+#undef SLOWDOWN_MASTER_CLOCK
5904+
5905+#define MCKRDY_TIMEOUT 1000
5906+#define MOSCRDY_TIMEOUT 1000
5907+#define PLLALOCK_TIMEOUT 1000
5908+#define PLLBLOCK_TIMEOUT 1000
5909+
5910+
5911+/*
5912+ * Wait until master clock is ready (after switching master clock source)
5913+ */
5914+ .macro wait_mckrdy
5915+ mov r4, #MCKRDY_TIMEOUT
5916+1: sub r4, r4, #1
5917+ cmp r4, #0
5918+ beq 2f
5919+ ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
5920+ tst r3, #AT91_PMC_MCKRDY
5921+ beq 1b
5922+2:
5923+ .endm
5924+
5925+/*
5926+ * Wait until master oscillator has stabilized.
5927+ */
5928+ .macro wait_moscrdy
5929+ mov r4, #MOSCRDY_TIMEOUT
5930+1: sub r4, r4, #1
5931+ cmp r4, #0
5932+ beq 2f
5933+ ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
5934+ tst r3, #AT91_PMC_MOSCS
5935+ beq 1b
5936+2:
5937+ .endm
5938+
5939+/*
5940+ * Wait until PLLA has locked.
5941+ */
5942+ .macro wait_pllalock
5943+ mov r4, #PLLALOCK_TIMEOUT
5944+1: sub r4, r4, #1
5945+ cmp r4, #0
5946+ beq 2f
5947+ ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
5948+ tst r3, #AT91_PMC_LOCKA
5949+ beq 1b
5950+2:
5951+ .endm
5952+
5953+/*
5954+ * Wait until PLLB has locked.
5955+ */
5956+ .macro wait_pllblock
5957+ mov r4, #PLLBLOCK_TIMEOUT
5958+1: sub r4, r4, #1
5959+ cmp r4, #0
5960+ beq 2f
5961+ ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
5962+ tst r3, #AT91_PMC_LOCKB
5963+ beq 1b
5964+2:
5965+ .endm
5966+
5967+ .text
5968+
5969+ENTRY(at91_slow_clock)
5970+ /* Save registers on stack */
5971+ stmfd sp!, {r0 - r12, lr}
5972+
5973+ /*
5974+ * Register usage:
5975+ * R1 = Base address of AT91_PMC
5976+ * R2 = Base address of AT91_SDRAMC (or AT91_SYS on AT91RM9200)
5977+ * R3 = temporary register
5978+ * R4 = temporary register
5979+ */
5980+ ldr r1, .at91_va_base_pmc
5981+ ldr r2, .at91_va_base_sdramc
5982+
5983+ /* Drain write buffer */
5984+ mcr p15, 0, r0, c7, c10, 4
5985+
5986+#ifdef CONFIG_ARCH_AT91RM9200
5987+ /* Put SDRAM in self-refresh mode */
5988+ mov r3, #1
5989+ str r3, [r2, #AT91_SDRAMC_SRR]
5990+#elif defined(CONFIG_ARCH_AT91CAP9)
5991+ /* Enable SDRAM self-refresh mode */
5992+ ldr r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
5993+ str r3, .saved_sam9_lpr
5994+
5995+ mov r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
5996+ str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
5997+#else
5998+ /* Enable SDRAM self-refresh mode */
5999+ ldr r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
6000+ str r3, .saved_sam9_lpr
6001+
6002+ mov r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
6003+ str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
6004+#endif
6005+
6006+ /* Save Master clock setting */
6007+ ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6008+ str r3, .saved_mckr
6009+
6010+ /*
6011+ * Set the Master clock source to slow clock
6012+ */
6013+ bic r3, r3, #AT91_PMC_CSS
6014+ str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6015+
6016+ wait_mckrdy
6017+
6018+#ifdef SLOWDOWN_MASTER_CLOCK
6019+ /*
6020+ * Set the Master Clock PRES and MDIV fields.
6021+ *
6022+ * See AT91RM9200 errata #27 and #28 for details.
6023+ */
6024+ mov r3, #0
6025+ str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6026+
6027+ wait_mckrdy
6028+#endif
6029+
6030+ /* Save PLLA setting and disable it */
6031+ ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
6032+ str r3, .saved_pllar
6033+
6034+ mov r3, #AT91_PMC_PLLCOUNT
6035+ orr r3, r3, #(1 << 29) /* bit 29 always set */
6036+ str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
6037+
6038+ wait_pllalock
6039+
6040+ /* Save PLLB setting and disable it */
6041+ ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
6042+ str r3, .saved_pllbr
6043+
6044+ mov r3, #AT91_PMC_PLLCOUNT
6045+ str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
6046+
6047+ wait_pllblock
6048+
6049+ /* Turn off the main oscillator */
6050+ ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
6051+ bic r3, r3, #AT91_PMC_MOSCEN
6052+ str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
6053+
6054+ /* Wait for interrupt */
6055+ mcr p15, 0, r0, c7, c0, 4
6056+
6057+ /* Turn on the main oscillator */
6058+ ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
6059+ orr r3, r3, #AT91_PMC_MOSCEN
6060+ str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
6061+
6062+ wait_moscrdy
6063+
6064+ /* Restore PLLB setting */
6065+ ldr r3, .saved_pllbr
6066+ str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
6067+
6068+ wait_pllblock
6069+
6070+ /* Restore PLLA setting */
6071+ ldr r3, .saved_pllar
6072+ str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
6073+
6074+ wait_pllalock
6075+
6076+#ifdef SLOWDOWN_MASTER_CLOCK
6077+ /*
6078+ * First set PRES if it was not 0,
6079+ * than set CSS and MDIV fields.
6080+ *
6081+ * See AT91RM9200 errata #27 and #28 for details.
6082+ */
6083+ ldr r3, .saved_mckr
6084+ tst r3, #AT91_PMC_PRES
6085+ beq 2f
6086+ and r3, r3, #AT91_PMC_PRES
6087+ str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6088+
6089+ wait_mckrdy
6090+#endif
6091+
6092+ /*
6093+ * Restore master clock setting
6094+ */
6095+2: ldr r3, .saved_mckr
6096+ str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6097+
6098+ wait_mckrdy
6099+
6100+#ifdef CONFIG_ARCH_AT91RM9200
6101+ /* Do nothing - self-refresh is automatically disabled. */
6102+#elif defined(CONFIG_ARCH_AT91CAP9)
6103+ /* Restore LPR on AT91CAP9 */
6104+ ldr r3, .saved_sam9_lpr
6105+ str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
6106+#else
6107+ /* Restore LPR on AT91SAM9 */
6108+ ldr r3, .saved_sam9_lpr
6109+ str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
6110+#endif
6111+
6112+ /* Restore registers, and return */
6113+ ldmfd sp!, {r0 - r12, pc}
6114+
6115+
6116+.saved_mckr:
6117+ .word 0
6118+
6119+.saved_pllar:
6120+ .word 0
6121+
6122+.saved_pllbr:
6123+ .word 0
6124+
6125+.saved_sam9_lpr:
6126+ .word 0
6127+
6128+.at91_va_base_pmc:
6129+ .word AT91_VA_BASE_SYS + AT91_PMC
6130+
6131+#ifdef CONFIG_ARCH_AT91RM9200
6132+.at91_va_base_sdramc:
6133+ .word AT91_VA_BASE_SYS
6134+#elif defined(CONFIG_ARCH_AT91CAP9)
6135+.at91_va_base_sdramc:
6136+ .word AT91_VA_BASE_SYS + AT91_DDRSDRC
6137+#else
6138+.at91_va_base_sdramc:
6139+ .word AT91_VA_BASE_SYS + AT91_SDRAMC
6140+#endif
6141+
6142+ENTRY(at91_slow_clock_sz)
6143+ .word .-at91_slow_clock
6144+++ b/arch/arm/mach-ks8695/Makefile
6145@@ -11,5 +11,8 @@ obj- :=
6146 # PCI support is optional
6147 obj-$(CONFIG_PCI) += pci.o
6148
6149+# LEDs
6150+obj-$(CONFIG_LEDS) += leds.o
6151+
6152 # Board-specific support
6153 obj-$(CONFIG_MACH_KS8695) += board-micrel.o
6154+++ b/arch/arm/mach-ks8695/devices.c
6155@@ -176,6 +176,27 @@ static void __init ks8695_add_device_wat
6156 #endif
6157
6158
6159+/* --------------------------------------------------------------------
6160+ * LEDs
6161+ * -------------------------------------------------------------------- */
6162+
6163+#if defined(CONFIG_LEDS)
6164+short ks8695_leds_cpu = -1;
6165+short ks8695_leds_timer = -1;
6166+
6167+void __init ks8695_init_leds(u8 cpu_led, u8 timer_led)
6168+{
6169+ /* Enable GPIO to access the LEDs */
6170+ gpio_direction_output(cpu_led, 1);
6171+ gpio_direction_output(timer_led, 1);
6172+
6173+ ks8695_leds_cpu = cpu_led;
6174+ ks8695_leds_timer = timer_led;
6175+}
6176+#else
6177+void __init ks8695_init_leds(u8 cpu_led, u8 timer_led) {}
6178+#endif
6179+
6180 /* -------------------------------------------------------------------- */
6181
6182 /*
6183+++ b/arch/arm/mach-ks8695/gpio.c
6184@@ -136,9 +136,9 @@ int __init_or_module gpio_direction_outp
6185     /* set line state */
6186     x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
6187     if (state)
6188- x |= (1 << pin);
6189+ x |= IOPD_(pin);
6190     else
6191- x &= ~(1 << pin);
6192+ x &= ~IOPD_(pin);
6193     __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
6194
6195     /* set pin as output */
6196@@ -168,9 +168,9 @@ void gpio_set_value(unsigned int pin, un
6197     /* set output line state */
6198     x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
6199     if (state)
6200- x |= (1 << pin);
6201+ x |= IOPD_(pin);
6202     else
6203- x &= ~(1 << pin);
6204+ x &= ~IOPD_(pin);
6205     __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
6206
6207     local_irq_restore(flags);
6208@@ -189,7 +189,7 @@ int gpio_get_value(unsigned int pin)
6209         return -EINVAL;
6210
6211     x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
6212- return (x & (1 << pin)) != 0;
6213+ return (x & IOPD_(pin)) != 0;
6214 }
6215 EXPORT_SYMBOL(gpio_get_value);
6216
6217+++ b/arch/arm/mach-ks8695/leds.c
6218@@ -0,0 +1,94 @@
6219+/*
6220+ * LED driver for KS8695-based boards.
6221+ *
6222+ * Copyright (C) Andrew Victor
6223+ *
6224+ * This program is free software; you can redistribute it and/or modify
6225+ * it under the terms of the GNU General Public License version 2 as
6226+ * published by the Free Software Foundation.
6227+ */
6228+
6229+#include <linux/kernel.h>
6230+#include <linux/module.h>
6231+#include <linux/init.h>
6232+
6233+#include <asm/mach-types.h>
6234+#include <asm/leds.h>
6235+#include <asm/arch/devices.h>
6236+#include <asm/arch/gpio.h>
6237+
6238+
6239+static inline void ks8695_led_on(unsigned int led)
6240+{
6241+ gpio_set_value(led, 0);
6242+}
6243+
6244+static inline void ks8695_led_off(unsigned int led)
6245+{
6246+ gpio_set_value(led, 1);
6247+}
6248+
6249+static inline void ks8695_led_toggle(unsigned int led)
6250+{
6251+ unsigned long is_off = gpio_get_value(led);
6252+ if (is_off)
6253+ ks8695_led_on(led);
6254+ else
6255+ ks8695_led_off(led);
6256+}
6257+
6258+
6259+/*
6260+ * Handle LED events.
6261+ */
6262+static void ks8695_leds_event(led_event_t evt)
6263+{
6264+ unsigned long flags;
6265+
6266+ local_irq_save(flags);
6267+
6268+ switch(evt) {
6269+ case led_start: /* System startup */
6270+ ks8695_led_on(ks8695_leds_cpu);
6271+ break;
6272+
6273+ case led_stop: /* System stop / suspend */
6274+ ks8695_led_off(ks8695_leds_cpu);
6275+ break;
6276+
6277+#ifdef CONFIG_LEDS_TIMER
6278+ case led_timer: /* Every 50 timer ticks */
6279+ ks8695_led_toggle(ks8695_leds_timer);
6280+ break;
6281+#endif
6282+
6283+#ifdef CONFIG_LEDS_CPU
6284+ case led_idle_start: /* Entering idle state */
6285+ ks8695_led_off(ks8695_leds_cpu);
6286+ break;
6287+
6288+ case led_idle_end: /* Exit idle state */
6289+ ks8695_led_on(ks8695_leds_cpu);
6290+ break;
6291+#endif
6292+
6293+ default:
6294+ break;
6295+ }
6296+
6297+ local_irq_restore(flags);
6298+}
6299+
6300+
6301+static int __init leds_init(void)
6302+{
6303+ if ((ks8695_leds_timer == -1) || (ks8695_leds_cpu == -1))
6304+ return -ENODEV;
6305+
6306+ leds_event = ks8695_leds_event;
6307+
6308+ leds_event(led_start);
6309+ return 0;
6310+}
6311+
6312+__initcall(leds_init);
6313+++ b/arch/arm/mach-ks8695/pci.c
6314@@ -141,7 +141,7 @@ static struct pci_ops ks8695_pci_ops = {
6315     .write = ks8695_pci_writeconfig,
6316 };
6317
6318-static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
6319+static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
6320 {
6321     return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys);
6322 }
6323+++ b/drivers/char/Kconfig
6324@@ -1056,5 +1056,21 @@ config DEVPORT
6325
6326 source "drivers/s390/char/Kconfig"
6327
6328+config AT91_SPI
6329+ bool "SPI driver (legacy) for AT91RM9200 processors"
6330+ depends on ARCH_AT91RM9200
6331+ default y
6332+ help
6333+ The SPI driver gives access to this serial bus on the AT91RM9200
6334+ processor.
6335+
6336+config AT91_SPIDEV
6337+ bool "SPI device interface (legacy) for AT91RM9200 processors"
6338+ depends on ARCH_AT91RM9200 && AT91_SPI
6339+ default n
6340+ help
6341+ The SPI driver gives user mode access to this serial
6342+ bus on the AT91RM9200 processor.
6343+
6344 endmenu
6345
6346+++ b/drivers/char/Makefile
6347@@ -98,6 +98,8 @@ obj-$(CONFIG_GPIO_DEVICE) += gpio_dev.o
6348 obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
6349 obj-$(CONFIG_GPIO_TB0219) += tb0219.o
6350 obj-$(CONFIG_TELCLOCK) += tlclk.o
6351+obj-$(CONFIG_AT91_SPI) += at91_spi.o
6352+obj-$(CONFIG_AT91_SPIDEV) += at91_spidev.o
6353
6354 obj-$(CONFIG_MWAVE) += mwave/
6355 obj-$(CONFIG_AGP) += agp/
6356+++ b/drivers/char/at91_spi.c
6357@@ -0,0 +1,337 @@
6358+/*
6359+ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 (Thunder)
6360+ *
6361+ * Copyright (C) SAN People (Pty) Ltd
6362+ *
6363+ * This program is free software; you can redistribute it and/or
6364+ * modify it under the terms of the GNU General Public License
6365+ * as published by the Free Software Foundation; either version
6366+ * 2 of the License, or (at your option) any later version.
6367+ */
6368+
6369+#include <linux/init.h>
6370+#include <linux/dma-mapping.h>
6371+#include <linux/module.h>
6372+#include <linux/sched.h>
6373+#include <linux/completion.h>
6374+#include <linux/interrupt.h>
6375+#include <linux/clk.h>
6376+#include <linux/platform_device.h>
6377+#include <linux/atmel_pdc.h>
6378+#include <asm/io.h>
6379+#include <asm/semaphore.h>
6380+
6381+#include <asm/arch/at91_spi.h>
6382+#include <asm/arch/board.h>
6383+#include <asm/arch/spi.h>
6384+
6385+#undef DEBUG_SPI
6386+
6387+static struct spi_local spi_dev[NR_SPI_DEVICES]; /* state of the SPI devices */
6388+static int spi_enabled = 0;
6389+static struct semaphore spi_lock; /* protect access to SPI bus */
6390+static int current_device = -1; /* currently selected SPI device */
6391+static struct clk *spi_clk; /* SPI clock */
6392+static void __iomem *spi_base; /* SPI peripheral base-address */
6393+
6394+DECLARE_COMPLETION(transfer_complete);
6395+
6396+
6397+#define at91_spi_read(reg) __raw_readl(spi_base + (reg))
6398+#define at91_spi_write(reg, val) __raw_writel((val), spi_base + (reg))
6399+
6400+
6401+/* ......................................................................... */
6402+
6403+/*
6404+ * Access and enable the SPI bus.
6405+ * This MUST be called before any transfers are performed.
6406+ */
6407+void spi_access_bus(short device)
6408+{
6409+ /* Ensure that requested device is valid */
6410+ if ((device < 0) || (device >= NR_SPI_DEVICES))
6411+ panic("at91_spi: spi_access_bus called with invalid device");
6412+
6413+ if (spi_enabled == 0) {
6414+ clk_enable(spi_clk); /* Enable Peripheral clock */
6415+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN); /* Enable SPI */
6416+#ifdef DEBUG_SPI
6417+ printk("SPI on\n");
6418+#endif
6419+ }
6420+ spi_enabled++;
6421+
6422+ /* Lock the SPI bus */
6423+ down(&spi_lock);
6424+ current_device = device;
6425+
6426+ /* Configure SPI bus for device */
6427+ at91_spi_write(AT91_SPI_MR, AT91_SPI_MSTR | AT91_SPI_MODFDIS | (spi_dev[device].pcs << 16));
6428+}
6429+
6430+/*
6431+ * Relinquish control of the SPI bus.
6432+ */
6433+void spi_release_bus(short device)
6434+{
6435+ if (device != current_device)
6436+ panic("at91_spi: spi_release called with invalid device");
6437+
6438+ /* Release the SPI bus */
6439+ current_device = -1;
6440+ up(&spi_lock);
6441+
6442+ spi_enabled--;
6443+ if (spi_enabled == 0) {
6444+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS); /* Disable SPI */
6445+ clk_disable(spi_clk); /* Disable Peripheral clock */
6446+#ifdef DEBUG_SPI
6447+ printk("SPI off\n");
6448+#endif
6449+ }
6450+}
6451+
6452+/*
6453+ * Perform a data transfer over the SPI bus
6454+ */
6455+int spi_transfer(struct spi_transfer_list* list)
6456+{
6457+ struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
6458+ int tx_size;
6459+
6460+ if (!list)
6461+ panic("at91_spi: spi_transfer called with NULL transfer list");
6462+ if (current_device == -1)
6463+ panic("at91_spi: spi_transfer called without acquiring bus");
6464+
6465+#ifdef DEBUG_SPI
6466+ printk("SPI transfer start [%i]\n", list->nr_transfers);
6467+#endif
6468+
6469+ /* If we are in 16-bit mode, we need to modify what we pass to the PDC */
6470+ tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
6471+
6472+ /* Store transfer list */
6473+ device->xfers = list;
6474+ list->curr = 0;
6475+
6476+ /* Assume there must be at least one transfer */
6477+ device->tx = dma_map_single(NULL, list->tx[0], list->txlen[0], DMA_TO_DEVICE);
6478+ device->rx = dma_map_single(NULL, list->rx[0], list->rxlen[0], DMA_FROM_DEVICE);
6479+
6480+ /* Program PDC registers */
6481+ at91_spi_write(ATMEL_PDC_TPR, device->tx);
6482+ at91_spi_write(ATMEL_PDC_RPR, device->rx);
6483+ at91_spi_write(ATMEL_PDC_TCR, list->txlen[0] / tx_size);
6484+ at91_spi_write(ATMEL_PDC_RCR, list->rxlen[0] / tx_size);
6485+
6486+ /* Is there a second transfer? */
6487+ if (list->nr_transfers > 1) {
6488+ device->txnext = dma_map_single(NULL, list->tx[1], list->txlen[1], DMA_TO_DEVICE);
6489+ device->rxnext = dma_map_single(NULL, list->rx[1], list->rxlen[1], DMA_FROM_DEVICE);
6490+
6491+ /* Program Next PDC registers */
6492+ at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
6493+ at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
6494+ at91_spi_write(ATMEL_PDC_TNCR, list->txlen[1] / tx_size);
6495+ at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[1] / tx_size);
6496+ }
6497+ else {
6498+ device->txnext = 0;
6499+ device->rxnext = 0;
6500+ at91_spi_write(ATMEL_PDC_TNCR, 0);
6501+ at91_spi_write(ATMEL_PDC_RNCR, 0);
6502+ }
6503+
6504+ // TODO: If we are doing consecutive transfers (at high speed, or
6505+ // small buffers), then it might be worth modifying the 'Delay between
6506+ // Consecutive Transfers' in the CSR registers.
6507+ // This is an issue if we cannot chain the next buffer fast enough
6508+ // in the interrupt handler.
6509+
6510+ /* Enable transmitter and receiver */
6511+ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN | ATMEL_PDC_TXTEN);
6512+
6513+ at91_spi_write(AT91_SPI_IER, AT91_SPI_ENDRX); /* enable buffer complete interrupt */
6514+ wait_for_completion(&transfer_complete);
6515+
6516+#ifdef DEBUG_SPI
6517+ printk("SPI transfer end\n");
6518+#endif
6519+
6520+ return 0;
6521+}
6522+
6523+/* ......................................................................... */
6524+
6525+/*
6526+ * Handle interrupts from the SPI controller.
6527+ */
6528+static irqreturn_t at91spi_interrupt(int irq, void *dev_id)
6529+{
6530+ unsigned int status;
6531+ struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
6532+ struct spi_transfer_list *list = device->xfers;
6533+
6534+#ifdef DEBUG_SPI
6535+ printk("SPI interrupt %i\n", current_device);
6536+#endif
6537+
6538+ if (!list)
6539+ panic("at91_spi: spi_interrupt with a NULL transfer list");
6540+
6541+ status = at91_spi_read(AT91_SPI_SR) & at91_spi_read(AT91_SPI_IMR); /* read status */
6542+
6543+ dma_unmap_single(NULL, device->tx, list->txlen[list->curr], DMA_TO_DEVICE);
6544+ dma_unmap_single(NULL, device->rx, list->rxlen[list->curr], DMA_FROM_DEVICE);
6545+
6546+ device->tx = device->txnext; /* move next transfer to current transfer */
6547+ device->rx = device->rxnext;
6548+
6549+ list->curr = list->curr + 1;
6550+ if (list->curr == list->nr_transfers) { /* all transfers complete */
6551+ at91_spi_write(AT91_SPI_IDR, AT91_SPI_ENDRX); /* disable interrupt */
6552+
6553+ /* Disable transmitter and receiver */
6554+ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
6555+
6556+ device->xfers = NULL;
6557+ complete(&transfer_complete);
6558+ }
6559+ else if (list->curr+1 == list->nr_transfers) { /* no more next transfers */
6560+ device->txnext = 0;
6561+ device->rxnext = 0;
6562+ at91_spi_write(ATMEL_PDC_TNCR, 0);
6563+ at91_spi_write(ATMEL_PDC_RNCR, 0);
6564+ }
6565+ else {
6566+ int i = (list->curr)+1;
6567+
6568+ /* If we are in 16-bit mode, we need to modify what we pass to the PDC */
6569+ int tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
6570+
6571+ device->txnext = dma_map_single(NULL, list->tx[i], list->txlen[i], DMA_TO_DEVICE);
6572+ device->rxnext = dma_map_single(NULL, list->rx[i], list->rxlen[i], DMA_FROM_DEVICE);
6573+ at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
6574+ at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
6575+ at91_spi_write(ATMEL_PDC_TNCR, list->txlen[i] / tx_size);
6576+ at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[i] / tx_size);
6577+ }
6578+ return IRQ_HANDLED;
6579+}
6580+
6581+/* ......................................................................... */
6582+
6583+/*
6584+ * Initialize the SPI controller
6585+ */
6586+static int __init at91spi_probe(struct platform_device *pdev)
6587+{
6588+ int i;
6589+ unsigned long scbr;
6590+ struct resource *res;
6591+
6592+ init_MUTEX(&spi_lock);
6593+
6594+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6595+ if (!res)
6596+ return -ENXIO;
6597+
6598+ if (!request_mem_region(res->start, res->end - res->start + 1, "at91_spi"))
6599+ return -EBUSY;
6600+
6601+ spi_base = ioremap(res->start, res->end - res->start + 1);
6602+ if (!spi_base) {
6603+ release_mem_region(res->start, res->end - res->start + 1);
6604+ return -ENOMEM;
6605+ }
6606+
6607+ spi_clk = clk_get(NULL, "spi_clk");
6608+ if (IS_ERR(spi_clk)) {
6609+ printk(KERN_ERR "at91_spi: no clock defined\n");
6610+ iounmap(spi_base);
6611+ release_mem_region(res->start, res->end - res->start + 1);
6612+ return -ENODEV;
6613+ }
6614+
6615+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SWRST); /* software reset of SPI controller */
6616+
6617+ /*
6618+ * Calculate the correct SPI baud-rate divisor.
6619+ */
6620+ scbr = clk_get_rate(spi_clk) / (2 * DEFAULT_SPI_CLK);
6621+ scbr = scbr + 1; /* round up */
6622+
6623+ printk(KERN_INFO "at91_spi: Baud rate set to %ld\n", clk_get_rate(spi_clk) / (2 * scbr));
6624+
6625+ /* Set Chip Select registers to good defaults */
6626+ for (i = 0; i < 4; i++) {
6627+ at91_spi_write(AT91_SPI_CSR(i), AT91_SPI_CPOL | AT91_SPI_BITS_8 | (16 << 16) | (scbr << 8));
6628+ }
6629+
6630+ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
6631+
6632+ memset(&spi_dev, 0, sizeof(spi_dev));
6633+ spi_dev[0].pcs = 0xE;
6634+ spi_dev[1].pcs = 0xD;
6635+ spi_dev[2].pcs = 0xB;
6636+ spi_dev[3].pcs = 0x7;
6637+
6638+ if (request_irq(AT91RM9200_ID_SPI, at91spi_interrupt, 0, "spi", NULL)) {
6639+ clk_put(spi_clk);
6640+ iounmap(spi_base);
6641+ release_mem_region(res->start, res->end - res->start + 1);
6642+ return -EBUSY;
6643+ }
6644+
6645+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN); /* Enable SPI */
6646+
6647+ return 0;
6648+}
6649+
6650+static int __devexit at91spi_remove(struct platform_device *pdev)
6651+{
6652+ struct resource *res;
6653+
6654+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS); /* Disable SPI */
6655+ clk_put(spi_clk);
6656+
6657+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6658+ iounmap(spi_base);
6659+ release_mem_region(res->start, res->end - res->start + 1);
6660+
6661+ free_irq(AT91RM9200_ID_SPI, 0);
6662+ return 0;
6663+}
6664+
6665+static struct platform_driver at91spi_driver = {
6666+ .probe = at91spi_probe,
6667+ .remove = __devexit_p(at91spi_remove),
6668+ .driver = {
6669+ .name = "at91_spi",
6670+ .owner = THIS_MODULE,
6671+ },
6672+};
6673+
6674+static int __init at91spi_init(void)
6675+{
6676+ return platform_driver_register(&at91spi_driver);
6677+}
6678+
6679+static void __exit at91spi_exit(void)
6680+{
6681+ platform_driver_unregister(&at91spi_driver);
6682+}
6683+
6684+EXPORT_SYMBOL(spi_access_bus);
6685+EXPORT_SYMBOL(spi_release_bus);
6686+EXPORT_SYMBOL(spi_transfer);
6687+
6688+module_init(at91spi_init);
6689+module_exit(at91spi_exit);
6690+
6691+MODULE_LICENSE("GPL")
6692+MODULE_AUTHOR("Andrew Victor")
6693+MODULE_DESCRIPTION("SPI driver for Atmel AT91RM9200")
6694+MODULE_ALIAS("platform:at91_spi");
6695+++ b/drivers/char/at91_spidev.c
6696@@ -0,0 +1,233 @@
6697+/*
6698+ * User-space interface to the SPI bus on Atmel AT91RM9200
6699+ *
6700+ * Copyright (C) 2003 SAN People (Pty) Ltd
6701+ *
6702+ * Based on SPI driver by Rick Bronson
6703+ *
6704+ * This program is free software; you can redistribute it and/or
6705+ * modify it under the terms of the GNU General Public License
6706+ * as published by the Free Software Foundation; either version
6707+ * 2 of the License, or (at your option) any later version.
6708+ */
6709+
6710+#include <linux/module.h>
6711+#include <linux/init.h>
6712+#include <linux/slab.h>
6713+#include <linux/highmem.h>
6714+#include <linux/pagemap.h>
6715+#include <asm/arch/spi.h>
6716+
6717+#ifdef CONFIG_DEVFS_FS
6718+#include <linux/devfs_fs_kernel.h>
6719+#endif
6720+
6721+
6722+#undef DEBUG_SPIDEV
6723+
6724+/* ......................................................................... */
6725+
6726+/*
6727+ * Read or Write to SPI bus.
6728+ */
6729+static ssize_t spidev_rd_wr(struct file *file, char *buf, size_t count, loff_t *offset)
6730+{
6731+ unsigned int spi_device = (unsigned int) file->private_data;
6732+
6733+ struct mm_struct * mm;
6734+ struct page ** maplist;
6735+ struct spi_transfer_list* list;
6736+ int pgcount;
6737+
6738+ unsigned int ofs, pagelen;
6739+ int res, i, err;
6740+
6741+ if (!count) {
6742+ return 0;
6743+ }
6744+
6745+ list = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
6746+ if (!list) {
6747+ return -ENOMEM;
6748+ }
6749+
6750+ mm = current->mm;
6751+
6752+ pgcount = ((unsigned long)buf+count+PAGE_SIZE-1)/PAGE_SIZE - (unsigned long)buf/PAGE_SIZE;
6753+
6754+ if (pgcount >= MAX_SPI_TRANSFERS) {
6755+ kfree(list);
6756+ return -EFBIG;
6757+ }
6758+
6759+ maplist = kmalloc (pgcount * sizeof (struct page *), GFP_KERNEL);
6760+
6761+ if (!maplist) {
6762+ kfree(list);
6763+ return -ENOMEM;
6764+ }
6765+ flush_cache_all();
6766+ down_read(&mm->mmap_sem);
6767+ err= get_user_pages(current, mm, (unsigned long)buf, pgcount, 1, 0, maplist, NULL);
6768+ up_read(&mm->mmap_sem);
6769+
6770+ if (err < 0) {
6771+ kfree(list);
6772+ kfree(maplist);
6773+ return err;
6774+ }
6775+ pgcount = err;
6776+
6777+#ifdef DEBUG_SPIDEV
6778+ printk("spidev_rd_rw: %i %i\n", count, pgcount);
6779+#endif
6780+
6781+ /* Set default return value = transfer length */
6782+ res = count;
6783+
6784+ /*
6785+ * At this point, the virtual area buf[0] .. buf[count-1] will have
6786+ * corresponding pages mapped in the physical memory and locked until
6787+ * we unmap the kiobuf. The pages cannot be swapped out or moved
6788+ * around.
6789+ */
6790+ ofs = (unsigned long) buf & (PAGE_SIZE -1);
6791+ pagelen = PAGE_SIZE - ofs;
6792+ if (count < pagelen)
6793+ pagelen = count;
6794+
6795+ for (i = 0; i < pgcount; i++) {
6796+ flush_dcache_page(maplist[i]);
6797+
6798+ list->tx[i] = list->rx[i] = page_address(maplist[i]) + ofs;
6799+ list->txlen[i] = list->rxlen[i] = pagelen;
6800+
6801+#ifdef DEBUG_SPIDEV
6802+ printk(" %i: %x (%i)\n", i, list->tx[i], list->txlen[i]);
6803+#endif
6804+
6805+ ofs = 0; /* all subsequent transfers start at beginning of a page */
6806+ count = count - pagelen;
6807+ pagelen = (count < PAGE_SIZE) ? count : PAGE_SIZE;
6808+ }
6809+ list->nr_transfers = pgcount;
6810+
6811+ /* Perform transfer on SPI bus */
6812+ spi_access_bus(spi_device);
6813+ spi_transfer(list);
6814+ spi_release_bus(spi_device);
6815+
6816+ while (pgcount--) {
6817+ page_cache_release (maplist[pgcount]);
6818+ }
6819+ flush_cache_all();
6820+
6821+ kfree(maplist);
6822+ kfree(list);
6823+
6824+ return res;
6825+}
6826+
6827+static int spidev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
6828+{
6829+ int spi_device = MINOR(inode->i_rdev);
6830+
6831+ if (spi_device >= NR_SPI_DEVICES)
6832+ return -ENODEV;
6833+
6834+ // TODO: This interface can be used to configure the SPI bus.
6835+ // Configurable options could include: Speed, Clock Polarity, Clock Phase
6836+
6837+ switch(cmd) {
6838+ default:
6839+ return -ENOIOCTLCMD;
6840+ }
6841+}
6842+
6843+/*
6844+ * Open the SPI device
6845+ */
6846+static int spidev_open(struct inode *inode, struct file *file)
6847+{
6848+ unsigned int spi_device = MINOR(inode->i_rdev);
6849+
6850+ if (spi_device >= NR_SPI_DEVICES)
6851