Root/
Source at commit d2f389bd2b56e0a8b4cee566560c97a01f0f3f83 created 13 years 5 months ago. By Xiangfu Liu, move mmc files to drivers/mmc/ move lcm files to drivers/video/ | |
---|---|
1 | /* |
2 | * JzRISC lcd controller |
3 | * |
4 | * xiangfu liu <xiangfu.z@gmail.com> |
5 | * |
6 | * This program is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU General Public License as |
8 | * published by the Free Software Foundation; either version 2 of |
9 | * the License, or (at your option) any later version. |
10 | * |
11 | * This program is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 | * GNU General Public License for more details. |
15 | * |
16 | * You should have received a copy of the GNU General Public License |
17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
19 | * MA 02111-1307 USA |
20 | */ |
21 | |
22 | #ifndef __QI_LB60_GPM940B0_H__ |
23 | #define __QI_LB60_GPM940B0_H__ |
24 | |
25 | #include <asm/io.h> |
26 | |
27 | struct lcd_desc{ |
28 | unsigned int next_desc; /* LCDDAx */ |
29 | unsigned int databuf; /* LCDSAx */ |
30 | unsigned int frame_id; /* LCDFIDx */ |
31 | unsigned int cmd; /* LCDCMDx */ |
32 | }; |
33 | |
34 | #define MODE_MASK 0x0f |
35 | #define MODE_TFT_GEN 0x00 |
36 | #define MODE_TFT_SHARP 0x01 |
37 | #define MODE_TFT_CASIO 0x02 |
38 | #define MODE_TFT_SAMSUNG 0x03 |
39 | #define MODE_CCIR656_NONINT 0x04 |
40 | #define MODE_CCIR656_INT 0x05 |
41 | #define MODE_STN_COLOR_SINGLE 0x08 |
42 | #define MODE_STN_MONO_SINGLE 0x09 |
43 | #define MODE_STN_COLOR_DUAL 0x0a |
44 | #define MODE_STN_MONO_DUAL 0x0b |
45 | #define MODE_8BIT_SERIAL_TFT 0x0c |
46 | |
47 | #define MODE_TFT_18BIT (1<<7) |
48 | |
49 | #define STN_DAT_PIN1 (0x00 << 4) |
50 | #define STN_DAT_PIN2 (0x01 << 4) |
51 | #define STN_DAT_PIN4 (0x02 << 4) |
52 | #define STN_DAT_PIN8 (0x03 << 4) |
53 | #define STN_DAT_PINMASK STN_DAT_PIN8 |
54 | |
55 | #define STFT_PSHI (1 << 15) |
56 | #define STFT_CLSHI (1 << 14) |
57 | #define STFT_SPLHI (1 << 13) |
58 | #define STFT_REVHI (1 << 12) |
59 | |
60 | #define SYNC_MASTER (0 << 16) |
61 | #define SYNC_SLAVE (1 << 16) |
62 | |
63 | #define DE_P (0 << 9) |
64 | #define DE_N (1 << 9) |
65 | |
66 | #define PCLK_P (0 << 10) |
67 | #define PCLK_N (1 << 10) |
68 | |
69 | #define HSYNC_P (0 << 11) |
70 | #define HSYNC_N (1 << 11) |
71 | |
72 | #define VSYNC_P (0 << 8) |
73 | #define VSYNC_N (1 << 8) |
74 | |
75 | #define DATA_NORMAL (0 << 17) |
76 | #define DATA_INVERSE (1 << 17) |
77 | |
78 | |
79 | /* Jz LCDFB supported I/O controls. */ |
80 | #define FBIOSETBACKLIGHT 0x4688 |
81 | #define FBIODISPON 0x4689 |
82 | #define FBIODISPOFF 0x468a |
83 | #define FBIORESET 0x468b |
84 | #define FBIOPRINT_REG 0x468c |
85 | |
86 | /* |
87 | * LCD panel specific definition |
88 | */ |
89 | #define MODE 0xc9 /* 8bit serial RGB */ |
90 | #define SPEN (32*2+21) /*LCD_SPL */ |
91 | #define SPCK (32*2+23) /*LCD_CLS */ |
92 | #define SPDA (32*2+22) /*LCD_D12 */ |
93 | #define LCD_RET (32*3+27) |
94 | |
95 | #define __spi_write_reg1(reg, val) \ |
96 | do { \ |
97 | unsigned char no;\ |
98 | unsigned short value;\ |
99 | unsigned char a=0;\ |
100 | unsigned char b=0;\ |
101 | a=reg;\ |
102 | b=val;\ |
103 | __gpio_set_pin(SPEN);\ |
104 | __gpio_set_pin(SPCK);\ |
105 | __gpio_clear_pin(SPDA);\ |
106 | __gpio_clear_pin(SPEN);\ |
107 | udelay(25);\ |
108 | value=((a<<8)|(b&0xFF));\ |
109 | for(no=0;no<16;no++)\ |
110 | {\ |
111 | __gpio_clear_pin(SPCK);\ |
112 | if((value&0x8000)==0x8000)\ |
113 | __gpio_set_pin(SPDA);\ |
114 | else\ |
115 | __gpio_clear_pin(SPDA);\ |
116 | udelay(25);\ |
117 | __gpio_set_pin(SPCK);\ |
118 | value=(value<<1); \ |
119 | udelay(25);\ |
120 | }\ |
121 | __gpio_set_pin(SPEN);\ |
122 | udelay(100);\ |
123 | } while (0) |
124 | |
125 | #define __spi_write_reg(reg, val) \ |
126 | do {\ |
127 | __spi_write_reg1((reg<<2|2), val);\ |
128 | udelay(100); \ |
129 | }while(0) |
130 | |
131 | #define __lcd_special_pin_init() \ |
132 | do { \ |
133 | __gpio_as_output(SPEN); /* use SPDA */\ |
134 | __gpio_as_output(SPCK); /* use SPCK */\ |
135 | __gpio_as_output(SPDA); /* use SPDA */\ |
136 | __gpio_as_output(LCD_RET);\ |
137 | } while (0) |
138 | |
139 | #define __lcd_special_on() \ |
140 | do { \ |
141 | __spi_write_reg1(0x05, 0x1e); \ |
142 | udelay(50);\ |
143 | __spi_write_reg1(0x05, 0x5d); \ |
144 | __spi_write_reg1(0x0B, 0x81); \ |
145 | __spi_write_reg1(0x01, 0x95); \ |
146 | __spi_write_reg1(0x00, 0x07); \ |
147 | __spi_write_reg1(0x06, 0x15); \ |
148 | __spi_write_reg1(0x07, 0x8d); \ |
149 | __spi_write_reg1(0x04, 0x0f); \ |
150 | __spi_write_reg1(0x0d, 0x3d); \ |
151 | __spi_write_reg1(0x10, 0x42); \ |
152 | __spi_write_reg1(0x11, 0x3a); \ |
153 | __spi_write_reg1(0x05, 0x5f); \ |
154 | } while (0) |
155 | |
156 | #define __lcd_special_off() \ |
157 | do { \ |
158 | __spi_write_reg1(0x05, 0x5e); \ |
159 | } while (0) |
160 | |
161 | #define __lcd_set_backlight_level(n)\ |
162 | do { \ |
163 | __gpio_as_output(LCD_RET); \ |
164 | __gpio_set_pin(LCD_RET); \ |
165 | } while (0) |
166 | |
167 | #if defined(CONFIG_SAKC) |
168 | #define __lcd_close_backlight() \ |
169 | do { \ |
170 | __gpio_as_output(GPIO_PWM); \ |
171 | __gpio_clear_pin(GPIO_PWM); \ |
172 | } while (0) |
173 | #endif |
174 | |
175 | #if defined(CONFIG_SAKC) |
176 | #define __lcd_display_pin_init() \ |
177 | do { \ |
178 | __cpm_start_tcu(); \ |
179 | __lcd_special_pin_init(); \ |
180 | } while (0) |
181 | |
182 | #define __lcd_display_on() \ |
183 | do { \ |
184 | __lcd_special_on(); \ |
185 | } while (0) |
186 | |
187 | #define __lcd_display_off() \ |
188 | do { \ |
189 | __lcd_special_off(); \ |
190 | } while (0) |
191 | #else |
192 | #define __lcd_display_pin_init() \ |
193 | do { \ |
194 | __cpm_start_tcu(); \ |
195 | __lcd_special_pin_init(); \ |
196 | } while (0) |
197 | |
198 | #define __lcd_display_on() \ |
199 | do { \ |
200 | __gpio_set_pin(GPIO_DISP_OFF_N); \ |
201 | __lcd_special_on(); \ |
202 | } while (0) |
203 | |
204 | #define __lcd_display_off() \ |
205 | do { \ |
206 | __lcd_special_off(); \ |
207 | __gpio_clear_pin(GPIO_DISP_OFF_N); \ |
208 | } while (0) |
209 | #endif |
210 | |
211 | #endif /* __QI_LB60_GPM940B0_H__ */ |
212 |