| 1 | --- a/drivers/ide/pci/pdc202xx_old.c |
| 2 | +++ b/drivers/ide/pci/pdc202xx_old.c |
| 3 | @@ -253,23 +253,23 @@ static int pdc202xx_tune_chipset (ide_dr |
| 4 | pci_read_config_byte(dev, (drive_pci)|0x03, &DP); |
| 5 | |
| 6 | if (speed < XFER_SW_DMA_0) { |
| 7 | - if ((AP & 0x0F) || (BP & 0x07)) { |
| 8 | + if ((AP & 0x0F) || (BP & 0x17)) { |
| 9 | /* clear PIO modes of lower 8421 bits of A Register */ |
| 10 | pci_write_config_byte(dev, (drive_pci), AP &~0x0F); |
| 11 | pci_read_config_byte(dev, (drive_pci), &AP); |
| 12 | |
| 13 | /* clear PIO modes of lower 421 bits of B Register */ |
| 14 | - pci_write_config_byte(dev, (drive_pci)|0x01, BP &~0x07); |
| 15 | + pci_write_config_byte(dev, (drive_pci)|0x01, BP &~0x17); |
| 16 | pci_read_config_byte(dev, (drive_pci)|0x01, &BP); |
| 17 | |
| 18 | pci_read_config_byte(dev, (drive_pci), &AP); |
| 19 | pci_read_config_byte(dev, (drive_pci)|0x01, &BP); |
| 20 | } |
| 21 | } else { |
| 22 | - if ((BP & 0xF0) && (CP & 0x0F)) { |
| 23 | + if ((BP & 0xE0) && (CP & 0x0F)) { |
| 24 | /* clear DMA modes of upper 842 bits of B Register */ |
| 25 | /* clear PIO forced mode upper 1 bit of B Register */ |
| 26 | - pci_write_config_byte(dev, (drive_pci)|0x01, BP &~0xF0); |
| 27 | + pci_write_config_byte(dev, (drive_pci)|0x01, BP &~0xE0); |
| 28 | pci_read_config_byte(dev, (drive_pci)|0x01, &BP); |
| 29 | |
| 30 | /* clear DMA modes of lower 8421 bits of C Register */ |
| 31 | @@ -373,6 +373,9 @@ static int config_chipset_for_dma (ide_d |
| 32 | u8 ultra_66 = ((id->dma_ultra & 0x0010) || |
| 33 | (id->dma_ultra & 0x0008)) ? 1 : 0; |
| 34 | |
| 35 | + if (hwif->rqsize != 256) |
| 36 | + hwif->rqsize = 256; |
| 37 | + |
| 38 | switch(dev->device) { |
| 39 | case PCI_DEVICE_ID_PROMISE_20267: |
| 40 | case PCI_DEVICE_ID_PROMISE_20265: |
| 41 | |
