Root/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.h

1/******************************************************************************
2**
3** FILE NAME : ifxmips_ptm_vdsl.h
4** PROJECT : UEIP
5** MODULES : PTM
6**
7** DATE : 7 Jul 2009
8** AUTHOR : Xu Liang
9** DESCRIPTION : PTM driver header file (core functions for VR9)
10** COPYRIGHT : Copyright (c) 2006
11** Infineon Technologies AG
12** Am Campeon 1-12, 85579 Neubiberg, Germany
13**
14** This program is free software; you can redistribute it and/or modify
15** it under the terms of the GNU General Public License as published by
16** the Free Software Foundation; either version 2 of the License, or
17** (at your option) any later version.
18**
19** HISTORY
20** $Date $Author $Comment
21** 07 JUL 2009 Xu Liang Init Version
22*******************************************************************************/
23
24#ifndef IFXMIPS_PTM_VDSL_H
25#define IFXMIPS_PTM_VDSL_H
26
27#include <linux/version.h>
28#include <linux/netdevice.h>
29#include <lantiq_ptm.h>
30#include "ifxmips_ptm_common.h"
31#include "ifxmips_ptm_ppe_common.h"
32#include "ifxmips_ptm_fw_regs_vdsl.h"
33
34#define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24)
35
36#define IFX_REG_W32(_v, _r) __raw_writel((_v), (volatile unsigned int *)(_r))
37#define IFX_REG_R32(_r) __raw_readl((volatile unsigned int *)(_r))
38#define IFX_REG_W32_MASK(_clr, _set, _r) IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r))
39#define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
40
41
42
43/*
44 * ####################################
45 * Definition
46 * ####################################
47 */
48
49/*
50 * Constant Definition
51 */
52#define ETH_WATCHDOG_TIMEOUT (10 * HZ)
53
54/*
55 * DMA RX/TX Channel Parameters
56 */
57#define MAX_ITF_NUMBER 1
58#define MAX_RX_DMA_CHANNEL_NUMBER 1
59#define MAX_TX_DMA_CHANNEL_NUMBER 1
60#define DATA_BUFFER_ALIGNMENT EMA_ALIGNMENT
61#define DESC_ALIGNMENT 8
62
63/*
64 * Ethernet Frame Definitions
65 */
66#define ETH_MAC_HEADER_LENGTH 14
67#define ETH_CRC_LENGTH 4
68#define ETH_MIN_FRAME_LENGTH 64
69#define ETH_MAX_FRAME_LENGTH (1518 + 4 * 2)
70
71/*
72 * RX Frame Definitions
73 */
74#define RX_MAX_BUFFER_SIZE (1600 + RX_HEAD_MAC_ADDR_ALIGNMENT)
75#define RX_HEAD_MAC_ADDR_ALIGNMENT 2
76#define RX_TAIL_CRC_LENGTH 0 // PTM firmware does not have ethernet frame CRC
77                                            // The len in descriptor doesn't include ETH_CRC
78                                            // because ETH_CRC may not present in some configuration
79
80
81
82/*
83 * ####################################
84 * Data Type
85 * ####################################
86 */
87
88struct ptm_itf {
89    unsigned int rx_desc_pos;
90
91    unsigned int tx_desc_pos;
92
93    unsigned int tx_swap_desc_pos;
94
95    struct net_device_stats stats;
96
97    struct napi_struct napi;
98};
99
100struct ptm_priv_data {
101    struct ptm_itf itf[MAX_ITF_NUMBER];
102};
103
104
105
106/*
107 * ####################################
108 * Declaration
109 * ####################################
110 */
111
112extern unsigned int ifx_ptm_dbg_enable;
113
114extern void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor);
115
116extern void ifx_ptm_init_chip(void);
117extern void ifx_ptm_uninit_chip(void);
118
119extern int ifx_pp32_start(int pp32);
120extern void ifx_pp32_stop(int pp32);
121
122extern void ifx_reset_ppe(void);
123
124
125
126#endif // IFXMIPS_PTM_VDSL_H
127

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