Root/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h

1/*
2 * ADM5120 UART definitions
3 *
4 * This header file defines the hardware registers of the ADM5120 SoC
5 * built-in UARTs.
6 *
7 * Copyright (C) 2007 Gabor Juhos <juhosg@openwrt.org>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 *
13 */
14
15#ifndef _MACH_ADM5120_UART_H
16#define _MACH_ADM5120_UART_H
17
18#define UART_BAUDDIV(clk, baud) ((clk/(16 * (baud)))-1)
19
20#define UART_REG_DATA 0x00
21#define UART_REG_RSR 0x04
22#define UART_REG_ECR UART_REG_RSR
23#define UART_REG_LCRH 0x08
24#define UART_REG_LCRM 0x0C
25#define UART_REG_LCRL 0x10
26#define UART_REG_CTRL 0x14
27#define UART_REG_FLAG 0x18
28
29/* Receive Status Register bits */
30#define UART_RSR_FE (1 << 0)
31#define UART_RSR_PE (1 << 1)
32#define UART_RSR_BE (1 << 2)
33#define UART_RSR_OE (1 << 3)
34#define UART_RSR_ERR (UART_RSR_FE | UART_RSR_PE | UART_RSR_BE)
35
36#define UART_ECR_ALL 0xFF
37
38/* Line Control High register bits */
39#define UART_LCRH_BRK (1 << 0) /* send break */
40#define UART_LCRH_PEN (1 << 1) /* parity enable */
41#define UART_LCRH_EPS (1 << 2) /* even parity select */
42#define UART_LCRH_STP1 (0 << 3) /* one stop bits select */
43#define UART_LCRH_STP2 (1 << 3) /* two stop bits select */
44#define UART_LCRH_FEN (1 << 4) /* FIFO enable */
45
46#define UART_LCRH_WLEN5 (0 << 5)
47#define UART_LCRH_WLEN6 (1 << 5)
48#define UART_LCRH_WLEN7 (2 << 5)
49#define UART_LCRH_WLEN8 (3 << 5)
50
51/* Control register bits */
52#define UART_CTRL_EN (1 << 0)
53
54/* Flag register bits */
55#define UART_FLAG_CTS (1 << 0)
56#define UART_FLAG_DSR (1 << 1)
57#define UART_FLAG_DCD (1 << 2)
58#define UART_FLAG_BUSY (1 << 3)
59#define UART_FLAG_RXFE (1 << 4)
60#define UART_FLAG_TXFF (1 << 5)
61#define UART_FLAG_RXFF (1 << 6)
62#define UART_FLAG_TXFE (1 << 7)
63
64#endif /* _MACH_ADM5120_UART_H */
65

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