| 1 | /************************************************************************ |
| 2 | * |
| 3 | * Copyright (c) 2005 |
| 4 | * Infineon Technologies AG |
| 5 | * St. Martin Strasse 53; 81669 Muenchen; Germany |
| 6 | * |
| 7 | ************************************************************************/ |
| 8 | |
| 9 | #ifndef __ADM8668_H__ |
| 10 | #define __ADM8668_H__ |
| 11 | |
| 12 | /*======================= Physical Memory Map ============================*/ |
| 13 | #define ADM8668_SDRAM_BASE 0 |
| 14 | #define ADM8668_SMEM1_BASE 0x10000000 |
| 15 | #define ADM8668_MPMC_BASE 0x11000000 |
| 16 | #define ADM8668_USB_BASE 0x11200000 |
| 17 | #define ADM8668_CONFIG_BASE 0x11400000 |
| 18 | #define ADM8668_WAN_BASE 0x11600000 |
| 19 | #define ADM8668_WLAN_BASE 0x11800000 |
| 20 | #define ADM8668_LAN_BASE 0x11A00000 |
| 21 | #define ADM8668_INTC_BASE 0x1E000000 |
| 22 | #define ADM8668_TMR_BASE 0x1E200000 |
| 23 | #define ADM8668_UART0_BASE 0x1E400000 |
| 24 | #define ADM8668_SMEM0_BASE 0x1FC00000 |
| 25 | #define ADM8668_NAND_BASE 0x1FFFFF00 |
| 26 | |
| 27 | #define ADM8668_PCICFG_BASE 0x12200000 |
| 28 | #define ADM8668_PCIDAT_BASE 0x12400000 |
| 29 | |
| 30 | /* interrupt levels */ |
| 31 | #define ADM8668_SWI_IRQ 1 |
| 32 | #define ADM8668_COMMS_RX_IRQ 2 |
| 33 | #define ADM8668_COMMS_TX_IRQ 3 |
| 34 | #define ADM8668_TIMER0_IRQ 4 |
| 35 | #define ADM8668_TIMER1_IRQ 5 |
| 36 | #define ADM8668_UART0_IRQ 6 |
| 37 | #define ADM8668_LAN_IRQ 7 |
| 38 | #define ADM8668_WAN_IRQ 8 |
| 39 | #define ADM8668_WLAN_IRQ 9 |
| 40 | #define ADM8668_GPIO_IRQ 10 |
| 41 | #define ADM8668_IDE_IRQ 11 |
| 42 | #define ADM8668_PCI2_IRQ 12 |
| 43 | #define ADM8668_PCI1_IRQ 13 |
| 44 | #define ADM8668_PCI0_IRQ 14 |
| 45 | #define ADM8668_USB_IRQ 15 |
| 46 | #define ADM8668_IRQ_MAX ADM8668_USB_IRQ |
| 47 | |
| 48 | /* register access macros */ |
| 49 | #define ADM8668_CONFIG_REG(_reg) \ |
| 50 | (*((volatile unsigned int *)(KSEG1ADDR(ADM8668_CONFIG_BASE + (_reg))))) |
| 51 | |
| 52 | /* lan registers */ |
| 53 | #define NETCSR6 0x30 |
| 54 | #define NETCSR7 0x38 |
| 55 | #define NETCSR37 0xF8 |
| 56 | |
| 57 | /* known/used CPU configuration registers */ |
| 58 | #define ADM8668_CR0 0x00 |
| 59 | #define ADM8668_CR1 0x04 |
| 60 | #define ADM8668_CR3 0x0C |
| 61 | #define ADM8668_CR66 0x108 |
| 62 | |
| 63 | /** For GPIO control **/ |
| 64 | #define GPIO_REG 0x5C /* on WLAN */ |
| 65 | #define CRGPIO_REG 0x20 /* on CPU */ |
| 66 | |
| 67 | void adm8668_init_clocks(void); |
| 68 | |
| 69 | #endif /* __ADM8668_H__ */ |
| 70 | |
