Root/target/linux/amazon/files/arch/mips/amazon/setup.c

1/*
2 * Copyright (C) 2004 Peng Liu <peng.liu@infineon.com>
3 * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
4 * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
19 *
20 */
21
22#include <linux/init.h>
23#include <linux/sched.h>
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/delay.h>
27
28#include <asm/reboot.h>
29#include <asm/system.h>
30#include <asm/time.h>
31#include <asm/cpu.h>
32#include <asm/bootinfo.h>
33#include <asm/irq.h>
34#include <asm/mipsregs.h>
35#include <asm/amazon/amazon.h>
36#include <asm/amazon/irq.h>
37#include <asm/amazon/model.h>
38
39static unsigned int r4k_offset;
40static unsigned int r4k_cur;
41
42/* required in arch/mips/kernel/kspd.c */
43unsigned long cpu_khz;
44
45static void amazon_reboot_setup(void);
46
47/* the CPU clock rate - lifted from u-boot */
48unsigned int amazon_get_cpu_hz(void)
49{
50    /*-----------------------------------*/
51    /**CGU CPU Clock Reduction Register***/
52    /*-----------------------------------*/
53    switch(amazon_readl(AMAZON_CGU_CPUCRD) & 0x3){
54        case 0:
55            /*divider ration 1/1, 235 MHz clock */
56            return 235000000;
57        case 1:
58            /*divider ration 2/3, 235 MHz clock, clock not accurate, here */
59            return 150000000;
60        case 2:
61            /*divider ration 1/2, 235 MHz clock */
62            return 117500000;
63        default:
64            /*divider ration 1/4, 235 MHz clock */
65            return 58750000;
66    }
67}
68
69/* the FPI clock rate - lifted from u-boot */
70unsigned int amazon_get_fpi_hz(void)
71{
72    unsigned int clkCPU;
73    clkCPU = amazon_get_cpu_hz();
74
75    /*-------------------------------------*/
76    /***CGU Clock Divider Select Register***/
77    /*-------------------------------------*/
78    switch (amazon_readl(AMAZON_CGU_DIV) & 0x3)
79    {
80        case 1:
81            return clkCPU >> 1;
82        case 2:
83            return clkCPU >> 2;
84        default:
85            return clkCPU;
86        /* '11' is reserved */
87    }
88}
89EXPORT_SYMBOL(amazon_get_fpi_hz);
90
91/* this doesn't really belong here, but it's a convenient location */
92unsigned int amazon_get_cpu_ver(void)
93{
94    static unsigned int cpu_ver = 0;
95    if (cpu_ver == 0)
96        cpu_ver = amazon_readl(AMAZON_MCD_CHIPID) & 0xFFFFF000;
97    return cpu_ver;
98}
99
100static inline u32 amazon_get_counter_resolution(void)
101{
102    u32 res;
103    __asm__ __volatile__(
104        ".set push\n"
105        ".set mips32r2\n"
106        ".set noreorder\n"
107        "rdhwr %0, $3\n"
108        "ehb\n"
109        ".set pop\n"
110        : "=&r" (res)
111        : /* no input */
112        : "memory");
113    instruction_hazard();
114    return res;
115}
116
117void __init plat_time_init(void)
118{
119    mips_hpt_frequency = amazon_get_cpu_hz() / amazon_get_counter_resolution();
120    r4k_offset = mips_hpt_frequency / HZ;
121    printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
122    printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset);
123
124    r4k_cur = (read_c0_count() + r4k_offset);
125    write_c0_compare(r4k_cur);
126
127    /* enable the timer in the PMU */
128    amazon_writel(amazon_readl(AMAZON_PMU_PWDCR)| AMAZON_PMU_PWDCR_GPT|AMAZON_PMU_PWDCR_FPI, AMAZON_PMU_PWDCR);
129    
130    /* setup the GPTU for timer tick f_fpi == f_gptu*/
131    amazon_writel(0x0100, AMAZON_GPTU_CLC);
132    amazon_writel(0xffff, AMAZON_GPTU_CAPREL);
133    amazon_writel(0x80C0, AMAZON_GPTU_T6CON);
134}
135
136void __init plat_mem_setup(void)
137{
138    u32 chipid = 0;
139    u32 part_no = 0;
140    
141    chipid = amazon_readl(AMAZON_MCD_CHIPID);
142    part_no = AMAZON_MCD_CHIPID_PART_NUMBER_GET(chipid);
143    
144    if(part_no == AMAZON_CHIPID_YANGTSE){
145        printk("Yangtse Version\n");
146    } else if (part_no == AMAZON_CHIPID_STANDARD) {
147        printk(SYSTEM_MODEL_NAME "\n");
148    } else {
149        printk("unknown version %8x\n",part_no);
150    }
151    
152    amazon_reboot_setup();
153
154    //stop reset TPE and DFE
155    amazon_writel(0, AMAZON_RST_REQ);
156    //clock
157    amazon_writel(0x3fff, AMAZON_PMU_PWDCR);
158    //reenable trace capability
159    part_no = readl(AMAZON_BCU_ECON);
160
161    ioport_resource.start = IOPORT_RESOURCE_START;
162    ioport_resource.end = IOPORT_RESOURCE_END;
163    iomem_resource.start = IOMEM_RESOURCE_START;
164    iomem_resource.end = IOMEM_RESOURCE_END;
165}
166
167static void amazon_machine_restart(char *command)
168{
169    local_irq_disable();
170    amazon_writel(AMAZON_RST_ALL, AMAZON_RST_REQ);
171    for (;;) ;
172}
173
174static void amazon_machine_halt(void)
175{
176    printk(KERN_NOTICE "System halted.\n");
177    local_irq_disable();
178    for (;;) ;
179}
180
181static void amazon_machine_power_off(void)
182{
183    printk(KERN_NOTICE "Please turn off the power now.\n");
184    local_irq_disable();
185    for (;;) ;
186}
187
188static void amazon_reboot_setup(void)
189{
190    _machine_restart = amazon_machine_restart;
191    _machine_halt = amazon_machine_halt;
192    pm_power_off = amazon_machine_power_off;
193}
194

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