| 1 | #ifndef AMAZON_DMA_H |
| 2 | #define AMAZON_DMA_H |
| 3 | |
| 4 | #define RCV_INT 1 |
| 5 | #define TX_BUF_FULL_INT 2 |
| 6 | #define TRANSMIT_CPT_INT 4 |
| 7 | |
| 8 | #define QOS_DEFAULT_WGT 0x7fffffffUL; |
| 9 | |
| 10 | |
| 11 | enum attr_t{ |
| 12 | TX=0, |
| 13 | RX=1, |
| 14 | RESERVED=2, |
| 15 | DEFAULT=3, |
| 16 | |
| 17 | }; |
| 18 | |
| 19 | #ifdef CONFIG_CPU_LITTLE_ENDIAN |
| 20 | typedef struct rx_desc{ |
| 21 | u32 data_length:16; |
| 22 | volatile u32 reserved:7; |
| 23 | volatile u32 byte_offset:2; |
| 24 | volatile u32 Burst_length_offset:3; |
| 25 | volatile u32 EoP:1; |
| 26 | volatile u32 Res:1; |
| 27 | volatile u32 C:1; |
| 28 | volatile u32 OWN:1; |
| 29 | volatile u32 Data_Pointer; |
| 30 | /*fix me:should be 28 bits here, 32 bits just for host simulatiuon purpose*/ |
| 31 | }_rx_desc; |
| 32 | |
| 33 | |
| 34 | typedef struct tx_desc{ |
| 35 | volatile u32 data_length:16; |
| 36 | volatile u32 reserved1:7; |
| 37 | volatile u32 byte_offset:5; |
| 38 | volatile u32 EoP:1; |
| 39 | volatile u32 SoP:1; |
| 40 | volatile u32 C:1; |
| 41 | volatile u32 OWN:1; |
| 42 | volatile u32 Data_Pointer;//fix me:should be 28 bits here |
| 43 | }_tx_desc; |
| 44 | #else //BIG |
| 45 | typedef struct rx_desc{ |
| 46 | union |
| 47 | { |
| 48 | struct |
| 49 | { |
| 50 | volatile u32 OWN :1; |
| 51 | volatile u32 C :1; |
| 52 | volatile u32 SoP :1; |
| 53 | volatile u32 EoP :1; |
| 54 | volatile u32 Burst_length_offset :3; |
| 55 | volatile u32 byte_offset :2; |
| 56 | volatile u32 reserve :7; |
| 57 | volatile u32 data_length :16; |
| 58 | }field; |
| 59 | |
| 60 | volatile u32 word; |
| 61 | }status; |
| 62 | |
| 63 | volatile u32 Data_Pointer; |
| 64 | }_rx_desc; |
| 65 | |
| 66 | |
| 67 | typedef struct tx_desc{ |
| 68 | union |
| 69 | { |
| 70 | struct |
| 71 | { |
| 72 | volatile u32 OWN :1; |
| 73 | volatile u32 C :1; |
| 74 | volatile u32 SoP :1; |
| 75 | volatile u32 EoP :1; |
| 76 | volatile u32 byte_offset :5; |
| 77 | volatile u32 reserved :7; |
| 78 | volatile u32 data_length :16; |
| 79 | }field; |
| 80 | |
| 81 | volatile u32 word; |
| 82 | }status; |
| 83 | |
| 84 | volatile u32 Data_Pointer; |
| 85 | }_tx_desc; |
| 86 | |
| 87 | #endif //ENDIAN |
| 88 | |
| 89 | struct dma_channel_info{ |
| 90 | /*filled by driver, optional*/ |
| 91 | enum attr_t attr;/*TX or RX*/ |
| 92 | int weight; |
| 93 | int desc_num; |
| 94 | int packet_size; |
| 95 | int control;/*on or off*/ |
| 96 | |
| 97 | int desc_base; |
| 98 | int status; |
| 99 | }; |
| 100 | |
| 101 | typedef struct dma_channel_info _dma_channel_info; |
| 102 | |
| 103 | struct dma_device_info{ |
| 104 | /*variables*/ |
| 105 | /*filled by driver, compulsary*/ |
| 106 | char device_name[15]; |
| 107 | enum attr_t attr;/*default or else*/ |
| 108 | int tx_burst_len; |
| 109 | int rx_burst_len; |
| 110 | |
| 111 | int logic_rx_chan_base; |
| 112 | int logic_tx_chan_base; |
| 113 | u8 on_ch_bit; |
| 114 | /*filled by driver, optional*/ |
| 115 | int weight; |
| 116 | int current_tx_chan; |
| 117 | int current_rx_chan; |
| 118 | int num_tx_chan; |
| 119 | int num_rx_chan; |
| 120 | struct dma_channel_info tx_chan[2]; |
| 121 | struct dma_channel_info rx_chan[4]; |
| 122 | |
| 123 | /*functions, optional*/ |
| 124 | u8* (*buffer_alloc)(int len,int* offset, void** opt); |
| 125 | int (*buffer_free)(u8* dataptr, void* opt); |
| 126 | int (*intr_handler)(struct dma_device_info* info, int status); |
| 127 | /*set by device, clear by dma*/ |
| 128 | int ack; |
| 129 | void * priv; /* used by peripheral driver only */ |
| 130 | }; |
| 131 | typedef struct dma_device_info _dma_device_info; |
| 132 | |
| 133 | int dma_device_register(struct dma_device_info* info); |
| 134 | |
| 135 | int dma_device_unregister(struct dma_device_info* info); |
| 136 | |
| 137 | int dma_device_read(struct dma_device_info* info, u8** dataptr, void** opt); |
| 138 | |
| 139 | int dma_device_write(struct dma_device_info* info, u8* dataptr, int len, void* opt); |
| 140 | |
| 141 | int dma_device_update(struct dma_device_info* info); |
| 142 | |
| 143 | void dma_device_update_rx(struct dma_device_info* dma_dev); |
| 144 | |
| 145 | void dma_device_update_tx(struct dma_device_info* dma_dev); |
| 146 | |
| 147 | void register_handler_sim(int (*handler)(int)); |
| 148 | #endif /* AMAZON_DMA_H */ |
| 149 | |
