| 1 | /* |
| 2 | * TP-LINK TL-WR841N/ND v8 board support |
| 3 | * |
| 4 | * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/platform_device.h> |
| 12 | |
| 13 | #include <asm/mach-ath79/ath79.h> |
| 14 | #include <asm/mach-ath79/ar71xx_regs.h> |
| 15 | |
| 16 | #include "common.h" |
| 17 | #include "dev-eth.h" |
| 18 | #include "dev-gpio-buttons.h" |
| 19 | #include "dev-leds-gpio.h" |
| 20 | #include "dev-m25p80.h" |
| 21 | #include "dev-wmac.h" |
| 22 | #include "machtypes.h" |
| 23 | |
| 24 | #define TL_WR841NV8_GPIO_LED_WLAN 13 |
| 25 | #define TL_WR841NV8_GPIO_LED_QSS 15 |
| 26 | #define TL_WR841NV8_GPIO_LED_WAN 18 |
| 27 | #define TL_WR841NV8_GPIO_LED_LAN1 19 |
| 28 | #define TL_WR841NV8_GPIO_LED_LAN2 20 |
| 29 | #define TL_WR841NV8_GPIO_LED_LAN3 21 |
| 30 | #define TL_WR841NV8_GPIO_LED_LAN4 12 |
| 31 | #define TL_WR841NV8_GPIO_LED_SYSTEM 14 |
| 32 | |
| 33 | #define TL_WR841NV8_GPIO_BTN_RESET 17 |
| 34 | #define TL_WR841NV8_GPIO_SW_RFKILL 16 |
| 35 | |
| 36 | #define TL_WR841NV8_KEYS_POLL_INTERVAL 20 /* msecs */ |
| 37 | #define TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV8_KEYS_POLL_INTERVAL) |
| 38 | |
| 39 | static const char *tl_wr841n_v8_part_probes[] = { |
| 40 | "tp-link", |
| 41 | NULL, |
| 42 | }; |
| 43 | |
| 44 | static struct flash_platform_data tl_wr841n_v8_flash_data = { |
| 45 | .part_probes = tl_wr841n_v8_part_probes, |
| 46 | }; |
| 47 | |
| 48 | static struct gpio_led tl_wr841n_v8_leds_gpio[] __initdata = { |
| 49 | { |
| 50 | .name = "tp-link:green:lan1", |
| 51 | .gpio = TL_WR841NV8_GPIO_LED_LAN1, |
| 52 | .active_low = 1, |
| 53 | }, { |
| 54 | .name = "tp-link:green:lan2", |
| 55 | .gpio = TL_WR841NV8_GPIO_LED_LAN2, |
| 56 | .active_low = 1, |
| 57 | }, { |
| 58 | .name = "tp-link:green:lan3", |
| 59 | .gpio = TL_WR841NV8_GPIO_LED_LAN3, |
| 60 | .active_low = 1, |
| 61 | }, { |
| 62 | .name = "tp-link:green:lan4", |
| 63 | .gpio = TL_WR841NV8_GPIO_LED_LAN4, |
| 64 | .active_low = 1, |
| 65 | }, { |
| 66 | .name = "tp-link:green:qss", |
| 67 | .gpio = TL_WR841NV8_GPIO_LED_QSS, |
| 68 | .active_low = 1, |
| 69 | }, { |
| 70 | .name = "tp-link:green:system", |
| 71 | .gpio = TL_WR841NV8_GPIO_LED_SYSTEM, |
| 72 | .active_low = 1, |
| 73 | }, { |
| 74 | .name = "tp-link:green:wan", |
| 75 | .gpio = TL_WR841NV8_GPIO_LED_WAN, |
| 76 | .active_low = 1, |
| 77 | }, { |
| 78 | .name = "tp-link:green:wlan", |
| 79 | .gpio = TL_WR841NV8_GPIO_LED_WLAN, |
| 80 | .active_low = 1, |
| 81 | }, |
| 82 | }; |
| 83 | |
| 84 | static struct gpio_keys_button tl_wr841n_v8_gpio_keys[] __initdata = { |
| 85 | { |
| 86 | .desc = "Reset button", |
| 87 | .type = EV_KEY, |
| 88 | .code = KEY_RESTART, |
| 89 | .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, |
| 90 | .gpio = TL_WR841NV8_GPIO_BTN_RESET, |
| 91 | .active_low = 1, |
| 92 | }, { |
| 93 | .desc = "RFKILL switch", |
| 94 | .type = EV_SW, |
| 95 | .code = KEY_RFKILL, |
| 96 | .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, |
| 97 | .gpio = TL_WR841NV8_GPIO_SW_RFKILL, |
| 98 | .active_low = 0, |
| 99 | } |
| 100 | }; |
| 101 | |
| 102 | static void __init tl_wr841n_v8_setup(void) |
| 103 | { |
| 104 | u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); |
| 105 | u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); |
| 106 | |
| 107 | ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio), |
| 108 | tl_wr841n_v8_leds_gpio); |
| 109 | |
| 110 | ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, |
| 111 | ARRAY_SIZE(tl_wr841n_v8_gpio_keys), |
| 112 | tl_wr841n_v8_gpio_keys); |
| 113 | |
| 114 | ath79_register_m25p80(&tl_wr841n_v8_flash_data); |
| 115 | |
| 116 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); |
| 117 | |
| 118 | ath79_register_mdio(1, 0x0); |
| 119 | |
| 120 | ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); |
| 121 | ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); |
| 122 | |
| 123 | /* GMAC0 is connected to the PHY0 of the internal switch */ |
| 124 | ath79_switch_data.phy4_mii_en = 1; |
| 125 | ath79_switch_data.phy_poll_mask = BIT(0); |
| 126 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
| 127 | ath79_eth0_data.phy_mask = BIT(0); |
| 128 | ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; |
| 129 | ath79_register_eth(0); |
| 130 | |
| 131 | /* GMAC1 is connected to the internal switch */ |
| 132 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; |
| 133 | ath79_register_eth(1); |
| 134 | |
| 135 | ath79_register_wmac(ee, mac); |
| 136 | } |
| 137 | |
| 138 | MIPS_MACHINE(ATH79_MACH_TL_WR841N_V8, "TL-WR841N-v8", "TP-LINK TL-WR841N/ND v8", |
| 139 | tl_wr841n_v8_setup); |
| 140 | |
