| 1 | /* |
| 2 | * Atheros AP83 board specific SPI Controller driver |
| 3 | * |
| 4 | * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/spinlock.h> |
| 17 | #include <linux/workqueue.h> |
| 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/io.h> |
| 20 | #include <linux/spi/spi.h> |
| 21 | #include <linux/spi/spi_bitbang.h> |
| 22 | #include <linux/bitops.h> |
| 23 | #include <linux/gpio.h> |
| 24 | |
| 25 | #include <asm/mach-ath79/ath79.h> |
| 26 | |
| 27 | #define DRV_DESC "Atheros AP83 board SPI Controller driver" |
| 28 | #define DRV_VERSION "0.1.0" |
| 29 | #define DRV_NAME "ap83-spi" |
| 30 | |
| 31 | #define AP83_SPI_CLK_HIGH (1 << 23) |
| 32 | #define AP83_SPI_CLK_LOW 0 |
| 33 | #define AP83_SPI_MOSI_HIGH (1 << 22) |
| 34 | #define AP83_SPI_MOSI_LOW 0 |
| 35 | |
| 36 | #define AP83_SPI_GPIO_CS 1 |
| 37 | #define AP83_SPI_GPIO_MISO 3 |
| 38 | |
| 39 | struct ap83_spi { |
| 40 | struct spi_bitbang bitbang; |
| 41 | void __iomem *base; |
| 42 | u32 addr; |
| 43 | |
| 44 | struct platform_device *pdev; |
| 45 | }; |
| 46 | |
| 47 | static inline u32 ap83_spi_rr(struct ap83_spi *sp, u32 reg) |
| 48 | { |
| 49 | return __raw_readl(sp->base + reg); |
| 50 | } |
| 51 | |
| 52 | static inline struct ap83_spi *spidev_to_sp(struct spi_device *spi) |
| 53 | { |
| 54 | return spi_master_get_devdata(spi->master); |
| 55 | } |
| 56 | |
| 57 | static inline void setsck(struct spi_device *spi, int val) |
| 58 | { |
| 59 | struct ap83_spi *sp = spidev_to_sp(spi); |
| 60 | |
| 61 | if (val) |
| 62 | sp->addr |= AP83_SPI_CLK_HIGH; |
| 63 | else |
| 64 | sp->addr &= ~AP83_SPI_CLK_HIGH; |
| 65 | |
| 66 | dev_dbg(&spi->dev, "addr=%08x, SCK set to %s\n", |
| 67 | sp->addr, (val) ? "HIGH" : "LOW"); |
| 68 | |
| 69 | ap83_spi_rr(sp, sp->addr); |
| 70 | } |
| 71 | |
| 72 | static inline void setmosi(struct spi_device *spi, int val) |
| 73 | { |
| 74 | struct ap83_spi *sp = spidev_to_sp(spi); |
| 75 | |
| 76 | if (val) |
| 77 | sp->addr |= AP83_SPI_MOSI_HIGH; |
| 78 | else |
| 79 | sp->addr &= ~AP83_SPI_MOSI_HIGH; |
| 80 | |
| 81 | dev_dbg(&spi->dev, "addr=%08x, MOSI set to %s\n", |
| 82 | sp->addr, (val) ? "HIGH" : "LOW"); |
| 83 | |
| 84 | ap83_spi_rr(sp, sp->addr); |
| 85 | } |
| 86 | |
| 87 | static inline u32 getmiso(struct spi_device *spi) |
| 88 | { |
| 89 | u32 ret; |
| 90 | |
| 91 | ret = gpio_get_value(AP83_SPI_GPIO_MISO) ? 1 : 0; |
| 92 | dev_dbg(&spi->dev, "get MISO: %d\n", ret); |
| 93 | |
| 94 | return ret; |
| 95 | } |
| 96 | |
| 97 | static inline void do_spidelay(struct spi_device *spi, unsigned nsecs) |
| 98 | { |
| 99 | ndelay(nsecs); |
| 100 | } |
| 101 | |
| 102 | static void ap83_spi_chipselect(struct spi_device *spi, int on) |
| 103 | { |
| 104 | struct ap83_spi *sp = spidev_to_sp(spi); |
| 105 | |
| 106 | dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1); |
| 107 | |
| 108 | if (on) { |
| 109 | ath79_flash_acquire(); |
| 110 | |
| 111 | sp->addr = 0; |
| 112 | ap83_spi_rr(sp, sp->addr); |
| 113 | |
| 114 | gpio_set_value(AP83_SPI_GPIO_CS, 0); |
| 115 | } else { |
| 116 | gpio_set_value(AP83_SPI_GPIO_CS, 1); |
| 117 | ath79_flash_release(); |
| 118 | } |
| 119 | } |
| 120 | |
| 121 | #define spidelay(nsecs) \ |
| 122 | do { \ |
| 123 | /* Steal the spi_device pointer from our caller. \ |
| 124 | * The bitbang-API should probably get fixed here... */ \ |
| 125 | do_spidelay(spi, nsecs); \ |
| 126 | } while (0) |
| 127 | |
| 128 | #define EXPAND_BITBANG_TXRX |
| 129 | #include <linux/spi/spi_bitbang.h> |
| 130 | #include "spi-bitbang-txrx.h" |
| 131 | |
| 132 | static u32 ap83_spi_txrx_mode0(struct spi_device *spi, |
| 133 | unsigned nsecs, u32 word, u8 bits) |
| 134 | { |
| 135 | dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits); |
| 136 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits); |
| 137 | } |
| 138 | |
| 139 | static u32 ap83_spi_txrx_mode1(struct spi_device *spi, |
| 140 | unsigned nsecs, u32 word, u8 bits) |
| 141 | { |
| 142 | dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits); |
| 143 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits); |
| 144 | } |
| 145 | |
| 146 | static u32 ap83_spi_txrx_mode2(struct spi_device *spi, |
| 147 | unsigned nsecs, u32 word, u8 bits) |
| 148 | { |
| 149 | dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits); |
| 150 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits); |
| 151 | } |
| 152 | |
| 153 | static u32 ap83_spi_txrx_mode3(struct spi_device *spi, |
| 154 | unsigned nsecs, u32 word, u8 bits) |
| 155 | { |
| 156 | dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits); |
| 157 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits); |
| 158 | } |
| 159 | |
| 160 | static int ap83_spi_probe(struct platform_device *pdev) |
| 161 | { |
| 162 | struct spi_master *master; |
| 163 | struct ap83_spi *sp; |
| 164 | struct ap83_spi_platform_data *pdata; |
| 165 | struct resource *r; |
| 166 | int ret; |
| 167 | |
| 168 | ret = gpio_request(AP83_SPI_GPIO_MISO, "spi-miso"); |
| 169 | if (ret) { |
| 170 | dev_err(&pdev->dev, "gpio request failed for MISO\n"); |
| 171 | return ret; |
| 172 | } |
| 173 | |
| 174 | ret = gpio_request(AP83_SPI_GPIO_CS, "spi-cs"); |
| 175 | if (ret) { |
| 176 | dev_err(&pdev->dev, "gpio request failed for CS\n"); |
| 177 | goto err_free_miso; |
| 178 | } |
| 179 | |
| 180 | ret = gpio_direction_input(AP83_SPI_GPIO_MISO); |
| 181 | if (ret) { |
| 182 | dev_err(&pdev->dev, "unable to set direction of MISO\n"); |
| 183 | goto err_free_cs; |
| 184 | } |
| 185 | |
| 186 | ret = gpio_direction_output(AP83_SPI_GPIO_CS, 0); |
| 187 | if (ret) { |
| 188 | dev_err(&pdev->dev, "unable to set direction of CS\n"); |
| 189 | goto err_free_cs; |
| 190 | } |
| 191 | |
| 192 | master = spi_alloc_master(&pdev->dev, sizeof(*sp)); |
| 193 | if (master == NULL) { |
| 194 | dev_err(&pdev->dev, "failed to allocate spi master\n"); |
| 195 | return -ENOMEM; |
| 196 | } |
| 197 | |
| 198 | sp = spi_master_get_devdata(master); |
| 199 | platform_set_drvdata(pdev, sp); |
| 200 | |
| 201 | pdata = pdev->dev.platform_data; |
| 202 | |
| 203 | sp->bitbang.master = spi_master_get(master); |
| 204 | sp->bitbang.chipselect = ap83_spi_chipselect; |
| 205 | sp->bitbang.txrx_word[SPI_MODE_0] = ap83_spi_txrx_mode0; |
| 206 | sp->bitbang.txrx_word[SPI_MODE_1] = ap83_spi_txrx_mode1; |
| 207 | sp->bitbang.txrx_word[SPI_MODE_2] = ap83_spi_txrx_mode2; |
| 208 | sp->bitbang.txrx_word[SPI_MODE_3] = ap83_spi_txrx_mode3; |
| 209 | |
| 210 | sp->bitbang.master->bus_num = pdev->id; |
| 211 | sp->bitbang.master->num_chipselect = 1; |
| 212 | |
| 213 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 214 | if (r == NULL) { |
| 215 | ret = -ENOENT; |
| 216 | goto err_spi_put; |
| 217 | } |
| 218 | |
| 219 | sp->base = ioremap_nocache(r->start, r->end - r->start + 1); |
| 220 | if (!sp->base) { |
| 221 | ret = -ENXIO; |
| 222 | goto err_spi_put; |
| 223 | } |
| 224 | |
| 225 | ret = spi_bitbang_start(&sp->bitbang); |
| 226 | if (!ret) |
| 227 | goto err_unmap; |
| 228 | |
| 229 | dev_info(&pdev->dev, "AP83 SPI adapter at %08x\n", r->start); |
| 230 | |
| 231 | return 0; |
| 232 | |
| 233 | err_unmap: |
| 234 | iounmap(sp->base); |
| 235 | err_spi_put: |
| 236 | platform_set_drvdata(pdev, NULL); |
| 237 | spi_master_put(sp->bitbang.master); |
| 238 | |
| 239 | err_free_cs: |
| 240 | gpio_free(AP83_SPI_GPIO_CS); |
| 241 | err_free_miso: |
| 242 | gpio_free(AP83_SPI_GPIO_MISO); |
| 243 | return ret; |
| 244 | } |
| 245 | |
| 246 | static int ap83_spi_remove(struct platform_device *pdev) |
| 247 | { |
| 248 | struct ap83_spi *sp = platform_get_drvdata(pdev); |
| 249 | |
| 250 | spi_bitbang_stop(&sp->bitbang); |
| 251 | iounmap(sp->base); |
| 252 | platform_set_drvdata(pdev, NULL); |
| 253 | spi_master_put(sp->bitbang.master); |
| 254 | |
| 255 | return 0; |
| 256 | } |
| 257 | |
| 258 | static struct platform_driver ap83_spi_drv = { |
| 259 | .probe = ap83_spi_probe, |
| 260 | .remove = ap83_spi_remove, |
| 261 | .driver = { |
| 262 | .name = DRV_NAME, |
| 263 | .owner = THIS_MODULE, |
| 264 | }, |
| 265 | }; |
| 266 | |
| 267 | static int __init ap83_spi_init(void) |
| 268 | { |
| 269 | return platform_driver_register(&ap83_spi_drv); |
| 270 | } |
| 271 | module_init(ap83_spi_init); |
| 272 | |
| 273 | static void __exit ap83_spi_exit(void) |
| 274 | { |
| 275 | platform_driver_unregister(&ap83_spi_drv); |
| 276 | } |
| 277 | module_exit(ap83_spi_exit); |
| 278 | |
| 279 | MODULE_ALIAS("platform:" DRV_NAME); |
| 280 | MODULE_DESCRIPTION(DRV_DESC); |
| 281 | MODULE_VERSION(DRV_VERSION); |
| 282 | MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); |
| 283 | MODULE_LICENSE("GPL v2"); |
| 284 | |
