| 1 | /* |
| 2 | * Driver for ADC on Atmel AT91 SoC Family |
| 3 | * |
| 4 | * Copyright (C) 2010 Claudio Mignanti - c.mignanti@gmail.com |
| 5 | * Based on http://www.at91.com/forum/viewtopic.php/p,9409/#p9409 |
| 6 | * |
| 7 | * Copyright (C) 2010 Stefano Barbato - stefano@codesink.org |
| 8 | * |
| 9 | * 2010/05/18 Antonio Galea |
| 10 | * Sysfs device model, different drivers integration |
| 11 | * |
| 12 | * WISHLIST: |
| 13 | * - concurrent access control |
| 14 | * - add support for dynamic reconfiguration |
| 15 | * - hardware triggers |
| 16 | * |
| 17 | * This program is free software; you can redistribute it and/or modify |
| 18 | * it under the terms of the GNU General Public License as published by |
| 19 | * the Free Software Foundation. |
| 20 | * |
| 21 | * --------------------------------------------------------------------------- |
| 22 | */ |
| 23 | |
| 24 | #include <linux/cdev.h> |
| 25 | #include <linux/clk.h> |
| 26 | #include <linux/fs.h> |
| 27 | #include <linux/gpio.h> |
| 28 | #include <linux/init.h> |
| 29 | #include <linux/module.h> |
| 30 | #include <linux/platform_device.h> |
| 31 | #include <linux/kernel.h> |
| 32 | #include <linux/smp_lock.h> |
| 33 | |
| 34 | #include <asm/io.h> |
| 35 | |
| 36 | #include "at91_adc.h" |
| 37 | |
| 38 | #define DRV_CLASS "at91_adc" |
| 39 | |
| 40 | #define ADC_REQUEST 1 //un-used atm |
| 41 | #define ADC_READ 2 |
| 42 | #define ADC_FREE 3 |
| 43 | |
| 44 | /* Device functions */ |
| 45 | #define at91_adc_read(reg) ioread32(at91_adc_base + (reg)) |
| 46 | #define at91_adc_write(reg, val) iowrite32((val), at91_adc_base + (reg)) |
| 47 | #define AT91_DEFAULT_CONFIG AT91_ADC_SHTIM | \ |
| 48 | AT91_ADC_STARTUP | \ |
| 49 | AT91_ADC_PRESCAL | \ |
| 50 | AT91_ADC_SLEEP |
| 51 | |
| 52 | static void at91_adc_device_release(struct device *dev) {} |
| 53 | |
| 54 | struct platform_device at91_adc_device = { |
| 55 | .name = "at91_adc", |
| 56 | .id = -1, |
| 57 | .dev.release = at91_adc_device_release, |
| 58 | }; |
| 59 | |
| 60 | struct clk *at91_adc_clk; |
| 61 | void __iomem *at91_adc_base; |
| 62 | void __iomem *at91_pioc_base; |
| 63 | static struct cdev *at91_adc_cdev = NULL; |
| 64 | static dev_t at91_adc_devno = 0; |
| 65 | static struct class *at91_adc_class = NULL; |
| 66 | |
| 67 | static int at91_adc_read_chan(int chan){ |
| 68 | int val, sr; |
| 69 | |
| 70 | if(chan<0 || chan>3){ |
| 71 | return -EINVAL; |
| 72 | } |
| 73 | /* disable pull-up resistor */ |
| 74 | iowrite32(1 << chan, at91_pioc_base + 0x60); |
| 75 | |
| 76 | at91_adc_write(AT91_ADC_CHER,AT91_ADC_CH(chan)); // Enable Channel |
| 77 | at91_adc_write(AT91_ADC_CR,AT91_ADC_START); //Start the ADC |
| 78 | |
| 79 | for(sr=0; !(sr & AT91_ADC_EOC(chan)); sr=at91_adc_read(AT91_ADC_SR)) |
| 80 | cpu_relax(); |
| 81 | |
| 82 | val=at91_adc_read(AT91_ADC_CHR(chan)) & AT91_ADC_DATA; //Read up to 10 bits |
| 83 | |
| 84 | return val; |
| 85 | } |
| 86 | |
| 87 | /* PC0 -> AD0 |
| 88 | PC1 -> AD1 |
| 89 | PC2 -> AD2 |
| 90 | PC3 -> AD3 */ |
| 91 | static int mux_chan (int chan, int operation) { |
| 92 | |
| 93 | int pin_chan; |
| 94 | |
| 95 | if(chan<0 || chan>3){ |
| 96 | return -EINVAL; |
| 97 | } |
| 98 | |
| 99 | switch (chan) { |
| 100 | case 0: |
| 101 | pin_chan=AT91_PIN_PC0; |
| 102 | break; |
| 103 | case 1: |
| 104 | pin_chan=AT91_PIN_PC1; |
| 105 | break; |
| 106 | case 2: |
| 107 | pin_chan=AT91_PIN_PC2; |
| 108 | break; |
| 109 | case 3: |
| 110 | pin_chan=AT91_PIN_PC3; |
| 111 | break; |
| 112 | default: |
| 113 | return -EINVAL; |
| 114 | } |
| 115 | |
| 116 | if (operation == 1) //request_chan |
| 117 | at91_set_A_periph(pin_chan, 0); //Mux PIN to GPIO |
| 118 | else //free_chan |
| 119 | at91_set_B_periph(pin_chan, 0); //Mux PIN to GPIO |
| 120 | |
| 121 | return 0; |
| 122 | } |
| 123 | |
| 124 | static int at91_adc_config(int requested_config){ |
| 125 | int actual_config; |
| 126 | |
| 127 | at91_adc_write(AT91_ADC_CR,AT91_ADC_SWRST); //Reset the ADC |
| 128 | at91_adc_write(AT91_ADC_MR,requested_config); //Mode setup |
| 129 | actual_config = at91_adc_read(AT91_ADC_MR); //Read it back |
| 130 | |
| 131 | return (requested_config==actual_config? 0: -EINVAL); |
| 132 | } |
| 133 | |
| 134 | /* Sysfs interface */ |
| 135 | static ssize_t at91_adc_chanX_show( |
| 136 | struct device *dev, struct device_attribute *attr, char *buf ){ |
| 137 | |
| 138 | ssize_t status = 0; |
| 139 | int chan = -1; |
| 140 | int value; |
| 141 | |
| 142 | if(strlen(attr->attr.name)==5 && strncmp(attr->attr.name,"chan",4)==0){ |
| 143 | chan = attr->attr.name[4]-'0'; |
| 144 | } |
| 145 | |
| 146 | if(chan<0 || chan>3){ |
| 147 | return -EIO; |
| 148 | } |
| 149 | |
| 150 | value = at91_adc_read_chan(chan); |
| 151 | status = sprintf(buf, "%d\n", value); |
| 152 | |
| 153 | return status; |
| 154 | } |
| 155 | |
| 156 | static DEVICE_ATTR(chan0, 0444, at91_adc_chanX_show, NULL); |
| 157 | static DEVICE_ATTR(chan1, 0444, at91_adc_chanX_show, NULL); |
| 158 | static DEVICE_ATTR(chan2, 0444, at91_adc_chanX_show, NULL); |
| 159 | static DEVICE_ATTR(chan3, 0444, at91_adc_chanX_show, NULL); |
| 160 | |
| 161 | static const struct attribute *at91_adc_dev_attrs[] = { |
| 162 | &dev_attr_chan0.attr, |
| 163 | &dev_attr_chan1.attr, |
| 164 | &dev_attr_chan2.attr, |
| 165 | &dev_attr_chan3.attr, |
| 166 | NULL, |
| 167 | }; |
| 168 | |
| 169 | static const struct attribute_group at91_adc_dev_attr_group = { |
| 170 | .attrs = (struct attribute **) at91_adc_dev_attrs, |
| 171 | }; |
| 172 | |
| 173 | /* IOCTL interface */ |
| 174 | #ifdef HAVE_UNLOCKED_IOCTL |
| 175 | static long at91_adc_unlocked_ioctl( |
| 176 | struct file *file, unsigned int cmd, unsigned long arg){ |
| 177 | #else |
| 178 | static int at91_adc_ioctl( |
| 179 | struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg){ |
| 180 | #endif |
| 181 | |
| 182 | long retval = 0; |
| 183 | |
| 184 | #ifdef HAVE_UNLOCKED_IOCTL |
| 185 | lock_kernel(); |
| 186 | #endif |
| 187 | |
| 188 | switch (cmd) { |
| 189 | case ADC_REQUEST: |
| 190 | retval = mux_chan ((int)arg, 1); |
| 191 | break; |
| 192 | |
| 193 | case ADC_READ: |
| 194 | retval = at91_adc_read_chan((int)arg); |
| 195 | break; |
| 196 | |
| 197 | case ADC_FREE: |
| 198 | retval = mux_chan ((int)arg, 0); |
| 199 | break; |
| 200 | |
| 201 | default: |
| 202 | retval = -EINVAL; |
| 203 | } |
| 204 | |
| 205 | #ifdef HAVE_UNLOCKED_IOCTL |
| 206 | unlock_kernel(); |
| 207 | #endif |
| 208 | |
| 209 | return retval; |
| 210 | } |
| 211 | |
| 212 | struct file_operations at91_adc_fops = { |
| 213 | .owner = THIS_MODULE, |
| 214 | #ifdef HAVE_UNLOCKED_IOCTL |
| 215 | .unlocked_ioctl = at91_adc_unlocked_ioctl, |
| 216 | #else |
| 217 | .ioctl = at91_adc_ioctl, |
| 218 | #endif |
| 219 | }; |
| 220 | |
| 221 | static void at91_adc_cdev_teardown(void){ |
| 222 | if(at91_adc_class){ |
| 223 | device_destroy(at91_adc_class, at91_adc_devno); |
| 224 | class_destroy(at91_adc_class); |
| 225 | } |
| 226 | |
| 227 | if(at91_adc_devno){ |
| 228 | unregister_chrdev_region(at91_adc_devno,1); |
| 229 | if(at91_adc_cdev){ cdev_del(at91_adc_cdev); } |
| 230 | } |
| 231 | |
| 232 | at91_adc_devno = 0; |
| 233 | at91_adc_cdev = NULL; |
| 234 | at91_adc_class = NULL; |
| 235 | return; |
| 236 | } |
| 237 | |
| 238 | static int at91_adc_cdev_setup(void){ |
| 239 | |
| 240 | int status; |
| 241 | /* alloc a new device number (major: dynamic, minor: 0) */ |
| 242 | status = alloc_chrdev_region(&at91_adc_devno,0,1,at91_adc_device.name); |
| 243 | |
| 244 | if(status){ |
| 245 | goto err; |
| 246 | } |
| 247 | |
| 248 | /* create a new char device */ |
| 249 | at91_adc_cdev = cdev_alloc(); |
| 250 | if(at91_adc_cdev == NULL){ status=-ENOMEM; goto err; } |
| 251 | at91_adc_cdev->owner = THIS_MODULE; |
| 252 | at91_adc_cdev->ops = &at91_adc_fops; |
| 253 | status = cdev_add(at91_adc_cdev,at91_adc_devno,1); |
| 254 | if(status){ |
| 255 | goto err; |
| 256 | } |
| 257 | |
| 258 | /* register the class */ |
| 259 | at91_adc_class = class_create(THIS_MODULE, DRV_CLASS); |
| 260 | if(IS_ERR(at91_adc_class)){ status=-EFAULT; goto err; } |
| 261 | device_create(at91_adc_class, NULL, at91_adc_devno, NULL, at91_adc_device.name); |
| 262 | printk(KERN_INFO "Major: %u; minor: %u\n", \ |
| 263 | MAJOR(at91_adc_devno), MINOR(at91_adc_devno) \ |
| 264 | ); |
| 265 | |
| 266 | return 0; |
| 267 | |
| 268 | err: |
| 269 | at91_adc_cdev_teardown(); |
| 270 | return status; |
| 271 | } |
| 272 | |
| 273 | /* Module init/exit */ |
| 274 | static int __init at91_adc_init(void){ |
| 275 | |
| 276 | int status; |
| 277 | |
| 278 | at91_adc_clk = clk_get(NULL,"adc_clk"); |
| 279 | clk_enable(at91_adc_clk); |
| 280 | |
| 281 | at91_adc_base = ioremap(AT91SAM9260_BASE_ADC,SZ_256); |
| 282 | if(!at91_adc_base){ |
| 283 | status=-ENODEV; |
| 284 | goto fail_no_iomem_adc; |
| 285 | } |
| 286 | |
| 287 | at91_pioc_base = ioremap(AT91_BASE_SYS + AT91_PIOC,SZ_512); |
| 288 | if(!at91_pioc_base){ |
| 289 | status=-ENODEV; |
| 290 | goto fail_no_iomem_pioc; |
| 291 | } |
| 292 | |
| 293 | status = platform_device_register(&at91_adc_device); |
| 294 | if(status){ |
| 295 | goto fail_no_dev; |
| 296 | } |
| 297 | |
| 298 | status = at91_adc_config(AT91_DEFAULT_CONFIG); |
| 299 | if(status){ |
| 300 | goto fail_no_config; |
| 301 | } |
| 302 | |
| 303 | status = sysfs_create_group( |
| 304 | &(at91_adc_device.dev.kobj), &at91_adc_dev_attr_group |
| 305 | ); |
| 306 | |
| 307 | if(status){ |
| 308 | goto fail_no_sysfs; |
| 309 | } |
| 310 | |
| 311 | status = at91_adc_cdev_setup(); |
| 312 | if(status){ |
| 313 | goto fail_no_cdev; |
| 314 | } |
| 315 | |
| 316 | printk(KERN_INFO "Registered device at91_adc.\n"); |
| 317 | return 0; |
| 318 | |
| 319 | fail_no_cdev: |
| 320 | fail_no_sysfs: |
| 321 | // nothing to undo |
| 322 | fail_no_config: |
| 323 | platform_device_unregister(&at91_adc_device); |
| 324 | fail_no_dev: |
| 325 | iounmap(at91_adc_base); |
| 326 | fail_no_iomem_pioc: |
| 327 | iounmap(at91_pioc_base); |
| 328 | fail_no_iomem_adc: |
| 329 | clk_disable(at91_adc_clk); |
| 330 | clk_put(at91_adc_clk); |
| 331 | return status; |
| 332 | } |
| 333 | |
| 334 | static void __exit at91_adc_exit(void){ |
| 335 | |
| 336 | at91_adc_cdev_teardown(); |
| 337 | platform_device_unregister(&at91_adc_device); |
| 338 | iounmap(at91_adc_base); |
| 339 | iounmap(at91_pioc_base); |
| 340 | |
| 341 | clk_disable(at91_adc_clk); |
| 342 | clk_put(at91_adc_clk); |
| 343 | |
| 344 | printk(KERN_INFO "Unregistered device at91_adc.\n"); |
| 345 | } |
| 346 | |
| 347 | module_init(at91_adc_init); |
| 348 | module_exit(at91_adc_exit); |
| 349 | |
| 350 | MODULE_AUTHOR("Paul Kavan"); |
| 351 | MODULE_AUTHOR("Claudio Mignanti"); |
| 352 | MODULE_AUTHOR("Antonio Galea"); |
| 353 | MODULE_AUTHOR("Stefano Barbato"); |
| 354 | MODULE_DESCRIPTION("ADC Driver for the AT91SAM9G20"); |
| 355 | MODULE_LICENSE("GPL"); |
| 356 | |
