| 1 | --- a/drivers/bcma/driver_chipcommon.c |
| 2 | +++ b/drivers/bcma/driver_chipcommon.c |
| 3 | @@ -158,6 +158,8 @@ void bcma_core_chipcommon_init(struct bc |
| 4 | } |
| 5 | cc->ticks_per_ms = bcma_chipco_watchdog_ticks_per_ms(cc); |
| 6 | |
| 7 | + spin_lock_init(&cc->gpio_lock); |
| 8 | + |
| 9 | cc->setup_done = true; |
| 10 | } |
| 11 | |
| 12 | @@ -197,34 +199,81 @@ u32 bcma_chipco_irq_status(struct bcma_d |
| 13 | |
| 14 | u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask) |
| 15 | { |
| 16 | - return bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask; |
| 17 | + unsigned long flags; |
| 18 | + u32 res; |
| 19 | + |
| 20 | + spin_lock_irqsave(&cc->gpio_lock, flags); |
| 21 | + res = bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask; |
| 22 | + spin_unlock_irqrestore(&cc->gpio_lock, flags); |
| 23 | + |
| 24 | + return res; |
| 25 | } |
| 26 | +EXPORT_SYMBOL_GPL(bcma_chipco_gpio_in); |
| 27 | |
| 28 | u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value) |
| 29 | { |
| 30 | - return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value); |
| 31 | + unsigned long flags; |
| 32 | + u32 res; |
| 33 | + |
| 34 | + spin_lock_irqsave(&cc->gpio_lock, flags); |
| 35 | + res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value); |
| 36 | + spin_unlock_irqrestore(&cc->gpio_lock, flags); |
| 37 | + |
| 38 | + return res; |
| 39 | } |
| 40 | +EXPORT_SYMBOL_GPL(bcma_chipco_gpio_out); |
| 41 | |
| 42 | u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value) |
| 43 | { |
| 44 | - return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value); |
| 45 | + unsigned long flags; |
| 46 | + u32 res; |
| 47 | + |
| 48 | + spin_lock_irqsave(&cc->gpio_lock, flags); |
| 49 | + res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value); |
| 50 | + spin_unlock_irqrestore(&cc->gpio_lock, flags); |
| 51 | + |
| 52 | + return res; |
| 53 | } |
| 54 | +EXPORT_SYMBOL_GPL(bcma_chipco_gpio_outen); |
| 55 | |
| 56 | u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value) |
| 57 | { |
| 58 | - return bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value); |
| 59 | + unsigned long flags; |
| 60 | + u32 res; |
| 61 | + |
| 62 | + spin_lock_irqsave(&cc->gpio_lock, flags); |
| 63 | + res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value); |
| 64 | + spin_unlock_irqrestore(&cc->gpio_lock, flags); |
| 65 | + |
| 66 | + return res; |
| 67 | } |
| 68 | EXPORT_SYMBOL_GPL(bcma_chipco_gpio_control); |
| 69 | |
| 70 | u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value) |
| 71 | { |
| 72 | - return bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value); |
| 73 | + unsigned long flags; |
| 74 | + u32 res; |
| 75 | + |
| 76 | + spin_lock_irqsave(&cc->gpio_lock, flags); |
| 77 | + res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value); |
| 78 | + spin_unlock_irqrestore(&cc->gpio_lock, flags); |
| 79 | + |
| 80 | + return res; |
| 81 | } |
| 82 | +EXPORT_SYMBOL_GPL(bcma_chipco_gpio_intmask); |
| 83 | |
| 84 | u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value) |
| 85 | { |
| 86 | - return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value); |
| 87 | + unsigned long flags; |
| 88 | + u32 res; |
| 89 | + |
| 90 | + spin_lock_irqsave(&cc->gpio_lock, flags); |
| 91 | + res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value); |
| 92 | + spin_unlock_irqrestore(&cc->gpio_lock, flags); |
| 93 | + |
| 94 | + return res; |
| 95 | } |
| 96 | +EXPORT_SYMBOL_GPL(bcma_chipco_gpio_polarity); |
| 97 | |
| 98 | #ifdef CONFIG_BCMA_DRIVER_MIPS |
| 99 | void bcma_chipco_serial_init(struct bcma_drv_cc *cc) |
| 100 | --- a/include/linux/bcma/bcma_driver_chipcommon.h |
| 101 | +++ b/include/linux/bcma/bcma_driver_chipcommon.h |
| 102 | @@ -555,6 +555,9 @@ struct bcma_drv_cc { |
| 103 | #endif /* CONFIG_BCMA_DRIVER_MIPS */ |
| 104 | u32 ticks_per_ms; |
| 105 | struct platform_device *watchdog; |
| 106 | + |
| 107 | + /* Lock for GPIO register access. */ |
| 108 | + spinlock_t gpio_lock; |
| 109 | }; |
| 110 | |
| 111 | /* Register access */ |
| 112 | @@ -584,13 +587,22 @@ void bcma_chipco_irq_mask(struct bcma_dr |
| 113 | |
| 114 | u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask); |
| 115 | |
| 116 | +#define BCMA_CC_GPIO_LINES 16 |
| 117 | + |
| 118 | /* Chipcommon GPIO pin access. */ |
| 119 | -u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask); |
| 120 | -u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value); |
| 121 | -u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value); |
| 122 | -u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value); |
| 123 | -u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value); |
| 124 | -u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value); |
| 125 | +extern u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask); |
| 126 | +extern u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value); |
| 127 | +extern u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value); |
| 128 | +extern u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, |
| 129 | + u32 value); |
| 130 | +extern u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, |
| 131 | + u32 value); |
| 132 | +extern u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, |
| 133 | + u32 value); |
| 134 | +static inline int bcma_chipco_gpio_count(void) |
| 135 | +{ |
| 136 | + return BCMA_CC_GPIO_LINES; |
| 137 | +} |
| 138 | |
| 139 | /* PMU support */ |
| 140 | extern void bcma_pmu_init(struct bcma_drv_cc *cc); |
| 141 | |