| 1 | --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c |
| 2 | +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c |
| 3 | @@ -939,7 +939,7 @@ int __init board_register_devices(void) |
| 4 | /* register any fixups */ |
| 5 | for (i = 0; i < board.has_caldata; i++) |
| 6 | pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, |
| 7 | - board.caldata[i].endian_check); |
| 8 | + board.caldata[i].endian_check, board.caldata[i].led_pin); |
| 9 | |
| 10 | return 0; |
| 11 | } |
| 12 | --- a/arch/mips/bcm63xx/pci-ath9k-fixup.c |
| 13 | +++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c |
| 14 | @@ -173,13 +173,14 @@ static void ath9k_pci_fixup(struct pci_d |
| 15 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); |
| 16 | |
| 17 | void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, |
| 18 | - unsigned endian_check) |
| 19 | + unsigned endian_check, int led_pin) |
| 20 | { |
| 21 | if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) |
| 22 | return; |
| 23 | |
| 24 | ath9k_fixups[ath9k_num_fixups].slot = slot; |
| 25 | ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check; |
| 26 | + ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin; |
| 27 | |
| 28 | if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) |
| 29 | return; |
| 30 | --- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |
| 31 | +++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |
| 32 | @@ -19,6 +19,7 @@ struct ath9k_caldata { |
| 33 | unsigned int slot; |
| 34 | u32 caldata_offset; |
| 35 | unsigned int endian_check:1; |
| 36 | + int led_pin; |
| 37 | }; |
| 38 | |
| 39 | /* |
| 40 | --- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h |
| 41 | +++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h |
| 42 | @@ -3,6 +3,6 @@ |
| 43 | |
| 44 | |
| 45 | void pci_enable_ath9k_fixup(unsigned slot, u32 offset, |
| 46 | - unsigned endian_check) __init; |
| 47 | + unsigned endian_check, int led_pin) __init; |
| 48 | |
| 49 | #endif /* _PCI_ATH9K_FIXUP */ |
| 50 | |
