| 1 | --- a/arch/arm/mach-cns3xxx/cns3420vb.c |
| 2 | +++ b/arch/arm/mach-cns3xxx/cns3420vb.c |
| 3 | @@ -214,11 +214,21 @@ static struct map_desc cns3420_io_desc[] |
| 4 | static void __init cns3420_map_io(void) |
| 5 | { |
| 6 | cns3xxx_map_io(); |
| 7 | + cns3xxx_pcie_iotable_init(); |
| 8 | iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc)); |
| 9 | |
| 10 | cns3420_early_serial_setup(); |
| 11 | } |
| 12 | |
| 13 | +static int __init cns3420vb_pcie_init(void) |
| 14 | +{ |
| 15 | + if (!machine_is_cns3420vb()) |
| 16 | + return 0; |
| 17 | + |
| 18 | + return cns3xxx_pcie_init(); |
| 19 | +} |
| 20 | +subsys_initcall(cns3420vb_pcie_init); |
| 21 | + |
| 22 | MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") |
| 23 | .atag_offset = 0x100, |
| 24 | .map_io = cns3420_map_io, |
| 25 | --- a/arch/arm/mach-cns3xxx/core.h |
| 26 | +++ b/arch/arm/mach-cns3xxx/core.h |
| 27 | @@ -12,6 +12,8 @@ |
| 28 | #define __CNS3XXX_CORE_H |
| 29 | |
| 30 | extern struct sys_timer cns3xxx_timer; |
| 31 | +extern void cns3xxx_pcie_iotable_init(void); |
| 32 | + |
| 33 | |
| 34 | #ifdef CONFIG_CACHE_L2X0 |
| 35 | void __init cns3xxx_l2x0_init(void); |
| 36 | @@ -21,6 +23,7 @@ static inline void cns3xxx_l2x0_init(voi |
| 37 | |
| 38 | void __init cns3xxx_map_io(void); |
| 39 | void __init cns3xxx_init_irq(void); |
| 40 | +int __init cns3xxx_pcie_init(void); |
| 41 | void cns3xxx_power_off(void); |
| 42 | void cns3xxx_restart(char, const char *); |
| 43 | |
| 44 | --- a/arch/arm/mach-cns3xxx/pcie.c |
| 45 | +++ b/arch/arm/mach-cns3xxx/pcie.c |
| 46 | @@ -456,7 +456,18 @@ static int cns3xxx_pcie_abort_handler(un |
| 47 | return 0; |
| 48 | } |
| 49 | |
| 50 | -static int __init cns3xxx_pcie_init(void) |
| 51 | + |
| 52 | +void __init cns3xxx_pcie_iotable_init() |
| 53 | +{ |
| 54 | + int i; |
| 55 | + |
| 56 | + for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { |
| 57 | + iotable_init(cns3xxx_pcie[i].cfg_bases, |
| 58 | + ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases)); |
| 59 | + } |
| 60 | +} |
| 61 | + |
| 62 | +int __init cns3xxx_pcie_init(void) |
| 63 | { |
| 64 | int i; |
| 65 | |
| 66 | @@ -467,15 +478,14 @@ static int __init cns3xxx_pcie_init(void |
| 67 | "imprecise external abort"); |
| 68 | |
| 69 | for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { |
| 70 | - iotable_init(cns3xxx_pcie[i].cfg_bases, |
| 71 | - ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases)); |
| 72 | cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); |
| 73 | - cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); |
| 74 | - pci_common_init(&cns3xxx_pcie[i].hw_pci); |
| 75 | + if (cns3xxx_pcie[i].linked) { |
| 76 | + cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); |
| 77 | + pci_common_init(&cns3xxx_pcie[i].hw_pci); |
| 78 | + } |
| 79 | } |
| 80 | |
| 81 | pci_assign_unassigned_resources(); |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | -device_initcall(cns3xxx_pcie_init); |
| 86 | |
