Root/target/linux/coldfire/patches/013-Add-MCD-DMA-driver-for-MCF547x-MCF548x.patch

1From de2bd6eff9a9f20c6c997b5384c8e81720d9d659 Mon Sep 17 00:00:00 2001
2From: Alison Wang <b18965@freescale.com>
3Date: Thu, 4 Aug 2011 09:59:43 +0800
4Subject: [PATCH 13/52] Add MCD DMA driver for MCF547x/MCF548x
5
6Add MCD DMA driver for MCF547x/MCF548x.
7
8Signed-off-by: Alison Wang <b18965@freescale.com>
9---
10 arch/m68k/coldfire/m547x/dma.c | 518 ++++++++
11 arch/m68k/include/asm/MCD_dma.h | 434 +++++++
12 drivers/dma/MCD_dma.h | 431 +++++++
13 drivers/dma/MCD_dmaApi.c | 1043 +++++++++++++++++
14 drivers/dma/MCD_progCheck.h | 29 +
15 drivers/dma/MCD_tasks.c | 2457 +++++++++++++++++++++++++++++++++++++++
16 drivers/dma/MCD_tasksInit.c | 271 +++++
17 drivers/dma/MCD_tasksInit.h | 84 ++
18 8 files changed, 5267 insertions(+), 0 deletions(-)
19 create mode 100644 arch/m68k/coldfire/m547x/dma.c
20 create mode 100644 arch/m68k/include/asm/MCD_dma.h
21 create mode 100644 drivers/dma/MCD_dma.h
22 create mode 100644 drivers/dma/MCD_dmaApi.c
23 create mode 100644 drivers/dma/MCD_progCheck.h
24 create mode 100644 drivers/dma/MCD_tasks.c
25 create mode 100644 drivers/dma/MCD_tasksInit.c
26 create mode 100644 drivers/dma/MCD_tasksInit.h
27
28--- /dev/null
29+++ b/arch/m68k/coldfire/m547x/dma.c
30@@ -0,0 +1,518 @@
31+/*
32+ * arch/m68k/coldfire/m547x/dma.c
33+ *
34+ * Coldfire M547x/M548x DMA
35+ *
36+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
37+ * Kurt Mahan <kmahan@freescale.com>
38+ * Shrek Wu b16972@freescale.com
39+ *
40+ * This code is based on patches from the Freescale M547x_8x BSP
41+ * release mcf547x_8x-20070107-ltib.iso
42+ *
43+ * This program is free software; you can redistribute it and/or modify
44+ * it under the terms of the GNU General Public License as published by
45+ * the Free Software Foundation; either version 2 of the License, or
46+ * (at your option) any later version.
47+ *
48+ * This program is distributed in the hope that it will be useful,
49+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
50+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
51+ * GNU General Public License for more details.
52+ *
53+ * You should have received a copy of the GNU General Public License
54+ * along with this program; if not, write to the Free Software
55+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
56+ */
57+#include <linux/kernel.h>
58+#include <linux/sched.h>
59+#include <linux/mm.h>
60+#include <linux/init.h>
61+#include <linux/interrupt.h>
62+#include <asm/io.h>
63+#include <asm/irq.h>
64+#include <asm/dma.h>
65+#include <asm/coldfire.h>
66+#include <asm/m5485sram.h>
67+#include <asm/mcfsim.h>
68+#include <asm/MCD_dma.h>
69+
70+/*
71+ * This global keeps track of which initiators have been
72+ * used of the available assignments. Initiators 0-15 are
73+ * hardwired. Initiators 16-31 are multiplexed and controlled
74+ * via the Initiatior Mux Control Registe (IMCR). The
75+ * assigned requestor is stored with the associated initiator
76+ * number.
77+ */
78+static int used_reqs[32] = {
79+ DMA_ALWAYS, DMA_DSPI_RX, DMA_DSPI_TX, DMA_DREQ0,
80+ DMA_PSC0_RX, DMA_PSC0_TX, DMA_USBEP0, DMA_USBEP1,
81+ DMA_USBEP2, DMA_USBEP3, DMA_PCI_TX, DMA_PCI_RX,
82+ DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX, DMA_I2C_TX,
83+ 0, 0, 0, 0,
84+ 0, 0, 0, 0,
85+ 0, 0, 0, 0,
86+ 0, 0, 0, 0
87+};
88+
89+/*
90+ * This global keeps track of which channels have been assigned
91+ * to tasks. This methology assumes that no single initiator
92+ * will be tied to more than one task/channel
93+ */
94+static char used_channel[16] = {
95+ -1, -1, -1, -1, -1, -1, -1, -1,
96+ -1, -1, -1, -1, -1, -1, -1, -1
97+};
98+
99+unsigned int connected_channel[16] = {
100+ 0, 0, 0, 0, 0, 0, 0, 0,
101+ 0, 0, 0, 0, 0, 0, 0, 0
102+};
103+
104+/**
105+ * dma_set_initiator - enable initiator
106+ * @initiator: initiator identifier
107+ *
108+ * Returns 0 of successful, non-zero otherwise
109+ *
110+ * Attempt to enable the provided Initiator in the Initiator
111+ * Mux Control Register.
112+ */
113+int dma_set_initiator(int initiator)
114+{
115+ switch (initiator) {
116+ case DMA_ALWAYS:
117+ case DMA_DSPI_RX:
118+ case DMA_DSPI_TX:
119+ case DMA_DREQ0:
120+ case DMA_PSC0_RX:
121+ case DMA_PSC0_TX:
122+ case DMA_USBEP0:
123+ case DMA_USBEP1:
124+ case DMA_USBEP2:
125+ case DMA_USBEP3:
126+ case DMA_PCI_TX:
127+ case DMA_PCI_RX:
128+ case DMA_PSC1_RX:
129+ case DMA_PSC1_TX:
130+ case DMA_I2C_RX:
131+ case DMA_I2C_TX:
132+ /*
133+ * These initiators are always active
134+ */
135+ break;
136+
137+ case DMA_FEC0_RX:
138+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC16(3))
139+ | MCF_DMA_IMCR_SRC16_FEC0RX;
140+ used_reqs[16] = DMA_FEC0_RX;
141+ break;
142+
143+ case DMA_FEC0_TX:
144+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC17(3))
145+ | MCF_DMA_IMCR_SRC17_FEC0TX;
146+ used_reqs[17] = DMA_FEC0_TX;
147+ break;
148+
149+ case DMA_FEC1_RX:
150+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC20(3))
151+ | MCF_DMA_IMCR_SRC20_FEC1RX;
152+ used_reqs[20] = DMA_FEC1_RX;
153+ break;
154+
155+ case DMA_FEC1_TX:
156+ if (used_reqs[21] == 0) {
157+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC21(3))
158+ | MCF_DMA_IMCR_SRC21_FEC1TX;
159+ used_reqs[21] = DMA_FEC1_TX;
160+ } else if (used_reqs[25] == 0) {
161+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC25(3))
162+ | MCF_DMA_IMCR_SRC25_FEC1TX;
163+ used_reqs[25] = DMA_FEC1_TX;
164+ } else if (used_reqs[31] == 0) {
165+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC31(3))
166+ | MCF_DMA_IMCR_SRC31_FEC1TX;
167+ used_reqs[31] = DMA_FEC1_TX;
168+ } else /* No empty slots */
169+ return 1;
170+ break;
171+
172+ case DMA_DREQ1:
173+ if (used_reqs[29] == 0) {
174+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC29(3))
175+ | MCF_DMA_IMCR_SRC29_DREQ1;
176+ used_reqs[29] = DMA_DREQ1;
177+ } else if (used_reqs[21] == 0) {
178+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC21(3))
179+ | MCF_DMA_IMCR_SRC21_DREQ1;
180+ used_reqs[21] = DMA_DREQ1;
181+ } else /* No empty slots */
182+ return 1;
183+ break;
184+
185+ case DMA_CTM0:
186+ if (used_reqs[24] == 0) {
187+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC24(3))
188+ | MCF_DMA_IMCR_SRC24_CTM0;
189+ used_reqs[24] = DMA_CTM0;
190+ } else /* No empty slots */
191+ return 1;
192+ break;
193+
194+ case DMA_CTM1:
195+ if (used_reqs[25] == 0) {
196+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC25(3))
197+ | MCF_DMA_IMCR_SRC25_CTM1;
198+ used_reqs[25] = DMA_CTM1;
199+ } else /* No empty slots */
200+ return 1;
201+ break;
202+
203+ case DMA_CTM2:
204+ if (used_reqs[26] == 0) {
205+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC26(3))
206+ | MCF_DMA_IMCR_SRC26_CTM2;
207+ used_reqs[26] = DMA_CTM2;
208+ } else /* No empty slots */
209+ return 1;
210+ break;
211+
212+ case DMA_CTM3:
213+ if (used_reqs[27] == 0) {
214+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC27(3))
215+ | MCF_DMA_IMCR_SRC27_CTM3;
216+ used_reqs[27] = DMA_CTM3;
217+ } else /* No empty slots */
218+ return 1;
219+ break;
220+
221+ case DMA_CTM4:
222+ if (used_reqs[28] == 0) {
223+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC28(3))
224+ | MCF_DMA_IMCR_SRC28_CTM4;
225+ used_reqs[28] = DMA_CTM4;
226+ } else /* No empty slots */
227+ return 1;
228+ break;
229+
230+ case DMA_CTM5:
231+ if (used_reqs[29] == 0) {
232+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC29(3))
233+ | MCF_DMA_IMCR_SRC29_CTM5;
234+ used_reqs[29] = DMA_CTM5;
235+ } else /* No empty slots */
236+ return 1;
237+ break;
238+
239+ case DMA_CTM6:
240+ if (used_reqs[30] == 0) {
241+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC30(3))
242+ | MCF_DMA_IMCR_SRC30_CTM6;
243+ used_reqs[30] = DMA_CTM6;
244+ } else /* No empty slots */
245+ return 1;
246+ break;
247+
248+ case DMA_CTM7:
249+ if (used_reqs[31] == 0) {
250+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC31(3))
251+ | MCF_DMA_IMCR_SRC31_CTM7;
252+ used_reqs[31] = DMA_CTM7;
253+ } else /* No empty slots */
254+ return 1;
255+ break;
256+
257+ case DMA_USBEP4:
258+ if (used_reqs[26] == 0) {
259+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC26(3))
260+ | MCF_DMA_IMCR_SRC26_USBEP4;
261+ used_reqs[26] = DMA_USBEP4;
262+ } else /* No empty slots */
263+ return 1;
264+ break;
265+
266+ case DMA_USBEP5:
267+ if (used_reqs[27] == 0) {
268+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC27(3))
269+ | MCF_DMA_IMCR_SRC27_USBEP5;
270+ used_reqs[27] = DMA_USBEP5;
271+ } else /* No empty slots */
272+ return 1;
273+ break;
274+
275+ case DMA_USBEP6:
276+ if (used_reqs[28] == 0) {
277+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC28(3))
278+ | MCF_DMA_IMCR_SRC28_USBEP6;
279+ used_reqs[28] = DMA_USBEP6;
280+ } else /* No empty slots */
281+ return 1;
282+ break;
283+
284+ case DMA_PSC2_RX:
285+ if (used_reqs[28] == 0) {
286+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC28(3))
287+ | MCF_DMA_IMCR_SRC28_PSC2RX;
288+ used_reqs[28] = DMA_PSC2_RX;
289+ } else /* No empty slots */
290+ return 1;
291+ break;
292+
293+ case DMA_PSC2_TX:
294+ if (used_reqs[29] == 0) {
295+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC29(3))
296+ | MCF_DMA_IMCR_SRC29_PSC2TX;
297+ used_reqs[29] = DMA_PSC2_TX;
298+ } else /* No empty slots */
299+ return 1;
300+ break;
301+
302+ case DMA_PSC3_RX:
303+ if (used_reqs[30] == 0) {
304+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC30(3))
305+ | MCF_DMA_IMCR_SRC30_PSC3RX;
306+ used_reqs[30] = DMA_PSC3_RX;
307+ } else /* No empty slots */
308+ return 1;
309+ break;
310+
311+ case DMA_PSC3_TX:
312+ if (used_reqs[31] == 0) {
313+ MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC31(3))
314+ | MCF_DMA_IMCR_SRC31_PSC3TX;
315+ used_reqs[31] = DMA_PSC3_TX;
316+ } else /* No empty slots */
317+ return 1;
318+ break;
319+
320+ default:
321+ return 1;
322+ }
323+ return 0;
324+}
325+
326+/**
327+ * dma_get_initiator - get the initiator for the given requestor
328+ * @requestor: initiator identifier
329+ *
330+ * Returns initiator number (0-31) if assigned or just 0
331+ */
332+unsigned int dma_get_initiator(int requestor)
333+{
334+ u32 i;
335+
336+ for (i = 0; i < sizeof(used_reqs); ++i) {
337+ if (used_reqs[i] == requestor)
338+ return i;
339+ }
340+ return 0;
341+}
342+
343+/**
344+ * dma_remove_initiator - remove the given initiator from active list
345+ * @requestor: requestor to remove
346+ */
347+void dma_remove_initiator(int requestor)
348+{
349+ u32 i;
350+
351+ for (i = 0; i < sizeof(used_reqs); ++i) {
352+ if (used_reqs[i] == requestor) {
353+ used_reqs[i] = -1;
354+ break;
355+ }
356+ }
357+}
358+
359+/**
360+ * dma_set_channel_fec: find available channel for fec and mark
361+ * @requestor: initiator/requestor identifier
362+ *
363+ * Returns first avaialble channel (0-5) or -1 if all occupied
364+ */
365+int dma_set_channel_fec(int requestor)
366+{
367+ u32 i, t;
368+
369+#ifdef CONFIG_FEC_548x_ENABLE_FEC2
370+ t = 4;
371+#else
372+ t = 2;
373+#endif
374+
375+ for (i = 0; i < t ; ++i) {
376+ if (used_channel[i] == -1) {
377+ used_channel[i] = requestor;
378+ return i;
379+ }
380+ }
381+ /* All channels taken */
382+ return -1;
383+}
384+
385+/**
386+ * dma_set_channel - find an available channel and mark as used
387+ * @requestor: initiator/requestor identifier
388+ *
389+ * Returns first available channel (6-15) or -1 if all occupied
390+ */
391+int dma_set_channel(int requestor)
392+{
393+ u32 i;
394+#ifdef CONFIG_NET_FEC2
395+ i = 4;
396+#else
397+ i = 2;
398+#endif
399+
400+ for (; i < 16; ++i)
401+ if (used_channel[i] == -1) {
402+ used_channel[i] = requestor;
403+ return i;
404+ }
405+
406+ /* All channels taken */
407+ return -1;
408+}
409+
410+/**
411+ * dma_get_channel - get the channel being initiated by the requestor
412+ * @requestor: initiator/requestor identifier
413+ *
414+ * Returns Initiator for requestor or -1 if not found
415+ */
416+int dma_get_channel(int requestor)
417+{
418+ u32 i;
419+
420+ for (i = 0; i < sizeof(used_channel); ++i) {
421+ if (used_channel[i] == requestor)
422+ return i;
423+ }
424+ return -1;
425+}
426+
427+/**
428+ * dma_connect - connect a channel with reference on data
429+ * @channel: channel number
430+ * @address: reference address of data
431+ *
432+ * Returns 0 if success or -1 if invalid channel
433+ */
434+int dma_connect(int channel, int address)
435+{
436+ if ((channel < 16) && (channel >= 0)) {
437+ connected_channel[channel] = address;
438+ return 0;
439+ }
440+ return -1;
441+}
442+
443+/**
444+ * dma_disconnect - disconnect a channel
445+ * @channel: channel number
446+ *
447+ * Returns 0 if success or -1 if invalid channel
448+ */
449+int dma_disconnect(int channel)
450+{
451+ if ((channel < 16) && (channel >= 0)) {
452+ connected_channel[channel] = 0;
453+ return 0;
454+ }
455+ return -1;
456+}
457+
458+/**
459+ * dma_remove_channel - remove channel from the active list
460+ * @requestor: initiator/requestor identifier
461+ */
462+void dma_remove_channel(int requestor)
463+{
464+ u32 i;
465+
466+ for (i = 0; i < sizeof(used_channel); ++i) {
467+ if (used_channel[i] == requestor) {
468+ used_channel[i] = -1;
469+ break;
470+ }
471+ }
472+}
473+
474+/**
475+ * dma_interrupt_handler - dma interrupt handler
476+ * @irq: interrupt number
477+ * @dev_id: data
478+ *
479+ * Returns IRQ_HANDLED
480+ */
481+irqreturn_t dma_interrupt_handler(int irq, void *dev_id)
482+{
483+ u32 i, interrupts;
484+
485+ /*
486+ * Determine which interrupt(s) triggered by AND'ing the
487+ * pending interrupts with those that aren't masked.
488+ */
489+ interrupts = MCF_DMA_DIPR;
490+ MCF_DMA_DIPR = interrupts;
491+
492+ for (i = 0; i < 16; ++i, interrupts >>= 1) {
493+ if (interrupts & 0x1)
494+ if (connected_channel[i] != 0)
495+ ((void (*)(void)) (connected_channel[i])) ();
496+ }
497+
498+ return IRQ_HANDLED;
499+}
500+
501+/**
502+ * dma_remove_channel_by_number - clear dma channel
503+ * @channel: channel number to clear
504+ */
505+void dma_remove_channel_by_number(int channel)
506+{
507+ if ((channel < sizeof(used_channel)) && (channel >= 0))
508+ used_channel[channel] = -1;
509+}
510+
511+/**
512+ * dma_init - initialize the dma subsystem
513+ *
514+ * Returns 0 if success non-zero if failure
515+ *
516+ * Handles the DMA initialization during device setup.
517+ */
518+int __devinit dma_init()
519+{
520+ int result;
521+ char *dma_version_str;
522+
523+ MCD_getVersion(&dma_version_str);
524+ printk(KERN_INFO "m547x_8x DMA: Initialize %s\n", dma_version_str);
525+
526+ /* attempt to setup dma interrupt handler */
527+ if (request_irq(64 + ISC_DMA, dma_interrupt_handler, IRQF_DISABLED,
528+ "MCD-DMA", NULL)) {
529+ printk(KERN_ERR "MCD-DMA: Cannot allocate the DMA IRQ(48)\n");
530+ return 1;
531+ }
532+
533+ MCF_DMA_DIMR = 0;
534+ MCF_DMA_DIPR = 0xFFFFFFFF;
535+
536+ MCF_ICR(ISC_DMA) = ILP_DMA;
537+
538+ result = MCD_initDma((dmaRegs *) (MCF_MBAR + 0x8000),
539+ (void *) SYS_SRAM_DMA_START, MCD_RELOC_TASKS);
540+ if (result != MCD_OK) {
541+ printk(KERN_ERR "MCD-DMA: Cannot perform DMA initialization\n");
542+ free_irq(64 + ISC_DMA, NULL);
543+ return 1;
544+ }
545+
546+ return 0;
547+}
548+device_initcall(dma_init);
549--- /dev/null
550+++ b/arch/m68k/include/asm/MCD_dma.h
551@@ -0,0 +1,434 @@
552+/*********************************************************************
553+ *
554+ * Copyright (C) 2004 Motorola, Inc.
555+ * MOTOROLA, INC. All Rights Reserved.
556+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
557+ * Shrek Wu b16972@freescale.com
558+ *
559+ * You are hereby granted a copyright license to use
560+ * the SOFTWARE so long as this entire notice is
561+ * retained without alteration in any modified and/or redistributed
562+ * versions, and that such modified versions are clearly identified
563+ * as such. No licenses are granted by implication, estoppel or
564+ * otherwise under any patents or trademarks of Motorola, Inc. This
565+ * software is provided on an "AS IS" basis and without warranty.
566+ *
567+ * To the maximum extent permitted by applicable law, MOTOROLA
568+ * DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, INCLUDING
569+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR
570+ * PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH REGARD TO THE
571+ * SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) AND ANY
572+ * ACCOMPANYING WRITTEN MATERIALS.
573+ *
574+ * To the maximum extent permitted by applicable law, IN NO EVENT
575+ * SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER (INCLUDING
576+ * WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS
577+ * INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY
578+ * LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
579+ *
580+ * Motorola assumes no responsibility for the maintenance and support
581+ * of this software
582+ ********************************************************************/
583+
584+/*
585+ * File: MCD_dma.h
586+ * Purpose: Main header file for multi-channel DMA API.
587+ *
588+ * Notes:
589+ *
590+ * Modifications:
591+ */
592+#ifndef _MCD_API_H
593+#define _MCD_API_H
594+
595+#include <asm/types.h>
596+
597+/*
598+ * Turn Execution Unit tasks ON (#define) or OFF (#undef)
599+ */
600+#undef MCD_INCLUDE_EU
601+
602+/*
603+ * Number of DMA channels
604+ */
605+#define NCHANNELS 16
606+
607+/*
608+ * Total number of variants
609+ */
610+#ifdef MCD_INCLUDE_EU
611+#define NUMOFVARIANTS 6
612+#else
613+#define NUMOFVARIANTS 4
614+#endif
615+
616+/*
617+ * Define sizes of the various tables
618+ */
619+#define TASK_TABLE_SIZE (NCHANNELS*32)
620+#define VAR_TAB_SIZE (128)
621+#define CONTEXT_SAVE_SIZE (128)
622+#define FUNCDESC_TAB_SIZE (256)
623+
624+#ifdef MCD_INCLUDE_EU
625+#define FUNCDESC_TAB_NUM 16
626+#else
627+#define FUNCDESC_TAB_NUM 1
628+#endif
629+
630+
631+#ifndef DEFINESONLY
632+
633+/*
634+ * Portability typedefs
635+ */
636+ /*
637+#ifndef s32
638+typedef int s32;
639+#endif
640+#ifndef u32
641+typedef unsigned int u32;
642+#endif
643+#ifndef s16
644+typedef short s16;
645+#endif
646+#ifndef u16
647+typedef unsigned short u16;
648+#endif
649+#ifndef s8
650+typedef char s8;
651+#endif
652+#ifndef u8
653+typedef unsigned char u8;
654+#endif
655+*/
656+/*
657+ * These structures represent the internal registers of the
658+ * multi-channel DMA
659+ */
660+struct dmaRegs_s {
661+ u32 taskbar; /* task table base address register */
662+ u32 currPtr;
663+ u32 endPtr;
664+ u32 varTablePtr;
665+ u16 dma_rsvd0;
666+ u16 ptdControl; /* ptd control */
667+ u32 intPending; /* interrupt pending register */
668+ u32 intMask; /* interrupt mask register */
669+ u16 taskControl[16]; /* task control registers */
670+ u8 priority[32]; /* priority registers */
671+ u32 initiatorMux; /* initiator mux control */
672+ u32 taskSize0; /* task size control register 0. */
673+ u32 taskSize1; /* task size control register 1. */
674+ u32 dma_rsvd1; /* reserved */
675+ u32 dma_rsvd2; /* reserved */
676+ u32 debugComp1; /* debug comparator 1 */
677+ u32 debugComp2; /* debug comparator 2 */
678+ u32 debugControl; /* debug control */
679+ u32 debugStatus; /* debug status */
680+ u32 ptdDebug; /* priority task decode debug */
681+ u32 dma_rsvd3[31]; /* reserved */
682+};
683+typedef volatile struct dmaRegs_s dmaRegs;
684+
685+#endif
686+
687+/*
688+ * PTD contrl reg bits
689+ */
690+#define PTD_CTL_TSK_PRI 0x8000
691+#define PTD_CTL_COMM_PREFETCH 0x0001
692+
693+/*
694+ * Task Control reg bits and field masks
695+ */
696+#define TASK_CTL_EN 0x8000
697+#define TASK_CTL_VALID 0x4000
698+#define TASK_CTL_ALWAYS 0x2000
699+#define TASK_CTL_INIT_MASK 0x1f00
700+#define TASK_CTL_ASTRT 0x0080
701+#define TASK_CTL_HIPRITSKEN 0x0040
702+#define TASK_CTL_HLDINITNUM 0x0020
703+#define TASK_CTL_ASTSKNUM_MASK 0x000f
704+
705+/*
706+ * Priority reg bits and field masks
707+ */
708+#define PRIORITY_HLD 0x80
709+#define PRIORITY_PRI_MASK 0x07
710+
711+/*
712+ * Debug Control reg bits and field masks
713+ */
714+#define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000
715+#define DBG_CTL_AUTO_ARM 0x00008000
716+#define DBG_CTL_BREAK 0x00004000
717+#define DBG_CTL_COMP1_TYP_MASK 0x00003800
718+#define DBG_CTL_COMP2_TYP_MASK 0x00000070
719+#define DBG_CTL_EXT_BREAK 0x00000004
720+#define DBG_CTL_INT_BREAK 0x00000002
721+
722+/*
723+ * PTD Debug reg selector addresses
724+ * This reg must be written with a value to show the contents of
725+ * one of the desired internal register.
726+ */
727+#define PTD_DBG_REQ 0x00 /* shows the state of 31 initiators */
728+#define PTD_DBG_TSK_VLD_INIT 0x01 /* shows which 16 tasks are valid and
729+ have initiators asserted */
730+
731+
732+/*
733+ * General return values
734+ */
735+#define MCD_OK 0
736+#define MCD_ERROR -1
737+#define MCD_TABLE_UNALIGNED -2
738+#define MCD_CHANNEL_INVALID -3
739+
740+/*
741+ * MCD_initDma input flags
742+ */
743+#define MCD_RELOC_TASKS 0x00000001
744+#define MCD_NO_RELOC_TASKS 0x00000000
745+#define MCD_COMM_PREFETCH_EN 0x00000002
746+/* Commbus Prefetching - MCF547x/548x ONLY */
747+
748+/*
749+ * MCD_dmaStatus Status Values for each channel
750+ */
751+#define MCD_NO_DMA 1 /* No DMA has been requested since reset */
752+#define MCD_IDLE 2 /* DMA active, but the initiator is currently inactive */
753+#define MCD_RUNNING 3 /* DMA active, and the initiator is currently active */
754+#define MCD_PAUSED 4 /* DMA active but it is currently paused */
755+#define MCD_HALTED 5
756+/* the most recent DMA has been killed with MCD_killTask() */
757+#define MCD_DONE 6 /* the most recent DMA has completed. */
758+
759+
760+/*
761+ * MCD_startDma parameter defines
762+ */
763+
764+/*
765+ * Constants for the funcDesc parameter
766+ */
767+/* Byte swapping: */
768+#define MCD_NO_BYTE_SWAP 0x00045670 /* to disable byte swapping. */
769+#define MCD_BYTE_REVERSE 0x00076540
770+/* to reverse the bytes of each u32 of the DMAed data. */
771+#define MCD_U16_REVERSE 0x00067450 /* to reverse the 16-bit halves of
772+ each 32-bit data value being DMAed.*/
773+#define MCD_U16_BYTE_REVERSE 0x00054760 /* to reverse the byte halves of each
774+ 16-bit half of each 32-bit data value DMAed */
775+#define MCD_NO_BIT_REV 0x00000000
776+/* do not reverse the bits of each byte DMAed. */
777+#define MCD_BIT_REV 0x00088880 /* reverse the bits of each byte DMAed */
778+/* CRCing: */
779+#define MCD_CRC16 0xc0100000 /* to perform CRC-16 on DMAed data. */
780+#define MCD_CRCCCITT 0xc0200000 /* to perform CRC-CCITT on DMAed data. */
781+#define MCD_CRC32 0xc0300000 /* to perform CRC-32 on DMAed data. */
782+#define MCD_CSUMINET 0xc0400000
783+/* to perform internet checksums on DMAed data.*/
784+#define MCD_NO_CSUM 0xa0000000 /* to perform no checksumming. */
785+
786+#define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | MCD_NO_CSUM)
787+#define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM)
788+
789+/*
790+ * Constants for the flags parameter
791+ */
792+#define MCD_TT_FLAGS_RL 0x00000001 /* Read line */
793+#define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */
794+#define MCD_TT_FLAGS_SP 0x00000004
795+/* Speculative prefetch(XLB) MCF547x/548x ONLY */
796+#define MCD_TT_FLAGS_MASK 0x000000ff
797+#define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW)
798+
799+#define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */
800+#define MCD_CHAIN_DMA /* TBD */
801+#define MCD_EU_DMA /* TBD */
802+#define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */
803+#define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */
804+
805+
806+/* these flags are valid for MCD_startDma and the chained buffer descriptors */
807+#define MCD_BUF_READY 0x80000000
808+/* indicates that this buffer is now under the DMA's control */
809+#define MCD_WRAP 0x20000000
810+/* to tell the FEC Dmas to wrap to the first BD */
811+#define MCD_INTERRUPT 0x10000000
812+/* to generate an interrupt after completion of the DMA. */
813+#define MCD_END_FRAME 0x08000000
814+/* tell the DMA to end the frame when transferring
815+ last byte of data in buffer */
816+#define MCD_CRC_RESTART 0x40000000 /* to empty out the accumulated checksum
817+ prior to performing the DMA. */
818+
819+/* Defines for the FEC buffer descriptor control/status word*/
820+#define MCD_FEC_BUF_READY 0x8000
821+#define MCD_FEC_WRAP 0x2000
822+#define MCD_FEC_INTERRUPT 0x1000
823+#define MCD_FEC_END_FRAME 0x0800
824+
825+
826+/*
827+ * Defines for general intuitiveness
828+ */
829+
830+#define MCD_TRUE 1
831+#define MCD_FALSE 0
832+
833+/*
834+ * Three different cases for destination and source.
835+ */
836+#define MINUS1 -1
837+#define ZERO 0
838+#define PLUS1 1
839+
840+#ifndef DEFINESONLY
841+
842+/* Task Table Entry struct*/
843+typedef struct {
844+ u32 TDTstart; /* task descriptor table start */
845+ u32 TDTend; /* task descriptor table end */
846+ u32 varTab; /* variable table start */
847+ u32 FDTandFlags; /* function descriptor table start and flags */
848+ volatile u32 descAddrAndStatus;
849+ volatile u32 modifiedVarTab;
850+ u32 contextSaveSpace; /* context save space start */
851+ u32 literalBases;
852+} TaskTableEntry;
853+
854+
855+/* Chained buffer descriptor */
856+typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
857+struct MCD_bufDesc_struct {
858+ u32 flags; /* flags describing the DMA */
859+ u32 csumResult;
860+ /* checksum from checksumming performed since last checksum reset */
861+ s8 *srcAddr; /* the address to move data from */
862+ s8 *destAddr; /* the address to move data to */
863+ s8 *lastDestAddr; /* the last address written to */
864+ u32 dmaSize;
865+ /* the number of bytes to transfer independent of the transfer size */
866+ MCD_bufDesc *next; /* next buffer descriptor in chain */
867+ u32 info;
868+ /* private information about this descriptor; DMA does not affect it */
869+};
870+
871+/* Progress Query struct */
872+typedef volatile struct MCD_XferProg_struct {
873+ s8 *lastSrcAddr;
874+ /* the most-recent or last, post-increment source address */
875+ s8 *lastDestAddr;
876+ /* the most-recent or last, post-increment destination address */
877+ u32 dmaSize;
878+ /* the amount of data transferred for the current buffer */
879+ MCD_bufDesc *currBufDesc;
880+ /* pointer to the current buffer descriptor being DMAed */
881+} MCD_XferProg;
882+
883+
884+/* FEC buffer descriptor */
885+typedef volatile struct MCD_bufDescFec_struct {
886+ u16 statCtrl;
887+ u16 length;
888+ u32 dataPointer;
889+} MCD_bufDescFec;
890+
891+
892+/*************************************************************************/
893+/*
894+ * API function Prototypes - see MCD_dmaApi.c for further notes
895+ */
896+
897+/*
898+ * MCD_startDma starts a particular kind of DMA .
899+ */
900+int MCD_startDma(
901+ int channel, /* the channel on which to run the DMA */
902+ /* the address to move data from, or buffer-descriptor address */
903+ s8 *srcAddr,
904+ /* the amount to increment the source address per transfer */
905+ s16 srcIncr,
906+ s8 *destAddr, /* the address to move data to */
907+ /* the amount to increment the destination address per transfer */
908+ s16 destIncr,
909+ /* the number of bytes to transfer independent of the transfer size */
910+ u32 dmaSize,
911+ /* the number bytes in of each data movement (1, 2, or 4) */
912+ u32 xferSize,
913+ u32 initiator, /* what device initiates the DMA */
914+ int priority, /* priority of the DMA */
915+ u32 flags, /* flags describing the DMA */
916+ /* a description of byte swapping, bit swapping, and CRC actions */
917+ u32 funcDesc
918+);
919+
920+/*
921+ * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
922+ * registers, relocating and creating the appropriate task structures, and
923+ * setting up some global settings
924+ */
925+int MCD_initDma(dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);
926+
927+/*
928+ * MCD_dmaStatus() returns the status of the DMA on the requested channel.
929+ */
930+int MCD_dmaStatus(int channel);
931+
932+/*
933+ * MCD_XferProgrQuery() returns progress of DMA on requested channel
934+ */
935+int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep);
936+
937+/*
938+ * MCD_killDma() halts the DMA on the requested channel, without any
939+ * intention of resuming the DMA.
940+ */
941+int MCD_killDma(int channel);
942+
943+/*
944+ * MCD_continDma() continues a DMA which as stopped due to encountering an
945+ * unready buffer descriptor.
946+ */
947+int MCD_continDma(int channel);
948+
949+/*
950+ * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
951+ * running on that channel).
952+ */
953+int MCD_pauseDma(int channel);
954+
955+/*
956+ * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
957+ * running on that channel).
958+ */
959+int MCD_resumeDma(int channel);
960+
961+/*
962+ * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
963+ */
964+int MCD_csumQuery(int channel, u32 *csum);
965+
966+/*
967+ * MCD_getCodeSize provides the packed size required by the microcoded task
968+ * and structures.
969+ */
970+int MCD_getCodeSize(void);
971+
972+/*
973+ * MCD_getVersion provides a pointer to a version string and returns a
974+ * version number.
975+ */
976+int MCD_getVersion(char **longVersion);
977+
978+/* macro for setting a location in the variable table */
979+#define MCD_SET_VAR(taskTab, idx, value) ((u32 *)(taskTab)->varTab)[idx] = value
980+ /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
981+ so I'm avoiding surrounding it with "do {} while(0)" */
982+
983+#endif /* DEFINESONLY */
984+
985+#endif /* _MCD_API_H */
986--- /dev/null
987+++ b/drivers/dma/MCD_dma.h
988@@ -0,0 +1,431 @@
989+/*
990+ * drivers/dma/MCD_dma.h
991+ *
992+ * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
993+ * Kurt Mahan <kmahan@freescale.com>
994+ * Shrek Wu b16972@freescale.com
995+ *
996+ * This program is free software; you can redistribute it and/or
997+ * modify it under the terms of the GNU General Public License as
998+ * published by the Free Software Foundation; either version 2 of
999+ * the License, or (at your option) any later version.
1000+ *
1001+ * This program is distributed in the hope that it will be useful,
1002+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1003+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1004+ * GNU General Public License for more details.
1005+ *
1006+ * You should have received a copy of the GNU General Public License
1007+ * along with this program; if not, write to the Free Software
1008+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1009+ * MA 02111-1307 USA
1010+ */
1011+#ifndef _MCD_API_H
1012+#define _MCD_API_H
1013+
1014+/*
1015+ * Turn Execution Unit tasks ON (#define) or OFF (#undef)
1016+ */
1017+#undef MCD_INCLUDE_EU
1018+
1019+/*
1020+ * Number of DMA channels
1021+ */
1022+#define NCHANNELS 16
1023+
1024+/*
1025+ * Total number of variants
1026+ */
1027+#ifdef MCD_INCLUDE_EU
1028+#define NUMOFVARIANTS 6
1029+#else
1030+#define NUMOFVARIANTS 4
1031+#endif
1032+
1033+/*
1034+ * Define sizes of the various tables
1035+ */
1036+#define TASK_TABLE_SIZE (NCHANNELS*32)
1037+#define VAR_TAB_SIZE (128)
1038+#define CONTEXT_SAVE_SIZE (128)
1039+#define FUNCDESC_TAB_SIZE (256)
1040+
1041+#ifdef MCD_INCLUDE_EU
1042+#define FUNCDESC_TAB_NUM 16
1043+#else
1044+#define FUNCDESC_TAB_NUM 1
1045+#endif
1046+
1047+
1048+#ifndef DEFINESONLY
1049+
1050+/*
1051+ * Portability typedefs
1052+ */
1053+typedef int s32;
1054+typedef unsigned int u32;
1055+typedef short s16;
1056+typedef unsigned short u16;
1057+typedef char s8;
1058+typedef unsigned char u8;
1059+
1060+/*
1061+ * These structures represent the internal registers of the
1062+ * multi-channel DMA
1063+ */
1064+struct dmaRegs_s {
1065+ u32 taskbar; /* task table base address register */
1066+ u32 currPtr;
1067+ u32 endPtr;
1068+ u32 varTablePtr;
1069+ u16 dma_rsvd0;
1070+ u16 ptdControl; /* ptd control */
1071+ u32 intPending; /* interrupt pending register */
1072+ u32 intMask; /* interrupt mask register */
1073+ u16 taskControl[16]; /* task control registers */
1074+ u8 priority[32]; /* priority registers */
1075+ u32 initiatorMux; /* initiator mux control */
1076+ u32 taskSize0; /* task size control register 0. */
1077+ u32 taskSize1; /* task size control register 1. */
1078+ u32 dma_rsvd1; /* reserved */
1079+ u32 dma_rsvd2; /* reserved */
1080+ u32 debugComp1; /* debug comparator 1 */
1081+ u32 debugComp2; /* debug comparator 2 */
1082+ u32 debugControl; /* debug control */
1083+ u32 debugStatus; /* debug status */
1084+ u32 ptdDebug; /* priority task decode debug */
1085+ u32 dma_rsvd3[31]; /* reserved */
1086+};
1087+typedef volatile struct dmaRegs_s dmaRegs;
1088+
1089+#endif
1090+
1091+/*
1092+ * PTD contrl reg bits
1093+ */
1094+#define PTD_CTL_TSK_PRI 0x8000
1095+#define PTD_CTL_COMM_PREFETCH 0x0001
1096+
1097+/*
1098+ * Task Control reg bits and field masks
1099+ */
1100+#define TASK_CTL_EN 0x8000
1101+#define TASK_CTL_VALID 0x4000
1102+#define TASK_CTL_ALWAYS 0x2000
1103+#define TASK_CTL_INIT_MASK 0x1f00
1104+#define TASK_CTL_ASTRT 0x0080
1105+#define TASK_CTL_HIPRITSKEN 0x0040
1106+#define TASK_CTL_HLDINITNUM 0x0020
1107+#define TASK_CTL_ASTSKNUM_MASK 0x000f
1108+
1109+/*
1110+ * Priority reg bits and field masks
1111+ */
1112+#define PRIORITY_HLD 0x80
1113+#define PRIORITY_PRI_MASK 0x07
1114+
1115+/*
1116+ * Debug Control reg bits and field masks
1117+ */
1118+#define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000
1119+#define DBG_CTL_AUTO_ARM 0x00008000
1120+#define DBG_CTL_BREAK 0x00004000
1121+#define DBG_CTL_COMP1_TYP_MASK 0x00003800
1122+#define DBG_CTL_COMP2_TYP_MASK 0x00000070
1123+#define DBG_CTL_EXT_BREAK 0x00000004
1124+#define DBG_CTL_INT_BREAK 0x00000002
1125+
1126+/*
1127+ * PTD Debug reg selector addresses
1128+ * This reg must be written with a value to show the contents of
1129+ * one of the desired internal register.
1130+ */
1131+#define PTD_DBG_REQ 0x00
1132+/* shows the state of 31 initiators */
1133+#define PTD_DBG_TSK_VLD_INIT 0x01
1134+/* shows which 16 tasks are valid and
1135+ * have initiators asserted */
1136+
1137+
1138+/*
1139+ * General return values
1140+ */
1141+#define MCD_OK 0
1142+#define MCD_ERROR -1
1143+#define MCD_TABLE_UNALIGNED -2
1144+#define MCD_CHANNEL_INVALID -3
1145+
1146+/*
1147+ * MCD_initDma input flags
1148+ */
1149+#define MCD_RELOC_TASKS 0x00000001
1150+#define MCD_NO_RELOC_TASKS 0x00000000
1151+#define MCD_COMM_PREFETCH_EN 0x00000002
1152+/* Commbus Prefetching - MCF547x/548x ONLY */
1153+
1154+/*
1155+ * MCD_dmaStatus Status Values for each channel
1156+ */
1157+#define MCD_NO_DMA 1
1158+/* No DMA has been requested since reset */
1159+#define MCD_IDLE 2
1160+/* DMA active, but the initiator is currently inactive */
1161+#define MCD_RUNNING 3
1162+/* DMA active, and the initiator is currently active */
1163+#define MCD_PAUSED 4
1164+/* DMA active but it is currently paused */
1165+#define MCD_HALTED 5
1166+/* the most recent DMA has been killed with MCD_killTask() */
1167+#define MCD_DONE 6
1168+/* the most recent DMA has completed. */
1169+
1170+
1171+/*
1172+ * MCD_startDma parameter defines
1173+ */
1174+
1175+/*
1176+ * Constants for the funcDesc parameter
1177+ */
1178+/* Byte swapping: */
1179+#define MCD_NO_BYTE_SWAP 0x00045670
1180+/* to disable byte swapping. */
1181+#define MCD_BYTE_REVERSE 0x00076540
1182+/* to reverse the bytes of each u32 of the DMAed data. */
1183+#define MCD_U16_REVERSE 0x00067450
1184+/* to reverse the 16-bit halves of
1185+ * each 32-bit data value being DMAed.*/
1186+#define MCD_U16_BYTE_REVERSE 0x00054760
1187+/* to reverse the byte halves of each
1188+ * 16-bit half of each 32-bit data value DMAed */
1189+#define MCD_NO_BIT_REV 0x00000000
1190+/* do not reverse the bits of each byte DMAed. */
1191+#define MCD_BIT_REV 0x00088880
1192+/* reverse the bits of each byte DMAed */
1193+/* CRCing: */
1194+#define MCD_CRC16 0xc0100000
1195+/* to perform CRC-16 on DMAed data. */
1196+#define MCD_CRCCCITT 0xc0200000
1197+/* to perform CRC-CCITT on DMAed data. */
1198+#define MCD_CRC32 0xc0300000
1199+/* to perform CRC-32 on DMAed data. */
1200+#define MCD_CSUMINET 0xc0400000
1201+/* to perform internet checksums on DMAed data.*/
1202+#define MCD_NO_CSUM 0xa0000000
1203+/* to perform no checksumming. */
1204+
1205+#define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | MCD_NO_CSUM)
1206+#define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM)
1207+
1208+/*
1209+ * Constants for the flags parameter
1210+ */
1211+#define MCD_TT_FLAGS_RL 0x00000001 /* Read line */
1212+#define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */
1213+#define MCD_TT_FLAGS_SP 0x00000004
1214+/* Speculative prefetch(XLB) MCF547x/548x ONLY */
1215+#define MCD_TT_FLAGS_PI 0x00000040 /* Precise Increment */
1216+#define MCD_TT_FLAGS_MASK 0x000000ff
1217+#define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW)
1218+
1219+#define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */
1220+#define MCD_CHAIN_DMA /* TBD */
1221+#define MCD_EU_DMA /* TBD */
1222+#define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */
1223+#define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */
1224+
1225+
1226+/* these flags are valid for MCD_startDma
1227+ * and the chained buffer descriptors */
1228+#define MCD_BUF_READY 0x80000000
1229+/* indicates that this buffer is now
1230+ * under the DMA's control */
1231+#define MCD_WRAP 0x20000000
1232+/* to tell the FEC Dmas to wrap to the first BD */
1233+#define MCD_INTERRUPT 0x10000000
1234+/* to generate an interrupt after completion of the DMA. */
1235+#define MCD_END_FRAME 0x08000000
1236+/* tell the DMA to end the frame when transferring
1237+ * last byte of data in buffer */
1238+#define MCD_CRC_RESTART 0x40000000
1239+/* to empty out the accumulated checksum
1240+ prior to performing the DMA. */
1241+
1242+/* Defines for the FEC buffer descriptor control/status word*/
1243+#define MCD_FEC_BUF_READY 0x8000
1244+#define MCD_FEC_WRAP 0x2000
1245+#define MCD_FEC_INTERRUPT 0x1000
1246+#define MCD_FEC_END_FRAME 0x0800
1247+
1248+
1249+/*
1250+ * Defines for general intuitiveness
1251+ */
1252+
1253+#define MCD_TRUE 1
1254+#define MCD_FALSE 0
1255+
1256+/*
1257+ * Three different cases for destination and source.
1258+ */
1259+#define MINUS1 -1
1260+#define ZERO 0
1261+#define PLUS1 1
1262+
1263+#ifndef DEFINESONLY
1264+
1265+/* Task Table Entry struct*/
1266+typedef struct {
1267+ u32 TDTstart; /* task descriptor table start */
1268+ u32 TDTend; /* task descriptor table end */
1269+ u32 varTab; /* variable table start */
1270+ u32 FDTandFlags; /* function descriptor table start and flags */
1271+ volatile u32 descAddrAndStatus;
1272+ volatile u32 modifiedVarTab;
1273+ u32 contextSaveSpace; /* context save space start */
1274+ u32 literalBases;
1275+} TaskTableEntry;
1276+
1277+
1278+/* Chained buffer descriptor */
1279+typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
1280+struct MCD_bufDesc_struct {
1281+ u32 flags;
1282+/* flags describing the DMA */
1283+ u32 csumResult;
1284+/* checksum from checksumming performed since last checksum reset */
1285+ s8 *srcAddr;
1286+/* the address to move data from */
1287+ s8 *destAddr;
1288+/* the address to move data to */
1289+ s8 *lastDestAddr;
1290+/* the last address written to */
1291+ u32 dmaSize;
1292+/* the number of bytes to transfer independent of the transfer size */
1293+ MCD_bufDesc *next;
1294+/* next buffer descriptor in chain */
1295+ u32 info;
1296+/* private information about this descriptor; DMA does not affect it */
1297+};
1298+
1299+/* Progress Query struct */
1300+typedef volatile struct MCD_XferProg_struct {
1301+ s8 *lastSrcAddr;
1302+/* the most-recent or last, post-increment source address */
1303+ s8 *lastDestAddr;
1304+/* the most-recent or last, post-increment destination address */
1305+ u32 dmaSize;
1306+/* the amount of data transferred for the current buffer */
1307+ MCD_bufDesc *currBufDesc;
1308+/* pointer to the current buffer descriptor being DMAed */
1309+} MCD_XferProg;
1310+
1311+
1312+/* FEC buffer descriptor */
1313+typedef volatile struct MCD_bufDescFec_struct {
1314+ u16 statCtrl;
1315+ u16 length;
1316+ u32 dataPointer;
1317+} MCD_bufDescFec;
1318+
1319+
1320+/*************************************************************************/
1321+/*
1322+ * API function Prototypes - see MCD_dmaApi.c for further notes
1323+ */
1324+
1325+/*
1326+ * MCD_startDma starts a particular kind of DMA .
1327+ */
1328+int MCD_startDma(
1329+ int channel,
1330+/* the channel on which to run the DMA */
1331+ s8 *srcAddr,
1332+/* the address to move data from, or buffer-descriptor address */
1333+ s16 srcIncr,
1334+/* the amount to increment the source address per transfer */
1335+ s8 *destAddr,
1336+/* the address to move data to */
1337+ s16 destIncr,
1338+/* the amount to increment the destination address per transfer */
1339+ u32 dmaSize,
1340+/* the number of bytes to transfer independent of the transfer size */
1341+ u32 xferSize,
1342+/* the number bytes in of each data movement (1, 2, or 4) */
1343+ u32 initiator,
1344+/* what device initiates the DMA */
1345+ int priority,
1346+/* priority of the DMA */
1347+ u32 flags,
1348+/* flags describing the DMA */
1349+ u32 funcDesc
1350+/* a description of byte swapping, bit swapping, and CRC actions */
1351+);
1352+
1353+/*
1354+ * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
1355+ * registers, relocating and creating the appropriate task structures, and
1356+ * setting up some global settings
1357+ */
1358+int MCD_initDma(dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);
1359+
1360+/*
1361+ * MCD_dmaStatus() returns the status of the DMA on the requested channel.
1362+ */
1363+int MCD_dmaStatus(int channel);
1364+
1365+/*
1366+ * MCD_XferProgrQuery() returns progress of DMA on requested channel
1367+ */
1368+int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep);
1369+
1370+/*
1371+ * MCD_killDma() halts the DMA on the requested channel, without any
1372+ * intention of resuming the DMA.
1373+ */
1374+int MCD_killDma(int channel);
1375+
1376+/*
1377+ * MCD_continDma() continues a DMA which as stopped due to encountering an
1378+ * unready buffer descriptor.
1379+ */
1380+int MCD_continDma(int channel);
1381+
1382+/*
1383+ * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
1384+ * running on that channel).
1385+ */
1386+int MCD_pauseDma(int channel);
1387+
1388+/*
1389+ * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
1390+ * running on that channel).
1391+ */
1392+int MCD_resumeDma(int channel);
1393+
1394+/*
1395+ * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
1396+ */
1397+int MCD_csumQuery(int channel, u32 *csum);
1398+
1399+/*
1400+ * MCD_getCodeSize provides the packed size required by the microcoded task
1401+ * and structures.
1402+ */
1403+int MCD_getCodeSize(void);
1404+
1405+/*
1406+ * MCD_getVersion provides a pointer to a version string and returns a
1407+ * version number.
1408+ */
1409+int MCD_getVersion(char **longVersion);
1410+
1411+/* macro for setting a location in the variable table */
1412+#define MCD_SET_VAR(taskTab, idx, value) \
1413+ ((u32 *)(taskTab)->varTab)[idx] = value
1414+ /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
1415+ so I'm avoiding surrounding it with "do {} while(0)" */
1416+
1417+#endif /* DEFINESONLY */
1418+
1419+#endif /* _MCD_API_H */
1420--- /dev/null
1421+++ b/drivers/dma/MCD_dmaApi.c
1422@@ -0,0 +1,1043 @@
1423+/*
1424+ * drivers/dma/MCD_dmaApi.c
1425+ *
1426+ * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
1427+ * Kurt Mahan <kmahan@freescale.com>
1428+ * Shrek Wu b16972@freescale.com
1429+ *
1430+ * This program is free software; you can redistribute it and/or
1431+ * modify it under the terms of the GNU General Public License as
1432+ * published by the Free Software Foundation; either version 2 of
1433+ * the License, or (at your option) any later version.
1434+ *
1435+ * This program is distributed in the hope that it will be useful,
1436+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1437+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1438+ * GNU General Public License for more details.
1439+ *
1440+ * You should have received a copy of the GNU General Public License
1441+ * along with this program; if not, write to the Free Software
1442+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1443+ * MA 02111-1307 USA
1444+ */
1445+
1446+#include "MCD_dma.h"
1447+#include "MCD_tasksInit.h"
1448+#include "MCD_progCheck.h"
1449+
1450+/********************************************************************/
1451+/*
1452+ * This is an API-internal pointer to the DMA's registers
1453+ */
1454+dmaRegs *MCD_dmaBar;
1455+
1456+/*
1457+ * These are the real and model task tables as generated by the
1458+ * build process
1459+ */
1460+extern TaskTableEntry MCD_realTaskTableSrc[NCHANNELS];
1461+extern TaskTableEntry MCD_modelTaskTableSrc[NUMOFVARIANTS];
1462+
1463+/*
1464+ * However, this (usually) gets relocated to on-chip SRAM, at which
1465+ * point we access them as these tables
1466+ */
1467+volatile TaskTableEntry *MCD_taskTable;
1468+TaskTableEntry *MCD_modelTaskTable;
1469+
1470+
1471+/*
1472+ * MCD_chStatus[] is an array of status indicators for remembering
1473+ * whether a DMA has ever been attempted on each channel, pausing
1474+ * status, etc.
1475+ */
1476+static int MCD_chStatus[NCHANNELS] = {
1477+ MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
1478+ MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
1479+ MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
1480+ MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA
1481+};
1482+
1483+/*
1484+ * Prototypes for local functions
1485+ */
1486+static void MCD_memcpy(int *dest, int *src, u32 size);
1487+static void MCD_resmActions(int channel);
1488+
1489+/*
1490+ * Buffer descriptors used for storage of progress info for single Dmas
1491+ * Also used as storage for the DMA for CRCs for single DMAs
1492+ * Otherwise, the DMA does not parse these buffer descriptors
1493+ */
1494+#ifdef MCD_INCLUDE_EU
1495+extern MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
1496+#else
1497+MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
1498+#endif
1499+MCD_bufDesc *MCD_relocBuffDesc;
1500+
1501+
1502+/*
1503+ * Defines for the debug control register's functions
1504+ */
1505+#define DBG_CTL_COMP1_TASK (0x00002000)
1506+/* have comparator 1 look for a task # */
1507+#define DBG_CTL_ENABLE (DBG_CTL_AUTO_ARM | \
1508+ DBG_CTL_BREAK | \
1509+ DBG_CTL_INT_BREAK | \
1510+ DBG_CTL_COMP1_TASK)
1511+#define DBG_CTL_DISABLE (DBG_CTL_AUTO_ARM | \
1512+ DBG_CTL_INT_BREAK | \
1513+ DBG_CTL_COMP1_TASK)
1514+#define DBG_KILL_ALL_STAT (0xFFFFFFFF)
1515+
1516+/*
1517+ * Offset to context save area where progress info is stored
1518+ */
1519+#define CSAVE_OFFSET 10
1520+
1521+/*
1522+ * Defines for Byte Swapping
1523+ */
1524+#define MCD_BYTE_SWAP_KILLER 0xFFF8888F
1525+#define MCD_NO_BYTE_SWAP_ATALL 0x00040000
1526+
1527+/*
1528+ * Execution Unit Identifiers
1529+ */
1530+#define MAC 0 /* legacy - not used */
1531+#define LUAC 1 /* legacy - not used */
1532+#define CRC 2 /* legacy - not used */
1533+#define LURC 3 /* Logic Unit with CRC */
1534+
1535+/*
1536+ * Task Identifiers
1537+ */
1538+#define TASK_CHAINNOEU 0
1539+#define TASK_SINGLENOEU 1
1540+#ifdef MCD_INCLUDE_EU
1541+#define TASK_CHAINEU 2
1542+#define TASK_SINGLEEU 3
1543+#define TASK_FECRX 4
1544+#define TASK_FECTX 5
1545+#else
1546+#define TASK_CHAINEU 0
1547+#define TASK_SINGLEEU 1
1548+#define TASK_FECRX 2
1549+#define TASK_FECTX 3
1550+#endif
1551+
1552+/*
1553+ * Structure to remember which variant is on which channel
1554+ */
1555+struct MCD_remVariants_struct {
1556+ int remDestRsdIncr[NCHANNELS]; /* -1,0,1 */
1557+ int remSrcRsdIncr[NCHANNELS]; /* -1,0,1 */
1558+ s16 remDestIncr[NCHANNELS]; /* DestIncr */
1559+ s16 remSrcIncr[NCHANNELS]; /* srcIncr */
1560+ u32 remXferSize[NCHANNELS]; /* xferSize */
1561+};
1562+
1563+/*
1564+ * Structure to remember the startDma parameters for each channel
1565+ */
1566+struct MCD_remVariants_struct MCD_remVariants;
1567+
1568+/********************************************************************/
1569+/*
1570+ * Function: MCD_initDma
1571+ * Purpose: Initializes the DMA API by setting up a pointer to the DMA
1572+ * registers, relocating and creating the appropriate task
1573+ * structures, and setting up some global settings
1574+ * Arguments:
1575+ * dmaBarAddr - pointer to the multichannel DMA registers
1576+ * taskTableDest - location to move DMA task code and structs to
1577+ * flags - operational parameters
1578+ * Return Value:
1579+ * MCD_TABLE_UNALIGNED if taskTableDest is not 512-byte aligned
1580+ * MCD_OK otherwise
1581+ */
1582+extern u32 MCD_funcDescTab0[];
1583+
1584+int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
1585+{
1586+ int i;
1587+ TaskTableEntry *entryPtr;
1588+
1589+ /* Setup the local pointer to register set */
1590+ MCD_dmaBar = dmaBarAddr;
1591+
1592+ /* Do we need to move/create a task table */
1593+ if ((flags & MCD_RELOC_TASKS) != 0) {
1594+ int fixedSize;
1595+ u32 *fixedPtr;
1596+ int varTabsOffset, funcDescTabsOffset;
1597+ int contextSavesOffset;
1598+ int taskDescTabsOffset;
1599+ int taskTableSize, varTabsSize;
1600+ int funcDescTabsSize, contextSavesSize;
1601+ int taskDescTabSize;
1602+ int i;
1603+
1604+ /* Check if physical address is
1605+ * aligned on 512 byte boundary */
1606+ if (((u32)taskTableDest & 0x000001ff) != 0)
1607+ return MCD_TABLE_UNALIGNED;
1608+
1609+ MCD_taskTable = taskTableDest;
1610+ /* set up local pointer to task Table */
1611+
1612+ /*
1613+ * Create a task table:
1614+ * compute aligned base offsets for variable tables and
1615+ * function descriptor tables, then
1616+ * loop through the task table and setup the pointers
1617+ *copy over model task table with the the actual
1618+ *task descriptor tables
1619+ */
1620+ taskTableSize = NCHANNELS * sizeof(TaskTableEntry);
1621+ /* Align variable tables to size */
1622+ varTabsOffset = taskTableSize + (u32)taskTableDest;
1623+ if ((varTabsOffset & (VAR_TAB_SIZE - 1)) != 0)
1624+ varTabsOffset = (varTabsOffset + VAR_TAB_SIZE)
1625+ & (~VAR_TAB_SIZE);
1626+ /* Align function descriptor tables */
1627+ varTabsSize = NCHANNELS * VAR_TAB_SIZE;
1628+ funcDescTabsOffset = varTabsOffset + varTabsSize;
1629+
1630+ if ((funcDescTabsOffset & (FUNCDESC_TAB_SIZE - 1)) != 0)
1631+ funcDescTabsOffset = (funcDescTabsOffset
1632+ + FUNCDESC_TAB_SIZE) &
1633+ (~FUNCDESC_TAB_SIZE);
1634+
1635+ funcDescTabsSize = FUNCDESC_TAB_NUM * FUNCDESC_TAB_SIZE;
1636+ contextSavesOffset = funcDescTabsOffset
1637+ + funcDescTabsSize;
1638+ contextSavesSize = (NCHANNELS * CONTEXT_SAVE_SIZE);
1639+ fixedSize = taskTableSize + varTabsSize +
1640+ funcDescTabsSize + contextSavesSize;
1641+
1642+ /* Zero the thing out */
1643+ fixedPtr = (u32 *)taskTableDest;
1644+ for (i = 0; i < (fixedSize/4); i++)
1645+ fixedPtr[i] = 0;
1646+
1647+ entryPtr = (TaskTableEntry *)MCD_taskTable;
1648+ /* Set up fixed pointers */
1649+ for (i = 0; i < NCHANNELS; i++) {
1650+ entryPtr[i].varTab = (u32)varTabsOffset;
1651+ /* update ptr to local value */
1652+ entryPtr[i].FDTandFlags =
1653+ (u32)funcDescTabsOffset | MCD_TT_FLAGS_DEF;
1654+ entryPtr[i].contextSaveSpace =
1655+ (u32)contextSavesOffset;
1656+ varTabsOffset += VAR_TAB_SIZE;
1657+#ifdef MCD_INCLUDE_EU
1658+ /* if not there is only one,
1659+ * just point to the same one */
1660+ funcDescTabsOffset += FUNCDESC_TAB_SIZE;
1661+#endif
1662+ contextSavesOffset += CONTEXT_SAVE_SIZE;
1663+ }
1664+ /* Copy over the function descriptor table */
1665+ for (i = 0; i < FUNCDESC_TAB_NUM; i++) {
1666+ MCD_memcpy((void *)(entryPtr[i].FDTandFlags
1667+ & ~MCD_TT_FLAGS_MASK),
1668+ (void *)MCD_funcDescTab0,
1669+ FUNCDESC_TAB_SIZE);
1670+ }
1671+
1672+ /* Copy model task table to where the
1673+ * context save stuff leaves off */
1674+ MCD_modelTaskTable =
1675+ (TaskTableEntry *)contextSavesOffset;
1676+
1677+ MCD_memcpy((void *)MCD_modelTaskTable,
1678+ (void *)MCD_modelTaskTableSrc,
1679+ NUMOFVARIANTS * sizeof(TaskTableEntry));
1680+
1681+ /* Point to local version of model task table */
1682+ entryPtr = MCD_modelTaskTable;
1683+ taskDescTabsOffset = (u32)MCD_modelTaskTable +
1684+ (NUMOFVARIANTS * sizeof(TaskTableEntry));
1685+
1686+ /* Copy actual task code and update TDT ptrs
1687+ * in local model task table */
1688+ for (i = 0; i < NUMOFVARIANTS; i++) {
1689+ taskDescTabSize = entryPtr[i].TDTend
1690+ - entryPtr[i].TDTstart + 4;
1691+ MCD_memcpy((void *)taskDescTabsOffset,
1692+ (void *)entryPtr[i].TDTstart,
1693+ taskDescTabSize);
1694+ entryPtr[i].TDTstart =
1695+ (u32)taskDescTabsOffset;
1696+ taskDescTabsOffset += taskDescTabSize;
1697+ entryPtr[i].TDTend =
1698+ (u32)taskDescTabsOffset - 4;
1699+ }
1700+#ifdef MCD_INCLUDE_EU
1701+ /*
1702+ * Tack single DMA BDs onto end of
1703+ * code so API controls where
1704+ * they are since DMA might write to them
1705+ */
1706+ MCD_relocBuffDesc = (MCD_bufDesc *)
1707+ (entryPtr[NUMOFVARIANTS - 1].TDTend + 4);
1708+#else
1709+ /*
1710+ * DMA does not touch them so they
1711+ * can be wherever and we don't need to
1712+ * waste SRAM on them
1713+ */
1714+ MCD_relocBuffDesc = MCD_singleBufDescs;
1715+#endif
1716+ } else {
1717+ /*
1718+ * Point the would-be relocated task tables and
1719+ * the buffer descriptors
1720+ * to the ones the linker generated
1721+ */
1722+ if (((u32)MCD_realTaskTableSrc & 0x000001ff) != 0)
1723+ return MCD_TABLE_UNALIGNED;
1724+
1725+ entryPtr = MCD_realTaskTableSrc;
1726+ for (i = 0; i < NCHANNELS; i++) {
1727+ if (((entryPtr[i].varTab
1728+ & (VAR_TAB_SIZE - 1)) != 0) ||
1729+ ((entryPtr[i].FDTandFlags &
1730+ (FUNCDESC_TAB_SIZE - 1)) != 0))
1731+ return MCD_TABLE_UNALIGNED;
1732+ }
1733+
1734+ MCD_taskTable = MCD_realTaskTableSrc;
1735+ MCD_modelTaskTable = MCD_modelTaskTableSrc;
1736+ MCD_relocBuffDesc = MCD_singleBufDescs;
1737+ }
1738+
1739+ /* Make all channels inactive,
1740+ * and remember them as such: */
1741+ MCD_dmaBar->taskbar = (u32) MCD_taskTable;
1742+ for (i = 0; i < NCHANNELS; i++) {
1743+ MCD_dmaBar->taskControl[i] = 0x0;
1744+ MCD_chStatus[i] = MCD_NO_DMA;
1745+ }
1746+
1747+ /* Set up pausing mechanism to inactive state: */
1748+ MCD_dmaBar->debugComp1 = 0;
1749+ MCD_dmaBar->debugComp2 = 0;
1750+ MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
1751+ MCD_dmaBar->debugStatus = DBG_KILL_ALL_STAT;
1752+
1753+ /* Enable or disable commbus prefetch */
1754+ if ((flags & MCD_COMM_PREFETCH_EN) != 0)
1755+ MCD_dmaBar->ptdControl &= ~PTD_CTL_COMM_PREFETCH;
1756+ else
1757+ MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH;
1758+
1759+ return MCD_OK;
1760+}
1761+/*********************** End of MCD_initDma() ***********************/
1762+
1763+/********************************************************************/
1764+/* Function: MCD_dmaStatus
1765+ * Purpose: Returns the status of the DMA on the requested channel
1766+ * Arguments: channel - channel number
1767+ * Returns: Predefined status indicators
1768+ */
1769+int MCD_dmaStatus(int channel)
1770+{
1771+ u16 tcrValue;
1772+
1773+ if ((channel < 0) || (channel >= NCHANNELS))
1774+ return MCD_CHANNEL_INVALID;
1775+
1776+ tcrValue = MCD_dmaBar->taskControl[channel];
1777+ if ((tcrValue & TASK_CTL_EN) == 0) {
1778+ /* Nothing running if last reported
1779+ * with task enabled */
1780+ if (MCD_chStatus[channel] == MCD_RUNNING
1781+ || MCD_chStatus[channel] == MCD_IDLE)
1782+ MCD_chStatus[channel] = MCD_DONE;
1783+ } else /* something is running */{
1784+ /* There are three possibilities:
1785+ * paused, running or idle. */
1786+ if (MCD_chStatus[channel] == MCD_RUNNING
1787+ || MCD_chStatus[channel] == MCD_IDLE) {
1788+ MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
1789+ /* Determine which initiator
1790+ * is asserted. */
1791+ if ((MCD_dmaBar->ptdDebug >> channel) & 0x1)
1792+ MCD_chStatus[channel] = MCD_RUNNING;
1793+ else
1794+ MCD_chStatus[channel] = MCD_IDLE;
1795+ /* Do not change the status if it is already paused */
1796+ }
1797+ }
1798+ return MCD_chStatus[channel];
1799+}
1800+/******************** End of MCD_dmaStatus() ************************/
1801+
1802+/********************************************************************/
1803+/* Function: MCD_startDma
1804+ * Ppurpose: Starts a particular kind of DMA
1805+ * Arguments: see below
1806+ * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
1807+ */
1808+
1809+int MCD_startDma(
1810+ int channel,
1811+/* the channel on which to run the DMA */
1812+ s8 *srcAddr,
1813+/* the address to move data from,
1814+ * or physical buffer-descriptor address */
1815+ s16 srcIncr,
1816+/* the amount to increment the source
1817+ * address per transfer */
1818+ s8 *destAddr,
1819+/* the address to move data to */
1820+ s16 destIncr,
1821+/* the amount to increment the
1822+ * destination address per transfer */
1823+ u32 dmaSize,
1824+/* the number of bytes to transfer
1825+ * independent of the transfer size */
1826+ u32 xferSize,
1827+/* the number bytes in of each data
1828+ * movement (1, 2, or 4) */
1829+ u32 initiator,
1830+/* what device initiates the DMA */
1831+ int priority,
1832+/* priority of the DMA */
1833+ u32 flags,
1834+/* flags describing the DMA */
1835+ u32 funcDesc
1836+/* a description of byte swapping,
1837+ * bit swapping, and CRC actions */
1838+#ifdef MCD_NEED_ADDR_TRANS
1839+ s8 *srcAddrVirt
1840+/* virtual buffer descriptor address TBD*/
1841+#endif
1842+)
1843+{
1844+ int srcRsdIncr, destRsdIncr;
1845+ int *cSave;
1846+ short xferSizeIncr;
1847+ int tcrCount = 0;
1848+#ifdef MCD_INCLUDE_EU
1849+ u32 *realFuncArray;
1850+#endif
1851+
1852+ if ((channel < 0) || (channel >= NCHANNELS))
1853+ return MCD_CHANNEL_INVALID;
1854+
1855+#ifndef MCD_INCLUDE_EU
1856+ funcDesc = MCD_FUNC_NOEU1;
1857+#endif
1858+
1859+#ifdef MCD_DEBUG
1860+ printf("startDma:Setting up params\n");
1861+#endif
1862+
1863+ /* Enable task-wise priority */
1864+ MCD_dmaBar->ptdControl |= (u16) 0x8000;
1865+
1866+ /* Calculate additional parameters
1867+ * to the regular DMA calls. */
1868+ srcRsdIncr = srcIncr < 0 ? -1 : (srcIncr > 0 ? 1 : 0);
1869+ destRsdIncr = destIncr < 0 ? -1 : (destIncr > 0 ? 1 : 0);
1870+ xferSizeIncr = (xferSize & 0xffff) | 0x20000000;
1871+
1872+ /* Remember which variant is running for each channel */
1873+ MCD_remVariants.remSrcRsdIncr[channel] = srcRsdIncr;
1874+ MCD_remVariants.remDestRsdIncr[channel] = destRsdIncr;
1875+ MCD_remVariants.remDestIncr[channel] = destIncr;
1876+ MCD_remVariants.remSrcIncr[channel] = srcIncr;
1877+ MCD_remVariants.remXferSize[channel] = xferSize;
1878+
1879+ cSave = (int *)(MCD_taskTable[channel].contextSaveSpace)
1880+ + CSAVE_OFFSET
1881+ + CURRBD;
1882+
1883+#ifdef MCD_INCLUDE_EU
1884+ realFuncArray = (u32 *)(MCD_taskTable[channel].FDTandFlags
1885+ & 0xffffff00);
1886+
1887+ /*
1888+ * Modify the LURC's normal and byte-residue-loop functions
1889+ * according to parameter.
1890+ */
1891+ switch (xferSize) {
1892+ case 4:
1893+ realFuncArray[(LURC*16)] = funcDesc;
1894+ break;
1895+ case 2:
1896+ realFuncArray[(LURC*16)] = funcDesc & 0xfffff00f;
1897+ break;
1898+ case 1:
1899+ default:
1900+ realFuncArray[(LURC*16)] = funcDesc & 0xffff000f;
1901+ break;
1902+ }
1903+
1904+ realFuncArray[(LURC*16 + 1)] = 0
1905+ | (funcDesc & MCD_BYTE_SWAP_KILLER)
1906+ | MCD_NO_BYTE_SWAP_ATALL;
1907+#endif
1908+
1909+ /* Write the initiator field in the TCR and
1910+ * set the initiator-hold bit*/
1911+ MCD_dmaBar->taskControl[channel] = 0
1912+ | (initiator << 8)
1913+ | TASK_CTL_HIPRITSKEN
1914+ | TASK_CTL_HLDINITNUM;
1915+
1916+ /*
1917+ * Current versions of the MPC8220 MCD have a hardware quirk that could
1918+ * cause the write to the TCR to collide with an MDE access to the
1919+ * initiator-register file, so we have to verify that the write occurred
1920+ * correctly by reading back the value. On MCF547x/8x devices and any
1921+ * future revisions of the MPC8220, this loop will not be entered.
1922+ */
1923+ while (((MCD_dmaBar->taskControl[channel] & 0x1fff) !=
1924+ ((initiator << 8) | TASK_CTL_HIPRITSKEN
1925+ | TASK_CTL_HLDINITNUM)) && (tcrCount < 1000)) {
1926+ tcrCount++;
1927+ MCD_dmaBar->taskControl[channel] = 0
1928+ | (initiator << 8)
1929+ | TASK_CTL_HIPRITSKEN
1930+ | TASK_CTL_HLDINITNUM;
1931+ }
1932+
1933+ MCD_dmaBar->priority[channel] = (u8)priority & PRIORITY_PRI_MASK;
1934+
1935+ if (channel < 8 && channel >= 0) {
1936+ MCD_dmaBar->taskSize0 &= ~(0xf << (7-channel)*4);
1937+ MCD_dmaBar->taskSize0
1938+ |= (xferSize & 3) << (((7 - channel)*4) + 2);
1939+ MCD_dmaBar->taskSize0
1940+ |= (xferSize & 3) << ((7 - channel)*4);
1941+ } else {
1942+ MCD_dmaBar->taskSize1 &= ~(0xf << (15-channel)*4);
1943+ MCD_dmaBar->taskSize1
1944+ |= (xferSize & 3) << (((15 - channel)*4) + 2);
1945+ MCD_dmaBar->taskSize1
1946+ |= (xferSize & 3) << ((15 - channel)*4);
1947+ }
1948+
1949+ /* Setup task table flags/options */
1950+ MCD_taskTable[channel].FDTandFlags &= ~MCD_TT_FLAGS_MASK;
1951+ MCD_taskTable[channel].FDTandFlags |= (MCD_TT_FLAGS_MASK & flags);
1952+
1953+ if (flags & MCD_FECTX_DMA) {
1954+ /* TDTStart and TDTEnd */
1955+ MCD_taskTable[channel].TDTstart =
1956+ MCD_modelTaskTable[TASK_FECTX].TDTstart;
1957+ MCD_taskTable[channel].TDTend =
1958+ MCD_modelTaskTable[TASK_FECTX].TDTend;
1959+ MCD_startDmaENetXmit(srcAddr, srcAddr, destAddr,
1960+ MCD_taskTable, channel);
1961+ } else if (flags & MCD_FECRX_DMA) {
1962+ /* TDTStart and TDTEnd */
1963+ MCD_taskTable[channel].TDTstart =
1964+ MCD_modelTaskTable[TASK_FECRX].TDTstart;
1965+ MCD_taskTable[channel].TDTend =
1966+ MCD_modelTaskTable[TASK_FECRX].TDTend;
1967+ MCD_startDmaENetRcv(srcAddr, srcAddr, destAddr,
1968+ MCD_taskTable, channel);
1969+ } else if (flags & MCD_SINGLE_DMA) {
1970+ /*
1971+ * This buffer descriptor is used for storing off
1972+ * initial parameters for later progress query
1973+ * calculation and for the DMA to write the resulting
1974+ * checksum. The DMA does not use this to determine how
1975+ * to operate, that info is passed with the init routine
1976+ */
1977+ MCD_relocBuffDesc[channel].srcAddr = srcAddr;
1978+ MCD_relocBuffDesc[channel].destAddr = destAddr;
1979+ MCD_relocBuffDesc[channel].lastDestAddr = destAddr;
1980+ MCD_relocBuffDesc[channel].dmaSize = dmaSize;
1981+ MCD_relocBuffDesc[channel].flags = 0;
1982+ /* not used */
1983+ MCD_relocBuffDesc[channel].csumResult = 0;
1984+ /* not used */
1985+ MCD_relocBuffDesc[channel].next = 0;
1986+ /* not used */
1987+
1988+ /* Initialize the progress-querying stuff
1989+ * to show no progress:*/
1990+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
1991+ SRCPTR + CSAVE_OFFSET] = (int)srcAddr;
1992+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
1993+ DESTPTR + CSAVE_OFFSET] = (int)destAddr;
1994+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
1995+ DCOUNT + CSAVE_OFFSET] = 0;
1996+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
1997+ CURRBD + CSAVE_OFFSET] =
1998+ (u32) &(MCD_relocBuffDesc[channel]);
1999+
2000+ if ((funcDesc == MCD_FUNC_NOEU1)
2001+ || (funcDesc == MCD_FUNC_NOEU2)) {
2002+ /* TDTStart and TDTEnd */
2003+ MCD_taskTable[channel].TDTstart =
2004+ MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart;
2005+ MCD_taskTable[channel].TDTend =
2006+ MCD_modelTaskTable[TASK_SINGLENOEU].TDTend;
2007+ MCD_startDmaSingleNoEu(srcAddr, srcIncr, destAddr,
2008+ destIncr, dmaSize, xferSizeIncr, flags,
2009+ (int *)&(MCD_relocBuffDesc[channel]),
2010+ cSave, MCD_taskTable, channel);
2011+ } else {
2012+ /* TDTStart and TDTEnd */
2013+ MCD_taskTable[channel].TDTstart =
2014+ MCD_modelTaskTable[TASK_SINGLEEU].TDTstart;
2015+ MCD_taskTable[channel].TDTend =
2016+ MCD_modelTaskTable[TASK_SINGLEEU].TDTend;
2017+ MCD_startDmaSingleEu(srcAddr, srcIncr, destAddr,
2018+ destIncr, dmaSize, xferSizeIncr, flags,
2019+ (int *)&(MCD_relocBuffDesc[channel]),
2020+ cSave, MCD_taskTable, channel);
2021+ }
2022+ } else /* Chained DMA */ {
2023+ /* Initialize the progress-querying
2024+ * stuff to show no progress:*/
2025+#if 1 /* (!defined(MCD_NEED_ADDR_TRANS)) */
2026+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2027+ SRCPTR + CSAVE_OFFSET]
2028+ = (int)((MCD_bufDesc *) srcAddr)->srcAddr;
2029+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2030+ DESTPTR + CSAVE_OFFSET]
2031+ = (int)((MCD_bufDesc *) srcAddr)->destAddr;
2032+#else
2033+ /* if using address translation, need the
2034+ * virtual addr of the first buffdesc */
2035+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2036+ SRCPTR + CSAVE_OFFSET]
2037+ = (int)((MCD_bufDesc *) srcAddrVirt)->srcAddr;
2038+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2039+ DESTPTR + CSAVE_OFFSET]
2040+ = (int)((MCD_bufDesc *) srcAddrVirt)->destAddr;
2041+#endif
2042+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2043+ DCOUNT + CSAVE_OFFSET] = 0;
2044+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2045+ CURRBD + CSAVE_OFFSET] = (u32) srcAddr;
2046+
2047+ if (funcDesc == MCD_FUNC_NOEU1
2048+ || funcDesc == MCD_FUNC_NOEU2) {
2049+ /* TDTStart and TDTEnd */
2050+ MCD_taskTable[channel].TDTstart =
2051+ MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart;
2052+ MCD_taskTable[channel].TDTend =
2053+ MCD_modelTaskTable[TASK_CHAINNOEU].TDTend;
2054+ MCD_startDmaChainNoEu((int *)srcAddr, srcIncr,
2055+ destIncr, xferSize, xferSizeIncr, cSave,
2056+ MCD_taskTable, channel);
2057+ } else {
2058+ /* TDTStart and TDTEnd */
2059+ MCD_taskTable[channel].TDTstart =
2060+ MCD_modelTaskTable[TASK_CHAINEU].TDTstart;
2061+ MCD_taskTable[channel].TDTend =
2062+ MCD_modelTaskTable[TASK_CHAINEU].TDTend;
2063+ MCD_startDmaChainEu((int *)srcAddr, srcIncr, destIncr,
2064+ xferSize, xferSizeIncr, cSave,
2065+ MCD_taskTable, channel);
2066+ }
2067+ }
2068+
2069+ MCD_chStatus[channel] = MCD_IDLE;
2070+ return MCD_OK;
2071+}
2072+
2073+/************************ End of MCD_startDma() *********************/
2074+
2075+/********************************************************************/
2076+/* Function: MCD_XferProgrQuery
2077+ * Purpose: Returns progress of DMA on requested channel
2078+ * Arguments: channel - channel to retrieve progress for
2079+ * progRep - pointer to user supplied MCD_XferProg struct
2080+ * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
2081+ *
2082+ * Notes:
2083+ * MCD_XferProgrQuery() upon completing or after aborting a DMA, or
2084+ * while the DMA is in progress, this function returns the first
2085+ * DMA-destination address not (or not yet) used in the DMA. When
2086+ * encountering a non-ready buffer descriptor, the information for
2087+ * the last completed descriptor is returned.
2088+ *
2089+ * MCD_XferProgQuery() has to avoid the possibility of getting
2090+ * partially-updated information in the event that we should happen
2091+ * to query DMA progress just as the DMA is updating it. It does that
2092+ * by taking advantage of the fact context is not saved frequently for
2093+ * the most part. We therefore read it at least twice until we get the
2094+ * same information twice in a row.
2095+ *
2096+ * Because a small, but not insignificant, amount of time is required
2097+ * to write out the progress-query information, especially upon
2098+ * completion of the DMA, it would be wise to guarantee some time lag
2099+ * between successive readings of the progress-query information.
2100+ */
2101+
2102+/*
2103+ * How many iterations of the loop below to execute to stabilize values
2104+ */
2105+#define STABTIME 0
2106+
2107+int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep)
2108+{
2109+ MCD_XferProg prevRep;
2110+ int again;
2111+ /* true if we are to try again to get consistent results */
2112+ int i; /* used as a time-waste counter */
2113+ int destDiffBytes;
2114+ /* Total number of bytes that we think actually got xfered. */
2115+ int numIterations; /* number of iterations */
2116+ int bytesNotXfered; /* bytes that did not get xfered. */
2117+ s8 *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr;
2118+ int subModVal, addModVal;
2119+ /* Mode values to added and subtracted from the final destAddr */
2120+
2121+ if ((channel < 0) || (channel >= NCHANNELS))
2122+ return MCD_CHANNEL_INVALID;
2123+
2124+ /* Read a trial value for the progress-reporting values*/
2125+ prevRep.lastSrcAddr =
2126+ (s8 *)((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2127+ SRCPTR + CSAVE_OFFSET];
2128+ prevRep.lastDestAddr =
2129+ (s8 *)((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2130+ DESTPTR + CSAVE_OFFSET];
2131+ prevRep.dmaSize =
2132+ ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
2133+ DCOUNT + CSAVE_OFFSET];
2134+ prevRep.currBufDesc =
2135+ (MCD_bufDesc *)((volatile int *)MCD_taskTable[
2136+ channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET];
2137+
2138+ /* Repeatedly reread those values until
2139+ * they match previous values: */
2140+ do {
2141+ /* Take a little bit of time to ensure stability: */
2142+ for (i = 0; i < STABTIME; i++)
2143+ i += i >> 2;
2144+ /* make sure this loop does something so that it
2145+ doesn't get optimized out */
2146+ /* Check them again: */
2147+ progRep->lastSrcAddr =
2148+ (s8 *)((volatile int *)MCD_taskTable[
2149+ channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
2150+ progRep->lastDestAddr =
2151+ (s8 *)((volatile int *)MCD_taskTable[
2152+ channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
2153+ progRep->dmaSize = ((volatile int *)MCD_taskTable[
2154+ channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET];
2155+ progRep->currBufDesc =
2156+ (MCD_bufDesc *)((volatile int *)MCD_taskTable[
2157+ channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET];
2158+
2159+ /* See if they match: */
2160+ if (prevRep.lastSrcAddr != progRep->lastSrcAddr
2161+ || prevRep.lastDestAddr != progRep->lastDestAddr
2162+ || prevRep.dmaSize != progRep->dmaSize
2163+ || prevRep.currBufDesc != progRep->currBufDesc) {
2164+ /* If they don't match, remember previous
2165+ values and try again:*/
2166+ prevRep.lastSrcAddr = progRep->lastSrcAddr;
2167+ prevRep.lastDestAddr = progRep->lastDestAddr;
2168+ prevRep.dmaSize = progRep->dmaSize;
2169+ prevRep.currBufDesc = progRep->currBufDesc;
2170+ again = MCD_TRUE;
2171+ } else
2172+ again = MCD_FALSE;
2173+ } while (again == MCD_TRUE);
2174+
2175+
2176+ /* Update dmaSize and lastDestAddr */
2177+ switch (MCD_remVariants.remDestRsdIncr[channel]) {
2178+ case MINUS1:
2179+ subModVal = ((int)progRep->lastDestAddr)
2180+ & ((MCD_remVariants.remXferSize[channel]) - 1);
2181+ addModVal = ((int)progRep->currBufDesc->destAddr)
2182+ & ((MCD_remVariants.remXferSize[channel]) - 1);
2183+ LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr)
2184+ - addModVal;
2185+ LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal;
2186+ destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr;
2187+ bytesNotXfered =
2188+ (destDiffBytes/MCD_remVariants.remDestIncr[channel]) *
2189+ (MCD_remVariants.remDestIncr[channel]
2190+ + MCD_remVariants.remXferSize[channel]);
2191+ progRep->dmaSize = destDiffBytes - bytesNotXfered
2192+ + addModVal - subModVal;
2193+ break;
2194+ case ZERO:
2195+ progRep->lastDestAddr = progRep->currBufDesc->destAddr;
2196+ break;
2197+ case PLUS1:
2198+ /* This value has to be subtracted
2199+ from the final calculated dmaSize. */
2200+ subModVal = ((int)progRep->currBufDesc->destAddr)
2201+ & ((MCD_remVariants.remXferSize[channel]) - 1);
2202+ /* These bytes are already in lastDestAddr. */
2203+ addModVal = ((int)progRep->lastDestAddr)
2204+ & ((MCD_remVariants.remXferSize[channel]) - 1);
2205+ LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr)
2206+ - subModVal;
2207+ LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal;
2208+ destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr);
2209+ numIterations = (LWAlignedCurrDestAddr -
2210+ LWAlignedInitDestAddr)/MCD_remVariants.remDestIncr[channel];
2211+ bytesNotXfered = numIterations *
2212+ (MCD_remVariants.remDestIncr[channel]
2213+ - MCD_remVariants.remXferSize[channel]);
2214+ progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal;
2215+ break;
2216+ default:
2217+ break;
2218+ }
2219+
2220+ /* This covers M1,P1,Z for source */
2221+ switch (MCD_remVariants.remSrcRsdIncr[channel]) {
2222+ case MINUS1:
2223+ progRep->lastSrcAddr =
2224+ progRep->currBufDesc->srcAddr +
2225+ (MCD_remVariants.remSrcIncr[channel] *
2226+ (progRep->dmaSize/MCD_remVariants.remXferSize[channel]));
2227+ break;
2228+ case ZERO:
2229+ progRep->lastSrcAddr = progRep->currBufDesc->srcAddr;
2230+ break;
2231+ case PLUS1:
2232+ progRep->lastSrcAddr =
2233+ progRep->currBufDesc->srcAddr +
2234+ (MCD_remVariants.remSrcIncr[channel] *
2235+ (progRep->dmaSize/MCD_remVariants.remXferSize[channel]));
2236+ break;
2237+ default:
2238+ break;
2239+ }
2240+
2241+ return MCD_OK;
2242+}
2243+/******************* End of MCD_XferProgrQuery() ********************/
2244+
2245+/********************************************************************/
2246+/* MCD_resmActions() does the majority of the actions of a DMA resume.
2247+ * It is called from MCD_killDma() and MCD_resumeDma(). It has to be
2248+ * a separate function because the kill function has to negate the task
2249+ * enable before resuming it, but the resume function has to do nothing
2250+ * if there is no DMA on that channel (i.e., if the enable bit is 0).
2251+ */
2252+static void MCD_resmActions(int channel)
2253+{
2254+ MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
2255+ MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus;
2256+
2257+ /* Determine which initiators are asserted */
2258+ MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
2259+
2260+ if ((MCD_dmaBar->ptdDebug >> channel) & 0x1)
2261+ MCD_chStatus[channel] = MCD_RUNNING;
2262+ else
2263+ MCD_chStatus[channel] = MCD_IDLE;
2264+}
2265+/********************* End of MCD_resmActions() *********************/
2266+
2267+/********************************************************************/
2268+/* Function: MCD_killDma
2269+ * Purpose: Halt the DMA on the requested channel, without any
2270+ * intention of resuming the DMA.
2271+ * Arguments: channel - requested channel
2272+ * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
2273+ *
2274+ * Notes:
2275+ * A DMA may be killed from any state, including paused state, and it
2276+ * always goes to the MCD_HALTED state even if it is killed while in
2277+ * the MCD_NO_DMA or MCD_IDLE states.
2278+ */
2279+int MCD_killDma(int channel)
2280+{
2281+ if ((channel < 0) || (channel >= NCHANNELS))
2282+ return MCD_CHANNEL_INVALID;
2283+
2284+ MCD_dmaBar->taskControl[channel] = 0x0;
2285+
2286+ /* Clean up after a paused task */
2287+ if (MCD_chStatus[channel] == MCD_PAUSED) {
2288+ MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
2289+ MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus;
2290+ }
2291+
2292+ MCD_chStatus[channel] = MCD_HALTED;
2293+
2294+ return MCD_OK;
2295+}
2296+/************************ End of MCD_killDma() **********************/
2297+
2298+/********************************************************************/
2299+/* Function: MCD_continDma
2300+ * Purpose: Continue a DMA which as stopped due to encountering an
2301+ * unready buffer descriptor.
2302+ * Arguments: channel - channel to continue the DMA on
2303+ * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
2304+ *
2305+ * Notes:
2306+ * This routine does not check to see if there is a task which can
2307+ * be continued. Also this routine should not be used with single DMAs.
2308+ */
2309+int MCD_continDma(int channel)
2310+{
2311+ if ((channel < 0) || (channel >= NCHANNELS))
2312+ return MCD_CHANNEL_INVALID;
2313+
2314+ MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN;
2315+ MCD_chStatus[channel] = MCD_RUNNING;
2316+
2317+ return MCD_OK;
2318+}
2319+/********************** End of MCD_continDma() **********************/
2320+
2321+/*********************************************************************
2322+ * MCD_pauseDma() and MCD_resumeDma() below use the DMA's debug unit
2323+ * to freeze a task and resume it. We freeze a task by breakpointing
2324+ * on the stated task. That is, not any specific place in the task,
2325+ * but any time that task executes. In particular, when that task
2326+ * executes, we want to freeze that task and only that task.
2327+ *
2328+ * The bits of the debug control register influence interrupts vs.
2329+ * breakpoints as follows:
2330+ * - Bits 14 and 0 enable or disable debug functions. If enabled, you
2331+ * will get the interrupt but you may or may not get a breakpoint.
2332+ * - Bits 2 and 1 decide whether you also get a breakpoint in addition
2333+ * to an interrupt.
2334+ *
2335+ * The debug unit can do these actions in response to either internally
2336+ * detected breakpoint conditions from the comparators, or in response
2337+ * to the external breakpoint pin, or both.
2338+ * - Bits 14 and 1 perform the above-described functions for
2339+ * internally-generated conditions, i.e., the debug comparators.
2340+ * - Bits 0 and 2 perform the above-described functions for external
2341+ * conditions, i.e., the breakpoint external pin.
2342+ *
2343+ * Note that, although you "always" get the interrupt when you turn
2344+ * the debug functions, the interrupt can nevertheless, if desired, be
2345+ * masked by the corresponding bit in the PTD's IMR. Note also that
2346+ * this means that bits 14 and 0 must enable debug functions before
2347+ * bits 1 and 2, respectively, have any effect.
2348+ *
2349+ * NOTE: It's extremely important to not pause more than one DMA channel
2350+ * at a time.
2351+ ********************************************************************/
2352+
2353+/********************************************************************/
2354+/* Function: MCD_pauseDma
2355+ * Purpose: Pauses the DMA on a given channel (if any DMA is running
2356+ * on that channel).
2357+ * Arguments: channel
2358+ * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
2359+ */
2360+int MCD_pauseDma(int channel)
2361+{
2362+ if ((channel < 0) || (channel >= NCHANNELS))
2363+ return MCD_CHANNEL_INVALID;
2364+
2365+ if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) {
2366+ MCD_dmaBar->debugComp1 = channel;
2367+ MCD_dmaBar->debugControl =
2368+ DBG_CTL_ENABLE | (1 << (channel + 16));
2369+ MCD_chStatus[channel] = MCD_PAUSED;
2370+ }
2371+
2372+ return MCD_OK;
2373+}
2374+/************************* End of MCD_pauseDma() ********************/
2375+
2376+/********************************************************************/
2377+/* Function: MCD_resumeDma
2378+ * Purpose: Resumes the DMA on a given channel (if any DMA is
2379+ * running on that channel).
2380+ * Arguments: channel - channel on which to resume DMA
2381+ * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
2382+ */
2383+int MCD_resumeDma(int channel)
2384+{
2385+ if ((channel < 0) || (channel >= NCHANNELS))
2386+ return MCD_CHANNEL_INVALID;
2387+
2388+ if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN)
2389+ MCD_resmActions(channel);
2390+
2391+ return MCD_OK;
2392+}
2393+/************************ End of MCD_resumeDma() ********************/
2394+
2395+/********************************************************************/
2396+/* Function: MCD_csumQuery
2397+ * Purpose: Provide the checksum after performing a non-chained DMA
2398+ * Arguments: channel - channel to report on
2399+ * csum - pointer to where to write the checksum/CRC
2400+ * Returns: MCD_ERROR if the channel is invalid, else MCD_OK
2401+ *
2402+ * Notes:
2403+ *
2404+ */
2405+int MCD_csumQuery(int channel, u32 *csum)
2406+{
2407+#ifdef MCD_INCLUDE_EU
2408+ if ((channel < 0) || (channel >= NCHANNELS))
2409+ return MCD_CHANNEL_INVALID;
2410+
2411+ *csum = MCD_relocBuffDesc[channel].csumResult;
2412+ return MCD_OK;
2413+#else
2414+ return MCD_ERROR;
2415+#endif
2416+}
2417+/*********************** End of MCD_resumeDma() *********************/
2418+
2419+/********************************************************************/
2420+/* Function: MCD_getCodeSize
2421+ * Purpose: Provide the size requirements of the microcoded tasks
2422+ * Returns: Size in bytes
2423+ */
2424+int MCD_getCodeSize(void)
2425+{
2426+#ifdef MCD_INCLUDE_EU
2427+ return 0x2b64;
2428+#else
2429+ return 0x1744;
2430+#endif
2431+}
2432+/********************** End of MCD_getCodeSize() ********************/
2433+
2434+/********************************************************************/
2435+/* Function: MCD_getVersion
2436+ * Purpose: Provide the version string and number
2437+ * Arguments: longVersion - user supplied pointer to a pointer to a char
2438+ * which points to the version string
2439+ * Returns: Version number and version string (by reference)
2440+ */
2441+char MCD_versionString[] = "Multi-channel DMA API v1.0";
2442+#define MCD_REV_MAJOR 0x01
2443+#define MCD_REV_MINOR 0x00
2444+
2445+int MCD_getVersion(char **longVersion)
2446+{
2447+ int ret = 0;
2448+ *longVersion = MCD_versionString;
2449+ ret = (MCD_REV_MAJOR << 8) | MCD_REV_MINOR;
2450+ return ret;
2451+}
2452+/********************** End of MCD_getVersion() *********************/
2453+
2454+/********************************************************************/
2455+/* Private version of memcpy()
2456+ * Note that everything this is used for is longword-aligned.
2457+ */
2458+static void MCD_memcpy(int *dest, int *src, u32 size)
2459+{
2460+ u32 i;
2461+
2462+ for (i = 0; i < size; i += sizeof(int), dest++, src++)
2463+ *dest = *src;
2464+}
2465+/********************************************************************/
2466--- /dev/null
2467+++ b/drivers/dma/MCD_progCheck.h
2468@@ -0,0 +1,29 @@
2469+/*
2470+ * drivers/dma/MCD_progCheck.h
2471+ *
2472+ * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
2473+ * Kurt Mahan <kmahan@freescale.com>
2474+ * Shrek Wu b16972@freescale.com
2475+ *
2476+ * This program is free software; you can redistribute it and/or
2477+ * modify it under the terms of the GNU General Public License as
2478+ * published by the Free Software Foundation; either version 2 of
2479+ * the License, or (at your option) any later version.
2480+ *
2481+ * This program is distributed in the hope that it will be useful,
2482+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
2483+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2484+ * GNU General Public License for more details.
2485+ *
2486+ * You should have received a copy of the GNU General Public License
2487+ * along with this program; if not, write to the Free Software
2488+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
2489+ * MA 02111-1307 USA
2490+ */
2491+
2492+/* This file is autogenerated. Do not change */
2493+
2494+#define CURRBD 4
2495+#define DCOUNT 6
2496+#define DESTPTR 5
2497+#define SRCPTR 7
2498--- /dev/null
2499+++ b/drivers/dma/MCD_tasks.c
2500@@ -0,0 +1,2457 @@
2501+/*
2502+ * drivers/dma/MCD_tasks.c
2503+ *
2504+ * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
2505+ * Kurt Mahan <kmahan@freescale.com>
2506+ * Shrek Wu b16972@freescale.com
2507+ *
2508+ * This program is free software; you can redistribute it and/or
2509+ * modify it under the terms of the GNU General Public License as
2510+ * published by the Free Software Foundation; either version 2 of
2511+ * the License, or (at your option) any later version.
2512+ *
2513+ * This program is distributed in the hope that it will be useful,
2514+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
2515+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2516+ * GNU General Public License for more details.
2517+ *
2518+ * You should have received a copy of the GNU General Public License
2519+ * along with this program; if not, write to the Free Software
2520+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
2521+ * MA 02111-1307 USA
2522+ */
2523+
2524+#include "MCD_dma.h"
2525+
2526+u32 MCD_varTab0[];
2527+u32 MCD_varTab1[];
2528+u32 MCD_varTab2[];
2529+u32 MCD_varTab3[];
2530+u32 MCD_varTab4[];
2531+u32 MCD_varTab5[];
2532+u32 MCD_varTab6[];
2533+u32 MCD_varTab7[];
2534+u32 MCD_varTab8[];
2535+u32 MCD_varTab9[];
2536+u32 MCD_varTab10[];
2537+u32 MCD_varTab11[];
2538+u32 MCD_varTab12[];
2539+u32 MCD_varTab13[];
2540+u32 MCD_varTab14[];
2541+u32 MCD_varTab15[];
2542+
2543+u32 MCD_funcDescTab0[];
2544+#ifdef MCD_INCLUDE_EU
2545+u32 MCD_funcDescTab1[];
2546+u32 MCD_funcDescTab2[];
2547+u32 MCD_funcDescTab3[];
2548+u32 MCD_funcDescTab4[];
2549+u32 MCD_funcDescTab5[];
2550+u32 MCD_funcDescTab6[];
2551+u32 MCD_funcDescTab7[];
2552+u32 MCD_funcDescTab8[];
2553+u32 MCD_funcDescTab9[];
2554+u32 MCD_funcDescTab10[];
2555+u32 MCD_funcDescTab11[];
2556+u32 MCD_funcDescTab12[];
2557+u32 MCD_funcDescTab13[];
2558+u32 MCD_funcDescTab14[];
2559+u32 MCD_funcDescTab15[];
2560+#endif
2561+
2562+u32 MCD_contextSave0[];
2563+u32 MCD_contextSave1[];
2564+u32 MCD_contextSave2[];
2565+u32 MCD_contextSave3[];
2566+u32 MCD_contextSave4[];
2567+u32 MCD_contextSave5[];
2568+u32 MCD_contextSave6[];
2569+u32 MCD_contextSave7[];
2570+u32 MCD_contextSave8[];
2571+u32 MCD_contextSave9[];
2572+u32 MCD_contextSave10[];
2573+u32 MCD_contextSave11[];
2574+u32 MCD_contextSave12[];
2575+u32 MCD_contextSave13[];
2576+u32 MCD_contextSave14[];
2577+u32 MCD_contextSave15[];
2578+
2579+u32 MCD_realTaskTableSrc[] = {
2580+ 0x00000000,
2581+ 0x00000000,
2582+ (u32)MCD_varTab0, /* Task 0 Variable Table */
2583+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2584+ 0x00000000,
2585+ 0x00000000,
2586+ (u32)MCD_contextSave0, /* Task 0 context save space */
2587+ 0x00000000,
2588+ 0x00000000,
2589+ 0x00000000,
2590+ (u32)MCD_varTab1, /* Task 1 Variable Table */
2591+#ifdef MCD_INCLUDE_EU
2592+ (u32)MCD_funcDescTab1, /* Task 1 Function Descriptor Table & Flags */
2593+#else
2594+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2595+#endif
2596+ 0x00000000,
2597+ 0x00000000,
2598+ (u32)MCD_contextSave1, /* Task 1 context save space */
2599+ 0x00000000,
2600+ 0x00000000,
2601+ 0x00000000,
2602+ (u32)MCD_varTab2, /* Task 2 Variable Table */
2603+#ifdef MCD_INCLUDE_EU
2604+ (u32)MCD_funcDescTab2, /* Task 2 Function Descriptor Table & Flags */
2605+#else
2606+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2607+#endif
2608+ 0x00000000,
2609+ 0x00000000,
2610+ (u32)MCD_contextSave2, /* Task 2 context save space */
2611+ 0x00000000,
2612+ 0x00000000,
2613+ 0x00000000,
2614+ (u32)MCD_varTab3, /* Task 3 Variable Table */
2615+#ifdef MCD_INCLUDE_EU
2616+ (u32)MCD_funcDescTab3, /* Task 3 Function Descriptor Table & Flags */
2617+#else
2618+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2619+#endif
2620+ 0x00000000,
2621+ 0x00000000,
2622+ (u32)MCD_contextSave3, /* Task 3 context save space */
2623+ 0x00000000,
2624+ 0x00000000,
2625+ 0x00000000,
2626+ (u32)MCD_varTab4, /* Task 4 Variable Table */
2627+#ifdef MCD_INCLUDE_EU
2628+ (u32)MCD_funcDescTab4, /* Task 4 Function Descriptor Table & Flags */
2629+#else
2630+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2631+#endif
2632+ 0x00000000,
2633+ 0x00000000,
2634+ (u32)MCD_contextSave4, /* Task 4 context save space */
2635+ 0x00000000,
2636+ 0x00000000,
2637+ 0x00000000,
2638+ (u32)MCD_varTab5, /* Task 5 Variable Table */
2639+#ifdef MCD_INCLUDE_EU
2640+ (u32)MCD_funcDescTab5, /* Task 5 Function Descriptor Table & Flags */
2641+#else
2642+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2643+#endif
2644+ 0x00000000,
2645+ 0x00000000,
2646+ (u32)MCD_contextSave5, /* Task 5 context save space */
2647+ 0x00000000,
2648+ 0x00000000,
2649+ 0x00000000,
2650+ (u32)MCD_varTab6, /* Task 6 Variable Table */
2651+#ifdef MCD_INCLUDE_EU
2652+ (u32)MCD_funcDescTab6, /* Task 6 Function Descriptor Table & Flags */
2653+#else
2654+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2655+#endif
2656+ 0x00000000,
2657+ 0x00000000,
2658+ (u32)MCD_contextSave6, /* Task 6 context save space */
2659+ 0x00000000,
2660+ 0x00000000,
2661+ 0x00000000,
2662+ (u32)MCD_varTab7, /* Task 7 Variable Table */
2663+#ifdef MCD_INCLUDE_EU
2664+ (u32)MCD_funcDescTab7, /* Task 7 Function Descriptor Table & Flags */
2665+#else
2666+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2667+#endif
2668+ 0x00000000,
2669+ 0x00000000,
2670+ (u32)MCD_contextSave7, /* Task 7 context save space */
2671+ 0x00000000,
2672+ 0x00000000,
2673+ 0x00000000,
2674+ (u32)MCD_varTab8, /* Task 8 Variable Table */
2675+#ifdef MCD_INCLUDE_EU
2676+ (u32)MCD_funcDescTab8, /* Task 8 Function Descriptor Table & Flags */
2677+#else
2678+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2679+#endif
2680+ 0x00000000,
2681+ 0x00000000,
2682+ (u32)MCD_contextSave8, /* Task 8 context save space */
2683+ 0x00000000,
2684+ 0x00000000,
2685+ 0x00000000,
2686+ (u32)MCD_varTab9, /* Task 9 Variable Table */
2687+#ifdef MCD_INCLUDE_EU
2688+ (u32)MCD_funcDescTab9, /* Task 9 Function Descriptor Table & Flags */
2689+#else
2690+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2691+#endif
2692+ 0x00000000,
2693+ 0x00000000,
2694+ (u32)MCD_contextSave9, /* Task 9 context save space */
2695+ 0x00000000,
2696+ 0x00000000,
2697+ 0x00000000,
2698+ (u32)MCD_varTab10, /* Task 10 Variable Table */
2699+#ifdef MCD_INCLUDE_EU
2700+ (u32)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
2701+#else
2702+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2703+#endif
2704+ 0x00000000,
2705+ 0x00000000,
2706+ (u32)MCD_contextSave10, /* Task 10 context save space */
2707+ 0x00000000,
2708+ 0x00000000,
2709+ 0x00000000,
2710+ (u32)MCD_varTab11, /* Task 11 Variable Table */
2711+#ifdef MCD_INCLUDE_EU
2712+ (u32)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
2713+#else
2714+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2715+#endif
2716+ 0x00000000,
2717+ 0x00000000,
2718+ (u32)MCD_contextSave11, /* Task 11 context save space */
2719+ 0x00000000,
2720+ 0x00000000,
2721+ 0x00000000,
2722+ (u32)MCD_varTab12, /* Task 12 Variable Table */
2723+#ifdef MCD_INCLUDE_EU
2724+ (u32)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
2725+#else
2726+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2727+#endif
2728+ 0x00000000,
2729+ 0x00000000,
2730+ (u32)MCD_contextSave12, /* Task 12 context save space */
2731+ 0x00000000,
2732+ 0x00000000,
2733+ 0x00000000,
2734+ (u32)MCD_varTab13, /* Task 13 Variable Table */
2735+#ifdef MCD_INCLUDE_EU
2736+ (u32)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
2737+#else
2738+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2739+#endif
2740+ 0x00000000,
2741+ 0x00000000,
2742+ (u32)MCD_contextSave13, /* Task 13 context save space */
2743+ 0x00000000,
2744+ 0x00000000,
2745+ 0x00000000,
2746+ (u32)MCD_varTab14, /* Task 14 Variable Table */
2747+#ifdef MCD_INCLUDE_EU
2748+ (u32)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
2749+#else
2750+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2751+#endif
2752+ 0x00000000,
2753+ 0x00000000,
2754+ (u32)MCD_contextSave14, /* Task 14 context save space */
2755+ 0x00000000,
2756+ 0x00000000,
2757+ 0x00000000,
2758+ (u32)MCD_varTab15, /* Task 15 Variable Table */
2759+#ifdef MCD_INCLUDE_EU
2760+ (u32)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
2761+#else
2762+ (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
2763+#endif
2764+ 0x00000000,
2765+ 0x00000000,
2766+ (u32)MCD_contextSave15, /* Task 15 context save space */
2767+ 0x00000000,
2768+};
2769+
2770+
2771+u32 MCD_varTab0[] = {
2772+/* Task 0 Variable Table */
2773+ 0x00000000, /* var[0] */
2774+ 0x00000000, /* var[1] */
2775+ 0x00000000, /* var[2] */
2776+ 0x00000000, /* var[3] */
2777+ 0x00000000, /* var[4] */
2778+ 0x00000000, /* var[5] */
2779+ 0x00000000, /* var[6] */
2780+ 0x00000000, /* var[7] */
2781+ 0x00000000, /* var[8] */
2782+ 0x00000000, /* var[9] */
2783+ 0x00000000, /* var[10] */
2784+ 0x00000000, /* var[11] */
2785+ 0x00000000, /* var[12] */
2786+ 0x00000000, /* var[13] */
2787+ 0x00000000, /* var[14] */
2788+ 0x00000000, /* var[15] */
2789+ 0x00000000, /* var[16] */
2790+ 0x00000000, /* var[17] */
2791+ 0x00000000, /* var[18] */
2792+ 0x00000000, /* var[19] */
2793+ 0x00000000, /* var[20] */
2794+ 0x00000000, /* var[21] */
2795+ 0x00000000, /* var[22] */
2796+ 0x00000000, /* var[23] */
2797+ 0xe0000000, /* inc[0] */
2798+ 0x20000000, /* inc[1] */
2799+ 0x2000ffff, /* inc[2] */
2800+ 0x00000000, /* inc[3] */
2801+ 0x00000000, /* inc[4] */
2802+ 0x00000000, /* inc[5] */
2803+ 0x00000000, /* inc[6] */
2804+ 0x00000000, /* inc[7] */
2805+};
2806+
2807+
2808+u32 MCD_varTab1[] = {
2809+/* Task 1 Variable Table */
2810+ 0x00000000, /* var[0] */
2811+ 0x00000000, /* var[1] */
2812+ 0x00000000, /* var[2] */
2813+ 0x00000000, /* var[3] */
2814+ 0x00000000, /* var[4] */
2815+ 0x00000000, /* var[5] */
2816+ 0x00000000, /* var[6] */
2817+ 0x00000000, /* var[7] */
2818+ 0x00000000, /* var[8] */
2819+ 0x00000000, /* var[9] */
2820+ 0x00000000, /* var[10] */
2821+ 0x00000000, /* var[11] */
2822+ 0x00000000, /* var[12] */
2823+ 0x00000000, /* var[13] */
2824+ 0x00000000, /* var[14] */
2825+ 0x00000000, /* var[15] */
2826+ 0x00000000, /* var[16] */
2827+ 0x00000000, /* var[17] */
2828+ 0x00000000, /* var[18] */
2829+ 0x00000000, /* var[19] */
2830+ 0x00000000, /* var[20] */
2831+ 0x00000000, /* var[21] */
2832+ 0x00000000, /* var[22] */
2833+ 0x00000000, /* var[23] */
2834+ 0xe0000000, /* inc[0] */
2835+ 0x20000000, /* inc[1] */
2836+ 0x2000ffff, /* inc[2] */
2837+ 0x00000000, /* inc[3] */
2838+ 0x00000000, /* inc[4] */
2839+ 0x00000000, /* inc[5] */
2840+ 0x00000000, /* inc[6] */
2841+ 0x00000000, /* inc[7] */
2842+};
2843+
2844+u32 MCD_varTab2[] = {
2845+/* Task 2 Variable Table */
2846+ 0x00000000, /* var[0] */
2847+ 0x00000000, /* var[1] */
2848+ 0x00000000, /* var[2] */
2849+ 0x00000000, /* var[3] */
2850+ 0x00000000, /* var[4] */
2851+ 0x00000000, /* var[5] */
2852+ 0x00000000, /* var[6] */
2853+ 0x00000000, /* var[7] */
2854+ 0x00000000, /* var[8] */
2855+ 0x00000000, /* var[9] */
2856+ 0x00000000, /* var[10] */
2857+ 0x00000000, /* var[11] */
2858+ 0x00000000, /* var[12] */
2859+ 0x00000000, /* var[13] */
2860+ 0x00000000, /* var[14] */
2861+ 0x00000000, /* var[15] */
2862+ 0x00000000, /* var[16] */
2863+ 0x00000000, /* var[17] */
2864+ 0x00000000, /* var[18] */
2865+ 0x00000000, /* var[19] */
2866+ 0x00000000, /* var[20] */
2867+ 0x00000000, /* var[21] */
2868+ 0x00000000, /* var[22] */
2869+ 0x00000000, /* var[23] */
2870+ 0xe0000000, /* inc[0] */
2871+ 0x20000000, /* inc[1] */
2872+ 0x2000ffff, /* inc[2] */
2873+ 0x00000000, /* inc[3] */
2874+ 0x00000000, /* inc[4] */
2875+ 0x00000000, /* inc[5] */
2876+ 0x00000000, /* inc[6] */
2877+ 0x00000000, /* inc[7] */
2878+};
2879+
2880+u32 MCD_varTab3[] = {
2881+/* Task 3 Variable Table */
2882+ 0x00000000, /* var[0] */
2883+ 0x00000000, /* var[1] */
2884+ 0x00000000, /* var[2] */
2885+ 0x00000000, /* var[3] */
2886+ 0x00000000, /* var[4] */
2887+ 0x00000000, /* var[5] */
2888+ 0x00000000, /* var[6] */
2889+ 0x00000000, /* var[7] */
2890+ 0x00000000, /* var[8] */
2891+ 0x00000000, /* var[9] */
2892+ 0x00000000, /* var[10] */
2893+ 0x00000000, /* var[11] */
2894+ 0x00000000, /* var[12] */
2895+ 0x00000000, /* var[13] */
2896+ 0x00000000, /* var[14] */
2897+ 0x00000000, /* var[15] */
2898+ 0x00000000, /* var[16] */
2899+ 0x00000000, /* var[17] */
2900+ 0x00000000, /* var[18] */
2901+ 0x00000000, /* var[19] */
2902+ 0x00000000, /* var[20] */
2903+ 0x00000000, /* var[21] */
2904+ 0x00000000, /* var[22] */
2905+ 0x00000000, /* var[23] */
2906+ 0xe0000000, /* inc[0] */
2907+ 0x20000000, /* inc[1] */
2908+ 0x2000ffff, /* inc[2] */
2909+ 0x00000000, /* inc[3] */
2910+ 0x00000000, /* inc[4] */
2911+ 0x00000000, /* inc[5] */
2912+ 0x00000000, /* inc[6] */
2913+ 0x00000000, /* inc[7] */
2914+};
2915+
2916+u32 MCD_varTab4[] = {
2917+/* Task 4 Variable Table */
2918+ 0x00000000, /* var[0] */
2919+ 0x00000000, /* var[1] */
2920+ 0x00000000, /* var[2] */
2921+ 0x00000000, /* var[3] */
2922+ 0x00000000, /* var[4] */
2923+ 0x00000000, /* var[5] */
2924+ 0x00000000, /* var[6] */
2925+ 0x00000000, /* var[7] */
2926+ 0x00000000, /* var[8] */
2927+ 0x00000000, /* var[9] */
2928+ 0x00000000, /* var[10] */
2929+ 0x00000000, /* var[11] */
2930+ 0x00000000, /* var[12] */
2931+ 0x00000000, /* var[13] */
2932+ 0x00000000, /* var[14] */
2933+ 0x00000000, /* var[15] */
2934+ 0x00000000, /* var[16] */
2935+ 0x00000000, /* var[17] */
2936+ 0x00000000, /* var[18] */
2937+ 0x00000000, /* var[19] */
2938+ 0x00000000, /* var[20] */
2939+ 0x00000000, /* var[21] */
2940+ 0x00000000, /* var[22] */
2941+ 0x00000000, /* var[23] */
2942+ 0xe0000000, /* inc[0] */
2943+ 0x20000000, /* inc[1] */
2944+ 0x2000ffff, /* inc[2] */
2945+ 0x00000000, /* inc[3] */
2946+ 0x00000000, /* inc[4] */
2947+ 0x00000000, /* inc[5] */
2948+ 0x00000000, /* inc[6] */
2949+ 0x00000000, /* inc[7] */
2950+};
2951+
2952+u32 MCD_varTab5[] = {
2953+/* Task 5 Variable Table */
2954+ 0x00000000, /* var[0] */
2955+ 0x00000000, /* var[1] */
2956+ 0x00000000, /* var[2] */
2957+ 0x00000000, /* var[3] */
2958+ 0x00000000, /* var[4] */
2959+ 0x00000000, /* var[5] */
2960+ 0x00000000, /* var[6] */
2961+ 0x00000000, /* var[7] */
2962+ 0x00000000, /* var[8] */
2963+ 0x00000000, /* var[9] */
2964+ 0x00000000, /* var[10] */
2965+ 0x00000000, /* var[11] */
2966+ 0x00000000, /* var[12] */
2967+ 0x00000000, /* var[13] */
2968+ 0x00000000, /* var[14] */
2969+ 0x00000000, /* var[15] */
2970+ 0x00000000, /* var[16] */
2971+ 0x00000000, /* var[17] */
2972+ 0x00000000, /* var[18] */
2973+ 0x00000000, /* var[19] */
2974+ 0x00000000, /* var[20] */
2975+ 0x00000000, /* var[21] */
2976+ 0x00000000, /* var[22] */
2977+ 0x00000000, /* var[23] */
2978+ 0xe0000000, /* inc[0] */
2979+ 0x20000000, /* inc[1] */
2980+ 0x2000ffff, /* inc[2] */
2981+ 0x00000000, /* inc[3] */
2982+ 0x00000000, /* inc[4] */
2983+ 0x00000000, /* inc[5] */
2984+ 0x00000000, /* inc[6] */
2985+ 0x00000000, /* inc[7] */
2986+};
2987+
2988+u32 MCD_varTab6[] = {
2989+/* Task 6 Variable Table */
2990+ 0x00000000, /* var[0] */
2991+ 0x00000000, /* var[1] */
2992+ 0x00000000, /* var[2] */
2993+ 0x00000000, /* var[3] */
2994+ 0x00000000, /* var[4] */
2995+ 0x00000000, /* var[5] */
2996+ 0x00000000, /* var[6] */
2997+ 0x00000000, /* var[7] */
2998+ 0x00000000, /* var[8] */
2999+ 0x00000000, /* var[9] */
3000+ 0x00000000, /* var[10] */
3001+ 0x00000000, /* var[11] */
3002+ 0x00000000, /* var[12] */
3003+ 0x00000000, /* var[13] */
3004+ 0x00000000, /* var[14] */
3005+ 0x00000000, /* var[15] */
3006+ 0x00000000, /* var[16] */
3007+ 0x00000000, /* var[17] */
3008+ 0x00000000, /* var[18] */
3009+ 0x00000000, /* var[19] */
3010+ 0x00000000, /* var[20] */
3011+ 0x00000000, /* var[21] */
3012+ 0x00000000, /* var[22] */
3013+ 0x00000000, /* var[23] */
3014+ 0xe0000000, /* inc[0] */
3015+ 0x20000000, /* inc[1] */
3016+ 0x2000ffff, /* inc[2] */
3017+ 0x00000000, /* inc[3] */
3018+ 0x00000000, /* inc[4] */
3019+ 0x00000000, /* inc[5] */
3020+ 0x00000000, /* inc[6] */
3021+ 0x00000000, /* inc[7] */
3022+};
3023+
3024+u32 MCD_varTab7[] = {
3025+/* Task 7 Variable Table */
3026+ 0x00000000, /* var[0] */
3027+ 0x00000000, /* var[1] */
3028+ 0x00000000, /* var[2] */
3029+ 0x00000000, /* var[3] */
3030+ 0x00000000, /* var[4] */
3031+ 0x00000000, /* var[5] */
3032+ 0x00000000, /* var[6] */
3033+ 0x00000000, /* var[7] */
3034+ 0x00000000, /* var[8] */
3035+ 0x00000000, /* var[9] */
3036+ 0x00000000, /* var[10] */
3037+ 0x00000000, /* var[11] */
3038+ 0x00000000, /* var[12] */
3039+ 0x00000000, /* var[13] */
3040+ 0x00000000, /* var[14] */
3041+ 0x00000000, /* var[15] */
3042+ 0x00000000, /* var[16] */
3043+ 0x00000000, /* var[17] */
3044+ 0x00000000, /* var[18] */
3045+ 0x00000000, /* var[19] */
3046+ 0x00000000, /* var[20] */
3047+ 0x00000000, /* var[21] */
3048+ 0x00000000, /* var[22] */
3049+ 0x00000000, /* var[23] */
3050+ 0xe0000000, /* inc[0] */
3051+ 0x20000000, /* inc[1] */
3052+ 0x2000ffff, /* inc[2] */
3053+ 0x00000000, /* inc[3] */
3054+ 0x00000000, /* inc[4] */
3055+ 0x00000000, /* inc[5] */
3056+ 0x00000000, /* inc[6] */
3057+ 0x00000000, /* inc[7] */
3058+};
3059+
3060+u32 MCD_varTab8[] = {
3061+/* Task 8 Variable Table */
3062+ 0x00000000, /* var[0] */
3063+ 0x00000000, /* var[1] */
3064+ 0x00000000, /* var[2] */
3065+ 0x00000000, /* var[3] */
3066+ 0x00000000, /* var[4] */
3067+ 0x00000000, /* var[5] */
3068+ 0x00000000, /* var[6] */
3069+ 0x00000000, /* var[7] */
3070+ 0x00000000, /* var[8] */
3071+ 0x00000000, /* var[9] */
3072+ 0x00000000, /* var[10] */
3073+ 0x00000000, /* var[11] */
3074+ 0x00000000, /* var[12] */
3075+ 0x00000000, /* var[13] */
3076+ 0x00000000, /* var[14] */
3077+ 0x00000000, /* var[15] */
3078+ 0x00000000, /* var[16] */
3079+ 0x00000000, /* var[17] */
3080+ 0x00000000, /* var[18] */
3081+ 0x00000000, /* var[19] */
3082+ 0x00000000, /* var[20] */
3083+ 0x00000000, /* var[21] */
3084+ 0x00000000, /* var[22] */
3085+ 0x00000000, /* var[23] */
3086+ 0xe0000000, /* inc[0] */
3087+ 0x20000000, /* inc[1] */
3088+ 0x2000ffff, /* inc[2] */
3089+ 0x00000000, /* inc[3] */
3090+ 0x00000000, /* inc[4] */
3091+ 0x00000000, /* inc[5] */
3092+ 0x00000000, /* inc[6] */
3093+ 0x00000000, /* inc[7] */
3094+};
3095+
3096+u32 MCD_varTab9[] = {
3097+/* Task 9 Variable Table */
3098+ 0x00000000, /* var[0] */
3099+ 0x00000000, /* var[1] */
3100+ 0x00000000, /* var[2] */
3101+ 0x00000000, /* var[3] */
3102+ 0x00000000, /* var[4] */
3103+ 0x00000000, /* var[5] */
3104+ 0x00000000, /* var[6] */
3105+ 0x00000000, /* var[7] */
3106+ 0x00000000, /* var[8] */
3107+ 0x00000000, /* var[9] */
3108+ 0x00000000, /* var[10] */
3109+ 0x00000000, /* var[11] */
3110+ 0x00000000, /* var[12] */
3111+ 0x00000000, /* var[13] */
3112+ 0x00000000, /* var[14] */
3113+ 0x00000000, /* var[15] */
3114+ 0x00000000, /* var[16] */
3115+ 0x00000000, /* var[17] */
3116+ 0x00000000, /* var[18] */
3117+ 0x00000000, /* var[19] */
3118+ 0x00000000, /* var[20] */
3119+ 0x00000000, /* var[21] */
3120+ 0x00000000, /* var[22] */
3121+ 0x00000000, /* var[23] */
3122+ 0xe0000000, /* inc[0] */
3123+ 0x20000000, /* inc[1] */
3124+ 0x2000ffff, /* inc[2] */
3125+ 0x00000000, /* inc[3] */
3126+ 0x00000000, /* inc[4] */
3127+ 0x00000000, /* inc[5] */
3128+ 0x00000000, /* inc[6] */
3129+ 0x00000000, /* inc[7] */
3130+};
3131+
3132+u32 MCD_varTab10[] = {
3133+/* Task 10 Variable Table */
3134+ 0x00000000, /* var[0] */
3135+ 0x00000000, /* var[1] */
3136+ 0x00000000, /* var[2] */
3137+ 0x00000000, /* var[3] */
3138+ 0x00000000, /* var[4] */
3139+ 0x00000000, /* var[5] */
3140+ 0x00000000, /* var[6] */
3141+ 0x00000000, /* var[7] */
3142+ 0x00000000, /* var[8] */
3143+ 0x00000000, /* var[9] */
3144+ 0x00000000, /* var[10] */
3145+ 0x00000000, /* var[11] */
3146+ 0x00000000, /* var[12] */
3147+ 0x00000000, /* var[13] */
3148+ 0x00000000, /* var[14] */
3149+ 0x00000000, /* var[15] */
3150+ 0x00000000, /* var[16] */
3151+ 0x00000000, /* var[17] */
3152+ 0x00000000, /* var[18] */
3153+ 0x00000000, /* var[19] */
3154+ 0x00000000, /* var[20] */
3155+ 0x00000000, /* var[21] */
3156+ 0x00000000, /* var[22] */
3157+ 0x00000000, /* var[23] */
3158+ 0xe0000000, /* inc[0] */
3159+ 0x20000000, /* inc[1] */
3160+ 0x2000ffff, /* inc[2] */
3161+ 0x00000000, /* inc[3] */
3162+ 0x00000000, /* inc[4] */
3163+ 0x00000000, /* inc[5] */
3164+ 0x00000000, /* inc[6] */
3165+ 0x00000000, /* inc[7] */
3166+};
3167+
3168+u32 MCD_varTab11[] = {
3169+/* Task 11 Variable Table */
3170+ 0x00000000, /* var[0] */
3171+ 0x00000000, /* var[1] */
3172+ 0x00000000, /* var[2] */
3173+ 0x00000000, /* var[3] */
3174+ 0x00000000, /* var[4] */
3175+ 0x00000000, /* var[5] */
3176+ 0x00000000, /* var[6] */
3177+ 0x00000000, /* var[7] */
3178+ 0x00000000, /* var[8] */
3179+ 0x00000000, /* var[9] */
3180+ 0x00000000, /* var[10] */
3181+ 0x00000000, /* var[11] */
3182+ 0x00000000, /* var[12] */
3183+ 0x00000000, /* var[13] */
3184+ 0x00000000, /* var[14] */
3185+ 0x00000000, /* var[15] */
3186+ 0x00000000, /* var[16] */
3187+ 0x00000000, /* var[17] */
3188+ 0x00000000, /* var[18] */
3189+ 0x00000000, /* var[19] */
3190+ 0x00000000, /* var[20] */
3191+ 0x00000000, /* var[21] */
3192+ 0x00000000, /* var[22] */
3193+ 0x00000000, /* var[23] */
3194+ 0xe0000000, /* inc[0] */
3195+ 0x20000000, /* inc[1] */
3196+ 0x2000ffff, /* inc[2] */
3197+ 0x00000000, /* inc[3] */
3198+ 0x00000000, /* inc[4] */
3199+ 0x00000000, /* inc[5] */
3200+ 0x00000000, /* inc[6] */
3201+ 0x00000000, /* inc[7] */
3202+};
3203+
3204+u32 MCD_varTab12[] = {
3205+/* Task 12 Variable Table */
3206+ 0x00000000, /* var[0] */
3207+ 0x00000000, /* var[1] */
3208+ 0x00000000, /* var[2] */
3209+ 0x00000000, /* var[3] */
3210+ 0x00000000, /* var[4] */
3211+ 0x00000000, /* var[5] */
3212+ 0x00000000, /* var[6] */
3213+ 0x00000000, /* var[7] */
3214+ 0x00000000, /* var[8] */
3215+ 0x00000000, /* var[9] */
3216+ 0x00000000, /* var[10] */
3217+ 0x00000000, /* var[11] */
3218+ 0x00000000, /* var[12] */
3219+ 0x00000000, /* var[13] */
3220+ 0x00000000, /* var[14] */
3221+ 0x00000000, /* var[15] */
3222+ 0x00000000, /* var[16] */
3223+ 0x00000000, /* var[17] */
3224+ 0x00000000, /* var[18] */
3225+ 0x00000000, /* var[19] */
3226+ 0x00000000, /* var[20] */
3227+ 0x00000000, /* var[21] */
3228+ 0x00000000, /* var[22] */
3229+ 0x00000000, /* var[23] */
3230+ 0xe0000000, /* inc[0] */
3231+ 0x20000000, /* inc[1] */
3232+ 0x2000ffff, /* inc[2] */
3233+ 0x00000000, /* inc[3] */
3234+ 0x00000000, /* inc[4] */
3235+ 0x00000000, /* inc[5] */
3236+ 0x00000000, /* inc[6] */
3237+ 0x00000000, /* inc[7] */
3238+};
3239+
3240+u32 MCD_varTab13[] = {
3241+/* Task 13 Variable Table */
3242+ 0x00000000, /* var[0] */
3243+ 0x00000000, /* var[1] */
3244+ 0x00000000, /* var[2] */
3245+ 0x00000000, /* var[3] */
3246+ 0x00000000, /* var[4] */
3247+ 0x00000000, /* var[5] */
3248+ 0x00000000, /* var[6] */
3249+ 0x00000000, /* var[7] */
3250+ 0x00000000, /* var[8] */
3251+ 0x00000000, /* var[9] */
3252+ 0x00000000, /* var[10] */
3253+ 0x00000000, /* var[11] */
3254+ 0x00000000, /* var[12] */
3255+ 0x00000000, /* var[13] */
3256+ 0x00000000, /* var[14] */
3257+ 0x00000000, /* var[15] */
3258+ 0x00000000, /* var[16] */
3259+ 0x00000000, /* var[17] */
3260+ 0x00000000, /* var[18] */
3261+ 0x00000000, /* var[19] */
3262+ 0x00000000, /* var[20] */
3263+ 0x00000000, /* var[21] */
3264+ 0x00000000, /* var[22] */
3265+ 0x00000000, /* var[23] */
3266+ 0xe0000000, /* inc[0] */
3267+ 0x20000000, /* inc[1] */
3268+ 0x2000ffff, /* inc[2] */
3269+ 0x00000000, /* inc[3] */
3270+ 0x00000000, /* inc[4] */
3271+ 0x00000000, /* inc[5] */
3272+ 0x00000000, /* inc[6] */
3273+ 0x00000000, /* inc[7] */
3274+};
3275+
3276+u32 MCD_varTab14[] = {
3277+/* Task 14 Variable Table */
3278+ 0x00000000, /* var[0] */
3279+ 0x00000000, /* var[1] */
3280+ 0x00000000, /* var[2] */
3281+ 0x00000000, /* var[3] */
3282+ 0x00000000, /* var[4] */
3283+ 0x00000000, /* var[5] */
3284+ 0x00000000, /* var[6] */
3285+ 0x00000000, /* var[7] */
3286+ 0x00000000, /* var[8] */
3287+ 0x00000000, /* var[9] */
3288+ 0x00000000, /* var[10] */
3289+ 0x00000000, /* var[11] */
3290+ 0x00000000, /* var[12] */
3291+ 0x00000000, /* var[13] */
3292+ 0x00000000, /* var[14] */
3293+ 0x00000000, /* var[15] */
3294+ 0x00000000, /* var[16] */
3295+ 0x00000000, /* var[17] */
3296+ 0x00000000, /* var[18] */
3297+ 0x00000000, /* var[19] */
3298+ 0x00000000, /* var[20] */
3299+ 0x00000000, /* var[21] */
3300+ 0x00000000, /* var[22] */
3301+ 0x00000000, /* var[23] */
3302+ 0xe0000000, /* inc[0] */
3303+ 0x20000000, /* inc[1] */
3304+ 0x2000ffff, /* inc[2] */
3305+ 0x00000000, /* inc[3] */
3306+ 0x00000000, /* inc[4] */
3307+ 0x00000000, /* inc[5] */
3308+ 0x00000000, /* inc[6] */
3309+ 0x00000000, /* inc[7] */
3310+};
3311+
3312+u32 MCD_varTab15[] = {
3313+/* Task 15 Variable Table */
3314+ 0x00000000, /* var[0] */
3315+ 0x00000000, /* var[1] */
3316+ 0x00000000, /* var[2] */
3317+ 0x00000000, /* var[3] */
3318+ 0x00000000, /* var[4] */
3319+ 0x00000000, /* var[5] */
3320+ 0x00000000, /* var[6] */
3321+ 0x00000000, /* var[7] */
3322+ 0x00000000, /* var[8] */
3323+ 0x00000000, /* var[9] */
3324+ 0x00000000, /* var[10] */
3325+ 0x00000000, /* var[11] */
3326+ 0x00000000, /* var[12] */
3327+ 0x00000000, /* var[13] */
3328+ 0x00000000, /* var[14] */
3329+ 0x00000000, /* var[15] */
3330+ 0x00000000, /* var[16] */
3331+ 0x00000000, /* var[17] */
3332+ 0x00000000, /* var[18] */
3333+ 0x00000000, /* var[19] */
3334+ 0x00000000, /* var[20] */
3335+ 0x00000000, /* var[21] */
3336+ 0x00000000, /* var[22] */
3337+ 0x00000000, /* var[23] */
3338+ 0xe0000000, /* inc[0] */
3339+ 0x20000000, /* inc[1] */
3340+ 0x2000ffff, /* inc[2] */
3341+ 0x00000000, /* inc[3] */
3342+ 0x00000000, /* inc[4] */
3343+ 0x00000000, /* inc[5] */
3344+ 0x00000000, /* inc[6] */
3345+ 0x00000000, /* inc[7] */
3346+};
3347+
3348+u32 MCD_funcDescTab0[] = {
3349+/* Task 0 Function Descriptor Table */
3350+ 0x00000000,
3351+ 0x00000000,
3352+ 0x00000000,
3353+ 0x00000000,
3354+ 0x00000000,
3355+ 0x00000000,
3356+ 0x00000000,
3357+ 0x00000000,
3358+ 0x00000000,
3359+ 0x00000000,
3360+ 0x00000000,
3361+ 0x00000000,
3362+ 0x00000000,
3363+ 0x00000000,
3364+ 0x00000000,
3365+ 0x00000000,
3366+ 0x00000000,
3367+ 0x00000000,
3368+ 0x00000000,
3369+ 0x00000000,
3370+ 0x00000000,
3371+ 0x00000000,
3372+ 0x00000000,
3373+ 0x00000000,
3374+ 0x00000000,
3375+ 0x00000000,
3376+ 0x00000000,
3377+ 0x00000000,
3378+ 0x00000000,
3379+ 0x00000000,
3380+ 0x00000000,
3381+ 0x00000000,
3382+ 0x00000000,
3383+ 0x00000000,
3384+ 0x00000000,
3385+ 0x00000000,
3386+ 0x00000000,
3387+ 0x00000000,
3388+ 0x00000000,
3389+ 0x00000000,
3390+ 0x00000000,
3391+ 0x00000000,
3392+ 0x00000000,
3393+ 0x00000000,
3394+ 0x00000000,
3395+ 0x00000000,
3396+ 0x00000000,
3397+ 0x00000000,
3398+ 0xa0045670, /* mainFunc(), EU# 3 */
3399+ 0xa0000000, /* rsduFunc(), EU# 3 */
3400+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3401+ 0x20000000, /* setCrcAccum(), EU# 3 */
3402+ 0x21800000, /* and(), EU# 3 */
3403+ 0x21e00000, /* or(), EU# 3 */
3404+ 0x20400000, /* add(), EU# 3 */
3405+ 0x20500000, /* sub(), EU# 3 */
3406+ 0x205a0000, /* andNot(), EU# 3 */
3407+ 0x20a00000, /* shiftR(), EU# 3 */
3408+ 0x202fa000, /* andReadyBit(), EU# 3 */
3409+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3410+ 0x202ea000, /* andWrapBit(), EU# 3 */
3411+ 0x202da000, /* andLastBit(), EU# 3 */
3412+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3413+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3414+};
3415+
3416+#ifdef MCD_INCLUDE_EU
3417+u32 MCD_funcDescTab1[] = {
3418+/* Task 1 Function Descriptor Table */
3419+ 0x00000000,
3420+ 0x00000000,
3421+ 0x00000000,
3422+ 0x00000000,
3423+ 0x00000000,
3424+ 0x00000000,
3425+ 0x00000000,
3426+ 0x00000000,
3427+ 0x00000000,
3428+ 0x00000000,
3429+ 0x00000000,
3430+ 0x00000000,
3431+ 0x00000000,
3432+ 0x00000000,
3433+ 0x00000000,
3434+ 0x00000000,
3435+ 0x00000000,
3436+ 0x00000000,
3437+ 0x00000000,
3438+ 0x00000000,
3439+ 0x00000000,
3440+ 0x00000000,
3441+ 0x00000000,
3442+ 0x00000000,
3443+ 0x00000000,
3444+ 0x00000000,
3445+ 0x00000000,
3446+ 0x00000000,
3447+ 0x00000000,
3448+ 0x00000000,
3449+ 0x00000000,
3450+ 0x00000000,
3451+ 0x00000000,
3452+ 0x00000000,
3453+ 0x00000000,
3454+ 0x00000000,
3455+ 0x00000000,
3456+ 0x00000000,
3457+ 0x00000000,
3458+ 0x00000000,
3459+ 0x00000000,
3460+ 0x00000000,
3461+ 0x00000000,
3462+ 0x00000000,
3463+ 0x00000000,
3464+ 0x00000000,
3465+ 0x00000000,
3466+ 0x00000000,
3467+ 0xa0045670, /* mainFunc(), EU# 3 */
3468+ 0xa0000000, /* rsduFunc(), EU# 3 */
3469+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3470+ 0x20000000, /* setCrcAccum(), EU# 3 */
3471+ 0x21800000, /* and(), EU# 3 */
3472+ 0x21e00000, /* or(), EU# 3 */
3473+ 0x20400000, /* add(), EU# 3 */
3474+ 0x20500000, /* sub(), EU# 3 */
3475+ 0x205a0000, /* andNot(), EU# 3 */
3476+ 0x20a00000, /* shiftR(), EU# 3 */
3477+ 0x202fa000, /* andReadyBit(), EU# 3 */
3478+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3479+ 0x202ea000, /* andWrapBit(), EU# 3 */
3480+ 0x202da000, /* andLastBit(), EU# 3 */
3481+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3482+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3483+};
3484+
3485+u32 MCD_funcDescTab2[] = {
3486+/* Task 2 Function Descriptor Table */
3487+ 0x00000000,
3488+ 0x00000000,
3489+ 0x00000000,
3490+ 0x00000000,
3491+ 0x00000000,
3492+ 0x00000000,
3493+ 0x00000000,
3494+ 0x00000000,
3495+ 0x00000000,
3496+ 0x00000000,
3497+ 0x00000000,
3498+ 0x00000000,
3499+ 0x00000000,
3500+ 0x00000000,
3501+ 0x00000000,
3502+ 0x00000000,
3503+ 0x00000000,
3504+ 0x00000000,
3505+ 0x00000000,
3506+ 0x00000000,
3507+ 0x00000000,
3508+ 0x00000000,
3509+ 0x00000000,
3510+ 0x00000000,
3511+ 0x00000000,
3512+ 0x00000000,
3513+ 0x00000000,
3514+ 0x00000000,
3515+ 0x00000000,
3516+ 0x00000000,
3517+ 0x00000000,
3518+ 0x00000000,
3519+ 0x00000000,
3520+ 0x00000000,
3521+ 0x00000000,
3522+ 0x00000000,
3523+ 0x00000000,
3524+ 0x00000000,
3525+ 0x00000000,
3526+ 0x00000000,
3527+ 0x00000000,
3528+ 0x00000000,
3529+ 0x00000000,
3530+ 0x00000000,
3531+ 0x00000000,
3532+ 0x00000000,
3533+ 0x00000000,
3534+ 0x00000000,
3535+ 0xa0045670, /* mainFunc(), EU# 3 */
3536+ 0xa0000000, /* rsduFunc(), EU# 3 */
3537+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3538+ 0x20000000, /* setCrcAccum(), EU# 3 */
3539+ 0x21800000, /* and(), EU# 3 */
3540+ 0x21e00000, /* or(), EU# 3 */
3541+ 0x20400000, /* add(), EU# 3 */
3542+ 0x20500000, /* sub(), EU# 3 */
3543+ 0x205a0000, /* andNot(), EU# 3 */
3544+ 0x20a00000, /* shiftR(), EU# 3 */
3545+ 0x202fa000, /* andReadyBit(), EU# 3 */
3546+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3547+ 0x202ea000, /* andWrapBit(), EU# 3 */
3548+ 0x202da000, /* andLastBit(), EU# 3 */
3549+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3550+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3551+};
3552+
3553+u32 MCD_funcDescTab3[] = {
3554+/* Task 3 Function Descriptor Table */
3555+ 0x00000000,
3556+ 0x00000000,
3557+ 0x00000000,
3558+ 0x00000000,
3559+ 0x00000000,
3560+ 0x00000000,
3561+ 0x00000000,
3562+ 0x00000000,
3563+ 0x00000000,
3564+ 0x00000000,
3565+ 0x00000000,
3566+ 0x00000000,
3567+ 0x00000000,
3568+ 0x00000000,
3569+ 0x00000000,
3570+ 0x00000000,
3571+ 0x00000000,
3572+ 0x00000000,
3573+ 0x00000000,
3574+ 0x00000000,
3575+ 0x00000000,
3576+ 0x00000000,
3577+ 0x00000000,
3578+ 0x00000000,
3579+ 0x00000000,
3580+ 0x00000000,
3581+ 0x00000000,
3582+ 0x00000000,
3583+ 0x00000000,
3584+ 0x00000000,
3585+ 0x00000000,
3586+ 0x00000000,
3587+ 0x00000000,
3588+ 0x00000000,
3589+ 0x00000000,
3590+ 0x00000000,
3591+ 0x00000000,
3592+ 0x00000000,
3593+ 0x00000000,
3594+ 0x00000000,
3595+ 0x00000000,
3596+ 0x00000000,
3597+ 0x00000000,
3598+ 0x00000000,
3599+ 0x00000000,
3600+ 0x00000000,
3601+ 0x00000000,
3602+ 0x00000000,
3603+ 0xa0045670, /* mainFunc(), EU# 3 */
3604+ 0xa0000000, /* rsduFunc(), EU# 3 */
3605+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3606+ 0x20000000, /* setCrcAccum(), EU# 3 */
3607+ 0x21800000, /* and(), EU# 3 */
3608+ 0x21e00000, /* or(), EU# 3 */
3609+ 0x20400000, /* add(), EU# 3 */
3610+ 0x20500000, /* sub(), EU# 3 */
3611+ 0x205a0000, /* andNot(), EU# 3 */
3612+ 0x20a00000, /* shiftR(), EU# 3 */
3613+ 0x202fa000, /* andReadyBit(), EU# 3 */
3614+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3615+ 0x202ea000, /* andWrapBit(), EU# 3 */
3616+ 0x202da000, /* andLastBit(), EU# 3 */
3617+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3618+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3619+};
3620+
3621+u32 MCD_funcDescTab4[] = {
3622+/* Task 4 Function Descriptor Table */
3623+ 0x00000000,
3624+ 0x00000000,
3625+ 0x00000000,
3626+ 0x00000000,
3627+ 0x00000000,
3628+ 0x00000000,
3629+ 0x00000000,
3630+ 0x00000000,
3631+ 0x00000000,
3632+ 0x00000000,
3633+ 0x00000000,
3634+ 0x00000000,
3635+ 0x00000000,
3636+ 0x00000000,
3637+ 0x00000000,
3638+ 0x00000000,
3639+ 0x00000000,
3640+ 0x00000000,
3641+ 0x00000000,
3642+ 0x00000000,
3643+ 0x00000000,
3644+ 0x00000000,
3645+ 0x00000000,
3646+ 0x00000000,
3647+ 0x00000000,
3648+ 0x00000000,
3649+ 0x00000000,
3650+ 0x00000000,
3651+ 0x00000000,
3652+ 0x00000000,
3653+ 0x00000000,
3654+ 0x00000000,
3655+ 0x00000000,
3656+ 0x00000000,
3657+ 0x00000000,
3658+ 0x00000000,
3659+ 0x00000000,
3660+ 0x00000000,
3661+ 0x00000000,
3662+ 0x00000000,
3663+ 0x00000000,
3664+ 0x00000000,
3665+ 0x00000000,
3666+ 0x00000000,
3667+ 0x00000000,
3668+ 0x00000000,
3669+ 0x00000000,
3670+ 0x00000000,
3671+ 0xa0045670, /* mainFunc(), EU# 3 */
3672+ 0xa0000000, /* rsduFunc(), EU# 3 */
3673+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3674+ 0x20000000, /* setCrcAccum(), EU# 3 */
3675+ 0x21800000, /* and(), EU# 3 */
3676+ 0x21e00000, /* or(), EU# 3 */
3677+ 0x20400000, /* add(), EU# 3 */
3678+ 0x20500000, /* sub(), EU# 3 */
3679+ 0x205a0000, /* andNot(), EU# 3 */
3680+ 0x20a00000, /* shiftR(), EU# 3 */
3681+ 0x202fa000, /* andReadyBit(), EU# 3 */
3682+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3683+ 0x202ea000, /* andWrapBit(), EU# 3 */
3684+ 0x202da000, /* andLastBit(), EU# 3 */
3685+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3686+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3687+};
3688+
3689+u32 MCD_funcDescTab5[] = {
3690+/* Task 5 Function Descriptor Table */
3691+ 0x00000000,
3692+ 0x00000000,
3693+ 0x00000000,
3694+ 0x00000000,
3695+ 0x00000000,
3696+ 0x00000000,
3697+ 0x00000000,
3698+ 0x00000000,
3699+ 0x00000000,
3700+ 0x00000000,
3701+ 0x00000000,
3702+ 0x00000000,
3703+ 0x00000000,
3704+ 0x00000000,
3705+ 0x00000000,
3706+ 0x00000000,
3707+ 0x00000000,
3708+ 0x00000000,
3709+ 0x00000000,
3710+ 0x00000000,
3711+ 0x00000000,
3712+ 0x00000000,
3713+ 0x00000000,
3714+ 0x00000000,
3715+ 0x00000000,
3716+ 0x00000000,
3717+ 0x00000000,
3718+ 0x00000000,
3719+ 0x00000000,
3720+ 0x00000000,
3721+ 0x00000000,
3722+ 0x00000000,
3723+ 0x00000000,
3724+ 0x00000000,
3725+ 0x00000000,
3726+ 0x00000000,
3727+ 0x00000000,
3728+ 0x00000000,
3729+ 0x00000000,
3730+ 0x00000000,
3731+ 0x00000000,
3732+ 0x00000000,
3733+ 0x00000000,
3734+ 0x00000000,
3735+ 0x00000000,
3736+ 0x00000000,
3737+ 0x00000000,
3738+ 0x00000000,
3739+ 0xa0045670, /* mainFunc(), EU# 3 */
3740+ 0xa0000000, /* rsduFunc(), EU# 3 */
3741+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3742+ 0x20000000, /* setCrcAccum(), EU# 3 */
3743+ 0x21800000, /* and(), EU# 3 */
3744+ 0x21e00000, /* or(), EU# 3 */
3745+ 0x20400000, /* add(), EU# 3 */
3746+ 0x20500000, /* sub(), EU# 3 */
3747+ 0x205a0000, /* andNot(), EU# 3 */
3748+ 0x20a00000, /* shiftR(), EU# 3 */
3749+ 0x202fa000, /* andReadyBit(), EU# 3 */
3750+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3751+ 0x202ea000, /* andWrapBit(), EU# 3 */
3752+ 0x202da000, /* andLastBit(), EU# 3 */
3753+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3754+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3755+};
3756+
3757+u32 MCD_funcDescTab6[] = {
3758+/* Task 6 Function Descriptor Table */
3759+ 0x00000000,
3760+ 0x00000000,
3761+ 0x00000000,
3762+ 0x00000000,
3763+ 0x00000000,
3764+ 0x00000000,
3765+ 0x00000000,
3766+ 0x00000000,
3767+ 0x00000000,
3768+ 0x00000000,
3769+ 0x00000000,
3770+ 0x00000000,
3771+ 0x00000000,
3772+ 0x00000000,
3773+ 0x00000000,
3774+ 0x00000000,
3775+ 0x00000000,
3776+ 0x00000000,
3777+ 0x00000000,
3778+ 0x00000000,
3779+ 0x00000000,
3780+ 0x00000000,
3781+ 0x00000000,
3782+ 0x00000000,
3783+ 0x00000000,
3784+ 0x00000000,
3785+ 0x00000000,
3786+ 0x00000000,
3787+ 0x00000000,
3788+ 0x00000000,
3789+ 0x00000000,
3790+ 0x00000000,
3791+ 0x00000000,
3792+ 0x00000000,
3793+ 0x00000000,
3794+ 0x00000000,
3795+ 0x00000000,
3796+ 0x00000000,
3797+ 0x00000000,
3798+ 0x00000000,
3799+ 0x00000000,
3800+ 0x00000000,
3801+ 0x00000000,
3802+ 0x00000000,
3803+ 0x00000000,
3804+ 0x00000000,
3805+ 0x00000000,
3806+ 0x00000000,
3807+ 0xa0045670, /* mainFunc(), EU# 3 */
3808+ 0xa0000000, /* rsduFunc(), EU# 3 */
3809+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3810+ 0x20000000, /* setCrcAccum(), EU# 3 */
3811+ 0x21800000, /* and(), EU# 3 */
3812+ 0x21e00000, /* or(), EU# 3 */
3813+ 0x20400000, /* add(), EU# 3 */
3814+ 0x20500000, /* sub(), EU# 3 */
3815+ 0x205a0000, /* andNot(), EU# 3 */
3816+ 0x20a00000, /* shiftR(), EU# 3 */
3817+ 0x202fa000, /* andReadyBit(), EU# 3 */
3818+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3819+ 0x202ea000, /* andWrapBit(), EU# 3 */
3820+ 0x202da000, /* andLastBit(), EU# 3 */
3821+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3822+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3823+};
3824+
3825+u32 MCD_funcDescTab7[] = {
3826+/* Task 7 Function Descriptor Table */
3827+ 0x00000000,
3828+ 0x00000000,
3829+ 0x00000000,
3830+ 0x00000000,
3831+ 0x00000000,
3832+ 0x00000000,
3833+ 0x00000000,
3834+ 0x00000000,
3835+ 0x00000000,
3836+ 0x00000000,
3837+ 0x00000000,
3838+ 0x00000000,
3839+ 0x00000000,
3840+ 0x00000000,
3841+ 0x00000000,
3842+ 0x00000000,
3843+ 0x00000000,
3844+ 0x00000000,
3845+ 0x00000000,
3846+ 0x00000000,
3847+ 0x00000000,
3848+ 0x00000000,
3849+ 0x00000000,
3850+ 0x00000000,
3851+ 0x00000000,
3852+ 0x00000000,
3853+ 0x00000000,
3854+ 0x00000000,
3855+ 0x00000000,
3856+ 0x00000000,
3857+ 0x00000000,
3858+ 0x00000000,
3859+ 0x00000000,
3860+ 0x00000000,
3861+ 0x00000000,
3862+ 0x00000000,
3863+ 0x00000000,
3864+ 0x00000000,
3865+ 0x00000000,
3866+ 0x00000000,
3867+ 0x00000000,
3868+ 0x00000000,
3869+ 0x00000000,
3870+ 0x00000000,
3871+ 0x00000000,
3872+ 0x00000000,
3873+ 0x00000000,
3874+ 0x00000000,
3875+ 0xa0045670, /* mainFunc(), EU# 3 */
3876+ 0xa0000000, /* rsduFunc(), EU# 3 */
3877+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3878+ 0x20000000, /* setCrcAccum(), EU# 3 */
3879+ 0x21800000, /* and(), EU# 3 */
3880+ 0x21e00000, /* or(), EU# 3 */
3881+ 0x20400000, /* add(), EU# 3 */
3882+ 0x20500000, /* sub(), EU# 3 */
3883+ 0x205a0000, /* andNot(), EU# 3 */
3884+ 0x20a00000, /* shiftR(), EU# 3 */
3885+ 0x202fa000, /* andReadyBit(), EU# 3 */
3886+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3887+ 0x202ea000, /* andWrapBit(), EU# 3 */
3888+ 0x202da000, /* andLastBit(), EU# 3 */
3889+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3890+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3891+};
3892+
3893+u32 MCD_funcDescTab8[] = {
3894+/* Task 8 Function Descriptor Table */
3895+ 0x00000000,
3896+ 0x00000000,
3897+ 0x00000000,
3898+ 0x00000000,
3899+ 0x00000000,
3900+ 0x00000000,
3901+ 0x00000000,
3902+ 0x00000000,
3903+ 0x00000000,
3904+ 0x00000000,
3905+ 0x00000000,
3906+ 0x00000000,
3907+ 0x00000000,
3908+ 0x00000000,
3909+ 0x00000000,
3910+ 0x00000000,
3911+ 0x00000000,
3912+ 0x00000000,
3913+ 0x00000000,
3914+ 0x00000000,
3915+ 0x00000000,
3916+ 0x00000000,
3917+ 0x00000000,
3918+ 0x00000000,
3919+ 0x00000000,
3920+ 0x00000000,
3921+ 0x00000000,
3922+ 0x00000000,
3923+ 0x00000000,
3924+ 0x00000000,
3925+ 0x00000000,
3926+ 0x00000000,
3927+ 0x00000000,
3928+ 0x00000000,
3929+ 0x00000000,
3930+ 0x00000000,
3931+ 0x00000000,
3932+ 0x00000000,
3933+ 0x00000000,
3934+ 0x00000000,
3935+ 0x00000000,
3936+ 0x00000000,
3937+ 0x00000000,
3938+ 0x00000000,
3939+ 0x00000000,
3940+ 0x00000000,
3941+ 0x00000000,
3942+ 0x00000000,
3943+ 0xa0045670, /* mainFunc(), EU# 3 */
3944+ 0xa0000000, /* rsduFunc(), EU# 3 */
3945+ 0xa0000000, /* crcAccumVal(), EU# 3 */
3946+ 0x20000000, /* setCrcAccum(), EU# 3 */
3947+ 0x21800000, /* and(), EU# 3 */
3948+ 0x21e00000, /* or(), EU# 3 */
3949+ 0x20400000, /* add(), EU# 3 */
3950+ 0x20500000, /* sub(), EU# 3 */
3951+ 0x205a0000, /* andNot(), EU# 3 */
3952+ 0x20a00000, /* shiftR(), EU# 3 */
3953+ 0x202fa000, /* andReadyBit(), EU# 3 */
3954+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
3955+ 0x202ea000, /* andWrapBit(), EU# 3 */
3956+ 0x202da000, /* andLastBit(), EU# 3 */
3957+ 0x202e2000, /* andInterruptBit(), EU# 3 */
3958+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
3959+};
3960+
3961+u32 MCD_funcDescTab9[] = {
3962+/* Task 9 Function Descriptor Table */
3963+ 0x00000000,
3964+ 0x00000000,
3965+ 0x00000000,
3966+ 0x00000000,
3967+ 0x00000000,
3968+ 0x00000000,
3969+ 0x00000000,
3970+ 0x00000000,
3971+ 0x00000000,
3972+ 0x00000000,
3973+ 0x00000000,
3974+ 0x00000000,
3975+ 0x00000000,
3976+ 0x00000000,
3977+ 0x00000000,
3978+ 0x00000000,
3979+ 0x00000000,
3980+ 0x00000000,
3981+ 0x00000000,
3982+ 0x00000000,
3983+ 0x00000000,
3984+ 0x00000000,
3985+ 0x00000000,
3986+ 0x00000000,
3987+ 0x00000000,
3988+ 0x00000000,
3989+ 0x00000000,
3990+ 0x00000000,
3991+ 0x00000000,
3992+ 0x00000000,
3993+ 0x00000000,
3994+ 0x00000000,
3995+ 0x00000000,
3996+ 0x00000000,
3997+ 0x00000000,
3998+ 0x00000000,
3999+ 0x00000000,
4000+ 0x00000000,
4001+ 0x00000000,
4002+ 0x00000000,
4003+ 0x00000000,
4004+ 0x00000000,
4005+ 0x00000000,
4006+ 0x00000000,
4007+ 0x00000000,
4008+ 0x00000000,
4009+ 0x00000000,
4010+ 0x00000000,
4011+ 0xa0045670, /* mainFunc(), EU# 3 */
4012+ 0xa0000000, /* rsduFunc(), EU# 3 */
4013+ 0xa0000000, /* crcAccumVal(), EU# 3 */
4014+ 0x20000000, /* setCrcAccum(), EU# 3 */
4015+ 0x21800000, /* and(), EU# 3 */
4016+ 0x21e00000, /* or(), EU# 3 */
4017+ 0x20400000, /* add(), EU# 3 */
4018+ 0x20500000, /* sub(), EU# 3 */
4019+ 0x205a0000, /* andNot(), EU# 3 */
4020+ 0x20a00000, /* shiftR(), EU# 3 */
4021+ 0x202fa000, /* andReadyBit(), EU# 3 */
4022+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
4023+ 0x202ea000, /* andWrapBit(), EU# 3 */
4024+ 0x202da000, /* andLastBit(), EU# 3 */
4025+ 0x202e2000, /* andInterruptBit(), EU# 3 */
4026+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
4027+};
4028+
4029+u32 MCD_funcDescTab10[] = {
4030+/* Task 10 Function Descriptor Table */
4031+ 0x00000000,
4032+ 0x00000000,
4033+ 0x00000000,
4034+ 0x00000000,
4035+ 0x00000000,
4036+ 0x00000000,
4037+ 0x00000000,
4038+ 0x00000000,
4039+ 0x00000000,
4040+ 0x00000000,
4041+ 0x00000000,
4042+ 0x00000000,
4043+ 0x00000000,
4044+ 0x00000000,
4045+ 0x00000000,
4046+ 0x00000000,
4047+ 0x00000000,
4048+ 0x00000000,
4049+ 0x00000000,
4050+ 0x00000000,
4051+ 0x00000000,
4052+ 0x00000000,
4053+ 0x00000000,
4054+ 0x00000000,
4055+ 0x00000000,
4056+ 0x00000000,
4057+ 0x00000000,
4058+ 0x00000000,
4059+ 0x00000000,
4060+ 0x00000000,
4061+ 0x00000000,
4062+ 0x00000000,
4063+ 0x00000000,
4064+ 0x00000000,
4065+ 0x00000000,
4066+ 0x00000000,
4067+ 0x00000000,
4068+ 0x00000000,
4069+ 0x00000000,
4070+ 0x00000000,
4071+ 0x00000000,
4072+ 0x00000000,
4073+ 0x00000000,
4074+ 0x00000000,
4075+ 0x00000000,
4076+ 0x00000000,
4077+ 0x00000000,
4078+ 0x00000000,
4079+ 0xa0045670, /* mainFunc(), EU# 3 */
4080+ 0xa0000000, /* rsduFunc(), EU# 3 */
4081+ 0xa0000000, /* crcAccumVal(), EU# 3 */
4082+ 0x20000000, /* setCrcAccum(), EU# 3 */
4083+ 0x21800000, /* and(), EU# 3 */
4084+ 0x21e00000, /* or(), EU# 3 */
4085+ 0x20400000, /* add(), EU# 3 */
4086+ 0x20500000, /* sub(), EU# 3 */
4087+ 0x205a0000, /* andNot(), EU# 3 */
4088+ 0x20a00000, /* shiftR(), EU# 3 */
4089+ 0x202fa000, /* andReadyBit(), EU# 3 */
4090+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
4091+ 0x202ea000, /* andWrapBit(), EU# 3 */
4092+ 0x202da000, /* andLastBit(), EU# 3 */
4093+ 0x202e2000, /* andInterruptBit(), EU# 3 */
4094+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
4095+};
4096+
4097+u32 MCD_funcDescTab11[] = {
4098+/* Task 11 Function Descriptor Table */
4099+ 0x00000000,
4100+ 0x00000000,
4101+ 0x00000000,
4102+ 0x00000000,
4103+ 0x00000000,
4104+ 0x00000000,
4105+ 0x00000000,
4106+ 0x00000000,
4107+ 0x00000000,
4108+ 0x00000000,
4109+ 0x00000000,
4110+ 0x00000000,
4111+ 0x00000000,
4112+ 0x00000000,
4113+ 0x00000000,
4114+ 0x00000000,
4115+ 0x00000000,
4116+ 0x00000000,
4117+ 0x00000000,
4118+ 0x00000000,
4119+ 0x00000000,
4120+ 0x00000000,
4121+ 0x00000000,
4122+ 0x00000000,
4123+ 0x00000000,
4124+ 0x00000000,
4125+ 0x00000000,
4126+ 0x00000000,
4127+ 0x00000000,
4128+ 0x00000000,
4129+ 0x00000000,
4130+ 0x00000000,
4131+ 0x00000000,
4132+ 0x00000000,
4133+ 0x00000000,
4134+ 0x00000000,
4135+ 0x00000000,
4136+ 0x00000000,
4137+ 0x00000000,
4138+ 0x00000000,
4139+ 0x00000000,
4140+ 0x00000000,
4141+ 0x00000000,
4142+ 0x00000000,
4143+ 0x00000000,
4144+ 0x00000000,
4145+ 0x00000000,
4146+ 0x00000000,
4147+ 0xa0045670, /* mainFunc(), EU# 3 */
4148+ 0xa0000000, /* rsduFunc(), EU# 3 */
4149+ 0xa0000000, /* crcAccumVal(), EU# 3 */
4150+ 0x20000000, /* setCrcAccum(), EU# 3 */
4151+ 0x21800000, /* and(), EU# 3 */
4152+ 0x21e00000, /* or(), EU# 3 */
4153+ 0x20400000, /* add(), EU# 3 */
4154+ 0x20500000, /* sub(), EU# 3 */
4155+ 0x205a0000, /* andNot(), EU# 3 */
4156+ 0x20a00000, /* shiftR(), EU# 3 */
4157+ 0x202fa000, /* andReadyBit(), EU# 3 */
4158+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
4159+ 0x202ea000, /* andWrapBit(), EU# 3 */
4160+ 0x202da000, /* andLastBit(), EU# 3 */
4161+ 0x202e2000, /* andInterruptBit(), EU# 3 */
4162+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
4163+};
4164+
4165+u32 MCD_funcDescTab12[] = {
4166+/* Task 12 Function Descriptor Table */
4167+ 0x00000000,
4168+ 0x00000000,
4169+ 0x00000000,
4170+ 0x00000000,
4171+ 0x00000000,
4172+ 0x00000000,
4173+ 0x00000000,
4174+ 0x00000000,
4175+ 0x00000000,
4176+ 0x00000000,
4177+ 0x00000000,
4178+ 0x00000000,
4179+ 0x00000000,
4180+ 0x00000000,
4181+ 0x00000000,
4182+ 0x00000000,
4183+ 0x00000000,
4184+ 0x00000000,
4185+ 0x00000000,
4186+ 0x00000000,
4187+ 0x00000000,
4188+ 0x00000000,
4189+ 0x00000000,
4190+ 0x00000000,
4191+ 0x00000000,
4192+ 0x00000000,
4193+ 0x00000000,
4194+ 0x00000000,
4195+ 0x00000000,
4196+ 0x00000000,
4197+ 0x00000000,
4198+ 0x00000000,
4199+ 0x00000000,
4200+ 0x00000000,
4201+ 0x00000000,
4202+ 0x00000000,
4203+ 0x00000000,
4204+ 0x00000000,
4205+ 0x00000000,
4206+ 0x00000000,
4207+ 0x00000000,
4208+ 0x00000000,
4209+ 0x00000000,
4210+ 0x00000000,
4211+ 0x00000000,
4212+ 0x00000000,
4213+ 0x00000000,
4214+ 0x00000000,
4215+ 0xa0045670, /* mainFunc(), EU# 3 */
4216+ 0xa0000000, /* rsduFunc(), EU# 3 */
4217+ 0xa0000000, /* crcAccumVal(), EU# 3 */
4218+ 0x20000000, /* setCrcAccum(), EU# 3 */
4219+ 0x21800000, /* and(), EU# 3 */
4220+ 0x21e00000, /* or(), EU# 3 */
4221+ 0x20400000, /* add(), EU# 3 */
4222+ 0x20500000, /* sub(), EU# 3 */
4223+ 0x205a0000, /* andNot(), EU# 3 */
4224+ 0x20a00000, /* shiftR(), EU# 3 */
4225+ 0x202fa000, /* andReadyBit(), EU# 3 */
4226+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
4227+ 0x202ea000, /* andWrapBit(), EU# 3 */
4228+ 0x202da000, /* andLastBit(), EU# 3 */
4229+ 0x202e2000, /* andInterruptBit(), EU# 3 */
4230+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
4231+};
4232+
4233+u32 MCD_funcDescTab13[] = {
4234+/* Task 13 Function Descriptor Table */
4235+ 0x00000000,
4236+ 0x00000000,
4237+ 0x00000000,
4238+ 0x00000000,
4239+ 0x00000000,
4240+ 0x00000000,
4241+ 0x00000000,
4242+ 0x00000000,
4243+ 0x00000000,
4244+ 0x00000000,
4245+ 0x00000000,
4246+ 0x00000000,
4247+ 0x00000000,
4248+ 0x00000000,
4249+ 0x00000000,
4250+ 0x00000000,
4251+ 0x00000000,
4252+ 0x00000000,
4253+ 0x00000000,
4254+ 0x00000000,
4255+ 0x00000000,
4256+ 0x00000000,
4257+ 0x00000000,
4258+ 0x00000000,
4259+ 0x00000000,
4260+ 0x00000000,
4261+ 0x00000000,
4262+ 0x00000000,
4263+ 0x00000000,
4264+ 0x00000000,
4265+ 0x00000000,
4266+ 0x00000000,
4267+ 0x00000000,
4268+ 0x00000000,
4269+ 0x00000000,
4270+ 0x00000000,
4271+ 0x00000000,
4272+ 0x00000000,
4273+ 0x00000000,
4274+ 0x00000000,
4275+ 0x00000000,
4276+ 0x00000000,
4277+ 0x00000000,
4278+ 0x00000000,
4279+ 0x00000000,
4280+ 0x00000000,
4281+ 0x00000000,
4282+ 0x00000000,
4283+ 0xa0045670, /* mainFunc(), EU# 3 */
4284+ 0xa0000000, /* rsduFunc(), EU# 3 */
4285+ 0xa0000000, /* crcAccumVal(), EU# 3 */
4286+ 0x20000000, /* setCrcAccum(), EU# 3 */
4287+ 0x21800000, /* and(), EU# 3 */
4288+ 0x21e00000, /* or(), EU# 3 */
4289+ 0x20400000, /* add(), EU# 3 */
4290+ 0x20500000, /* sub(), EU# 3 */
4291+ 0x205a0000, /* andNot(), EU# 3 */
4292+ 0x20a00000, /* shiftR(), EU# 3 */
4293+ 0x202fa000, /* andReadyBit(), EU# 3 */
4294+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
4295+ 0x202ea000, /* andWrapBit(), EU# 3 */
4296+ 0x202da000, /* andLastBit(), EU# 3 */
4297+ 0x202e2000, /* andInterruptBit(), EU# 3 */
4298+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
4299+};
4300+
4301+u32 MCD_funcDescTab14[] = {
4302+/* Task 14 Function Descriptor Table */
4303+ 0x00000000,
4304+ 0x00000000,
4305+ 0x00000000,
4306+ 0x00000000,
4307+ 0x00000000,
4308+ 0x00000000,
4309+ 0x00000000,
4310+ 0x00000000,
4311+ 0x00000000,
4312+ 0x00000000,
4313+ 0x00000000,
4314+ 0x00000000,
4315+ 0x00000000,
4316+ 0x00000000,
4317+ 0x00000000,
4318+ 0x00000000,
4319+ 0x00000000,
4320+ 0x00000000,
4321+ 0x00000000,
4322+ 0x00000000,
4323+ 0x00000000,
4324+ 0x00000000,
4325+ 0x00000000,
4326+ 0x00000000,
4327+ 0x00000000,
4328+ 0x00000000,
4329+ 0x00000000,
4330+ 0x00000000,
4331+ 0x00000000,
4332+ 0x00000000,
4333+ 0x00000000,
4334+ 0x00000000,
4335+ 0x00000000,
4336+ 0x00000000,
4337+ 0x00000000,
4338+ 0x00000000,
4339+ 0x00000000,
4340+ 0x00000000,
4341+ 0x00000000,
4342+ 0x00000000,
4343+ 0x00000000,
4344+ 0x00000000,
4345+ 0x00000000,
4346+ 0x00000000,
4347+ 0x00000000,
4348+ 0x00000000,
4349+ 0x00000000,
4350+ 0x00000000,
4351+ 0xa0045670, /* mainFunc(), EU# 3 */
4352+ 0xa0000000, /* rsduFunc(), EU# 3 */
4353+ 0xa0000000, /* crcAccumVal(), EU# 3 */
4354+ 0x20000000, /* setCrcAccum(), EU# 3 */
4355+ 0x21800000, /* and(), EU# 3 */
4356+ 0x21e00000, /* or(), EU# 3 */
4357+ 0x20400000, /* add(), EU# 3 */
4358+ 0x20500000, /* sub(), EU# 3 */
4359+ 0x205a0000, /* andNot(), EU# 3 */
4360+ 0x20a00000, /* shiftR(), EU# 3 */
4361+ 0x202fa000, /* andReadyBit(), EU# 3 */
4362+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
4363+ 0x202ea000, /* andWrapBit(), EU# 3 */
4364+ 0x202da000, /* andLastBit(), EU# 3 */
4365+ 0x202e2000, /* andInterruptBit(), EU# 3 */
4366+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
4367+};
4368+
4369+u32 MCD_funcDescTab15[] = { /* Task 15 Function Descriptor Table */
4370+ 0x00000000,
4371+ 0x00000000,
4372+ 0x00000000,
4373+ 0x00000000,
4374+ 0x00000000,
4375+ 0x00000000,
4376+ 0x00000000,
4377+ 0x00000000,
4378+ 0x00000000,
4379+ 0x00000000,
4380+ 0x00000000,
4381+ 0x00000000,
4382+ 0x00000000,
4383+ 0x00000000,
4384+ 0x00000000,
4385+ 0x00000000,
4386+ 0x00000000,
4387+ 0x00000000,
4388+ 0x00000000,
4389+ 0x00000000,
4390+ 0x00000000,
4391+ 0x00000000,
4392+ 0x00000000,
4393+ 0x00000000,
4394+ 0x00000000,
4395+ 0x00000000,
4396+ 0x00000000,
4397+ 0x00000000,
4398+ 0x00000000,
4399+ 0x00000000,
4400+ 0x00000000,
4401+ 0x00000000,
4402+ 0x00000000,
4403+ 0x00000000,
4404+ 0x00000000,
4405+ 0x00000000,
4406+ 0x00000000,
4407+ 0x00000000,
4408+ 0x00000000,
4409+ 0x00000000,
4410+ 0x00000000,
4411+ 0x00000000,
4412+ 0x00000000,
4413+ 0x00000000,
4414+ 0x00000000,
4415+ 0x00000000,
4416+ 0x00000000,
4417+ 0x00000000,
4418+ 0xa0045670, /* mainFunc(), EU# 3 */
4419+ 0xa0000000, /* rsduFunc(), EU# 3 */
4420+ 0xa0000000, /* crcAccumVal(), EU# 3 */
4421+ 0x20000000, /* setCrcAccum(), EU# 3 */
4422+ 0x21800000, /* and(), EU# 3 */
4423+ 0x21e00000, /* or(), EU# 3 */
4424+ 0x20400000, /* add(), EU# 3 */
4425+ 0x20500000, /* sub(), EU# 3 */
4426+ 0x205a0000, /* andNot(), EU# 3 */
4427+ 0x20a00000, /* shiftR(), EU# 3 */
4428+ 0x202fa000, /* andReadyBit(), EU# 3 */
4429+ 0x202f9000, /* andNotReadyBit(), EU# 3 */
4430+ 0x202ea000, /* andWrapBit(), EU# 3 */
4431+ 0x202da000, /* andLastBit(), EU# 3 */
4432+ 0x202e2000, /* andInterruptBit(), EU# 3 */
4433+ 0x202f2000, /* andCrcRestartBit(), EU# 3 */
4434+};
4435+#endif /*MCD_INCLUDE_EU*/
4436+
4437+u32 MCD_contextSave0[128]; /* Task 0 context save space */
4438+u32 MCD_contextSave1[128]; /* Task 1 context save space */
4439+u32 MCD_contextSave2[128]; /* Task 2 context save space */
4440+u32 MCD_contextSave3[128]; /* Task 3 context save space */
4441+u32 MCD_contextSave4[128]; /* Task 4 context save space */
4442+u32 MCD_contextSave5[128]; /* Task 5 context save space */
4443+u32 MCD_contextSave6[128]; /* Task 6 context save space */
4444+u32 MCD_contextSave7[128]; /* Task 7 context save space */
4445+u32 MCD_contextSave8[128]; /* Task 8 context save space */
4446+u32 MCD_contextSave9[128]; /* Task 9 context save space */
4447+u32 MCD_contextSave10[128]; /* Task 10 context save space */
4448+u32 MCD_contextSave11[128]; /* Task 11 context save space */
4449+u32 MCD_contextSave12[128]; /* Task 12 context save space */
4450+u32 MCD_contextSave13[128]; /* Task 13 context save space */
4451+u32 MCD_contextSave14[128]; /* Task 14 context save space */
4452+u32 MCD_contextSave15[128]; /* Task 15 context save space */
4453+
4454+u32 MCD_ChainNoEu_TDT[];
4455+u32 MCD_SingleNoEu_TDT[];
4456+#ifdef MCD_INCLUDE_EU
4457+u32 MCD_ChainEu_TDT[];
4458+u32 MCD_SingleEu_TDT[];
4459+#endif
4460+u32 MCD_ENetRcv_TDT[];
4461+u32 MCD_ENetXmit_TDT[];
4462+
4463+u32 MCD_modelTaskTableSrc[] = {
4464+ (u32)MCD_ChainNoEu_TDT,
4465+ (u32)&((u8 *)MCD_ChainNoEu_TDT)[0x0000016c],
4466+ 0x00000000,
4467+ 0x00000000,
4468+ 0x00000000,
4469+ 0x00000000,
4470+ 0x00000000,
4471+ 0x00000000,
4472+ (u32)MCD_SingleNoEu_TDT,
4473+ (u32)&((u8 *)MCD_SingleNoEu_TDT)[0x000000d4],
4474+ 0x00000000,
4475+ 0x00000000,
4476+ 0x00000000,
4477+ 0x00000000,
4478+ 0x00000000,
4479+ 0x00000000,
4480+#ifdef MCD_INCLUDE_EU
4481+ (u32)MCD_ChainEu_TDT,
4482+ (u32)&((u8 *)MCD_ChainEu_TDT)[0x000001b4],
4483+ 0x00000000,
4484+ 0x00000000,
4485+ 0x00000000,
4486+ 0x00000000,
4487+ 0x00000000,
4488+ 0x00000000,
4489+ (u32)MCD_SingleEu_TDT,
4490+ (u32)&((u8 *)MCD_SingleEu_TDT)[0x00000124],
4491+ 0x00000000,
4492+ 0x00000000,
4493+ 0x00000000,
4494+ 0x00000000,
4495+ 0x00000000,
4496+ 0x00000000,
4497+#endif
4498+ (u32)MCD_ENetRcv_TDT,
4499+ (u32)&((u8 *)MCD_ENetRcv_TDT)[0x000000a4],
4500+ 0x00000000,
4501+ 0x00000000,
4502+ 0x00000000,
4503+ 0x00000000,
4504+ 0x00000000,
4505+ 0x00000000,
4506+ (u32)MCD_ENetXmit_TDT,
4507+ (u32)&((u8 *)MCD_ENetXmit_TDT)[0x000000d0],
4508+ 0x00000000,
4509+ 0x00000000,
4510+ 0x00000000,
4511+ 0x00000000,
4512+ 0x00000000,
4513+ 0x00000000,
4514+};
4515+u32 MCD_ChainNoEu_TDT[] = {
4516+ 0x80004000,
4517+ 0x8118801b,
4518+ 0xb8c60018,
4519+ 0x10002b10,
4520+ 0x7000000d,
4521+ 0x018cf89f,
4522+ 0x6000000a,
4523+ 0x080cf89f,
4524+ 0x000001f8,
4525+ 0x98180364,
4526+ 0x8118801b,
4527+ 0xf8c6001a,
4528+ 0xb8c6601b,
4529+ 0x10002710,
4530+ 0x00000f18,
4531+ 0xb8c6001d,
4532+ 0x10001310,
4533+ 0x60000007,
4534+ 0x014cf88b,
4535+ 0x98c6001c,
4536+ 0x00000710,
4537+ 0x98c70018,
4538+ 0x10001f10,
4539+ 0x0000c818,
4540+ 0x000001f8, /* 0060(:0): NOP */
4541+ 0xc1476018,
4542+ 0xc003231d,
4543+ 0x811a601b,
4544+ 0xc1862102,
4545+ 0x849be009,
4546+ 0x03fed7b8,
4547+ 0xda9b001b,
4548+ 0x9b9be01b,
4549+ 0x1000cb20,
4550+ 0x70000006,
4551+ 0x088cf88f,
4552+ 0x1000cb28,
4553+ 0x70000006,
4554+ 0x088cf88f,
4555+ 0x1000cb30,
4556+ 0x70000006,
4557+ 0x088cf88f,
4558+ 0x1000cb38,
4559+ 0x0000c728,
4560+ 0x000001f8, /* 00B0(:0): NOP */
4561+ 0xc1476018,
4562+ 0xc003241d,
4563+ 0x811a601b,
4564+ 0xda9b001b,
4565+ 0x9b9be01b,
4566+ 0x0000d3a0,
4567+ 0xc1862102,
4568+ 0x849be009,
4569+ 0x0bfed7b8,
4570+ 0xda9b001b,
4571+ 0x9b9be01b,
4572+ 0x1000cb20,
4573+ 0x70000006,
4574+ 0x088cf88f,
4575+ 0x1000cb28,
4576+ 0x70000006,
4577+ 0x088cf88f,
4578+ 0x1000cb30,
4579+ 0x70000006,
4580+ 0x088cf88f,
4581+ 0x1000cb38,
4582+ 0x0000c728,
4583+ 0x000001f8, /* 010C(:0): NOP */
4584+ 0x8118801b,
4585+ 0xd8c60018,
4586+ 0x98c6601c,
4587+ 0x6000000b,
4588+ 0x0c8cfc9f,
4589+ 0x000001f8, /* 0124(:0): NOP */
4590+ 0xa146001e,
4591+ 0x10000b08,
4592+ 0x10002050,
4593+ 0xb8c60018,
4594+ 0x10002b10,
4595+ 0x7000000a,
4596+ 0x080cf89f,
4597+ 0x6000000d,
4598+ 0x018cf89f,
4599+ 0x000001f8, /* 014C(:0): NOP */
4600+ 0x8618801b,
4601+ 0x7000000e,
4602+ 0x084cf21f,
4603+ 0xd8990336,
4604+ 0x8019801b,
4605+ 0x040001f8,
4606+ 0x000001f8, /* 0168(:0): NOP */
4607+ 0x000001f8, /* 016C(:0): NOP */
4608+};
4609+u32 MCD_SingleNoEu_TDT[] = {
4610+ 0x8198001b,
4611+ 0x7000000d,
4612+ 0x080cf81f,
4613+ 0x8198801b,
4614+ 0x6000000e,
4615+ 0x084cf85f,
4616+ 0x000001f8, /* 0018(:0): NOP */
4617+ 0x8298001b,
4618+ 0x7000000d,
4619+ 0x010cf81f,
4620+ 0x6000000e,
4621+ 0x018cf81f,
4622+ 0xc202601b,
4623+ 0xc002221c,
4624+ 0x809a601b,
4625+ 0xc10420c2,
4626+ 0x839be009,
4627+ 0x03fed7b8,
4628+ 0xda9b001b,
4629+ 0x9b9be01b,
4630+ 0x70000006,
4631+ 0x088cf889,
4632+ 0x1000cb28,
4633+ 0x70000006,
4634+ 0x088cf889,
4635+ 0x1000cb30,
4636+ 0x70000006,
4637+ 0x088cf889,
4638+ 0x0000cb38,
4639+ 0x000001f8, /* 0074(:0): NOP */
4640+ 0xc202601b,
4641+ 0xc002229c,
4642+ 0x809a601b,
4643+ 0xda9b001b,
4644+ 0x9b9be01b,
4645+ 0x0000d3a0,
4646+ 0xc10420c2,
4647+ 0x839be009,
4648+ 0x0bfed7b8,
4649+ 0xda9b001b,
4650+ 0x9b9be01b,
4651+ 0x70000006,
4652+ 0x088cf889,
4653+ 0x1000cb28,
4654+ 0x70000006,
4655+ 0x088cf889,
4656+ 0x1000cb30,
4657+ 0x70000006,
4658+ 0x088cf889,
4659+ 0x0000cb38,
4660+ 0x000001f8, /* 00C8(:0): NOP */
4661+ 0xc318022d,
4662+ 0x8018801b,
4663+ 0x040001f8,
4664+};
4665+#ifdef MCD_INCLUDE_EU
4666+u32 MCD_ChainEu_TDT[] = {
4667+ 0x80004000,
4668+ 0x8198801b,
4669+ 0xb8c68018,
4670+ 0x10002f10,
4671+ 0x7000000d,
4672+ 0x01ccf89f,
4673+ 0x6000000a,
4674+ 0x080cf89f,
4675+ 0x000001f8,
4676+ 0x981803a4,
4677+ 0x8198801b,
4678+ 0xf8c6801a,
4679+ 0xb8c6e01b,
4680+ 0x10002b10,
4681+ 0x00001318,
4682+ 0xb8c6801d,
4683+ 0x10001710,
4684+ 0x60000007,
4685+ 0x018cf88c,
4686+ 0x98c6801c,
4687+ 0x00000b10,
4688+ 0x98c78018,
4689+ 0x10002310,
4690+ 0x0000c820,
4691+ 0x000001f8, /* 0060(:0): NOP */
4692+ 0x8698801b,
4693+ 0x7000000f,
4694+ 0x084cf2df,
4695+ 0xd899042d,
4696+ 0x8019801b,
4697+ 0x60000003,
4698+ 0x2cd7c7df, /* 007C(:979): DRD2B2: EU3(var13) */
4699+ 0xd8990364,
4700+ 0x8019801b,
4701+ 0x60000003,
4702+ 0x2c17c7df, /* 008C(:981): DRD2B2: EU3(var1) */
4703+ 0x000001f8, /* 0090(:0): NOP */
4704+ 0xc1c7e018,
4705+ 0xc003a35e,
4706+ 0x819a601b,
4707+ 0xc206a142,
4708+ 0x851be009,
4709+ 0x63fe0000,
4710+ 0x0d4cfddf,
4711+ 0xda9b001b,
4712+ 0x9b9be01b,
4713+ 0x70000002,
4714+ 0x004cf81f,
4715+ 0x1000cb20,
4716+ 0x70000006,
4717+ 0x088cf891,
4718+ 0x1000cb28,
4719+ 0x70000006,
4720+ 0x088cf891,
4721+ 0x1000cb30,
4722+ 0x70000006,
4723+ 0x088cf891,
4724+ 0x1000cb38,
4725+ 0x0000c728,
4726+ 0x000001f8, /* 00EC(:0): NOP */
4727+ 0xc1c7e018,
4728+ 0xc003a49e,
4729+ 0x819a601b,
4730+ 0xda9b001b,
4731+ 0x9b9be01b,
4732+ 0x0000d3a0,
4733+ 0xc206a142,
4734+ 0x851be009,
4735+ 0x6bfe0000,
4736+ 0x0d4cfddf,
4737+ 0xda9b001b,
4738+ 0x9b9be01b,
4739+ 0x70000002,
4740+ 0x004cf81f,
4741+ 0x1000cb20,
4742+ 0x70000006,
4743+ 0x088cf891,
4744+ 0x1000cb28,
4745+ 0x70000006,
4746+ 0x088cf891,
4747+ 0x1000cb30,
4748+ 0x70000006,
4749+ 0x088cf891,
4750+ 0x1000cb38,
4751+ 0x0000c728,
4752+ 0x000001f8, /* 0154(:0): NOP */
4753+ 0x8198801b,
4754+ 0xd8c68018,
4755+ 0x98c6e01c,
4756+ 0x6000000b,
4757+ 0x0c8cfc9f,
4758+ 0x0000cc08,
4759+ 0xa1c6801e,
4760+ 0x10000f08,
4761+ 0x10002458,
4762+ 0xb8c68018,
4763+ 0x10002f10,
4764+ 0x7000000a,
4765+ 0x080cf89f,
4766+ 0x6000000d,
4767+ 0x01ccf89f,
4768+ 0x000001f8, /* 0194(:0): NOP */
4769+ 0x8698801b,
4770+ 0x7000000e,
4771+ 0x084cf25f,
4772+ 0xd899037f,
4773+ 0x8019801b,
4774+ 0x040001f8,
4775+ 0x000001f8, /* 01B0(:0): NOP */
4776+ 0x000001f8, /* 01B4(:0): NOP */
4777+};
4778+u32 MCD_SingleEu_TDT[] = {
4779+ 0x8218001b,
4780+ 0x7000000d,
4781+ 0x080cf81f,
4782+ 0x8218801b,
4783+ 0x6000000e,
4784+ 0x084cf85f,
4785+ 0x000001f8, /* 0018(:0): NOP */
4786+ 0x8318001b,
4787+ 0x7000000d,
4788+ 0x014cf81f,
4789+ 0x6000000e,
4790+ 0x01ccf81f,
4791+ 0x8498001b,
4792+ 0x7000000f,
4793+ 0x080cf19f,
4794+ 0xd81882a4,
4795+ 0x8019001b,
4796+ 0x60000003,
4797+ 0x2c97c7df,
4798+ 0xd818826d,
4799+ 0x8019001b,
4800+ 0x60000003,
4801+ 0x2c17c7df,
4802+ 0x000001f8, /* 005C(:0): NOP */
4803+ 0xc282e01b,
4804+ 0xc002a25e,
4805+ 0x811a601b,
4806+ 0xc184a102,
4807+ 0x841be009,
4808+ 0x63fe0000,
4809+ 0x0d4cfddf,
4810+ 0xda9b001b,
4811+ 0x9b9be01b,
4812+ 0x70000002,
4813+ 0x004cf99f,
4814+ 0x70000006,
4815+ 0x088cf88b,
4816+ 0x1000cb28,
4817+ 0x70000006,
4818+ 0x088cf88b,
4819+ 0x1000cb30,
4820+ 0x70000006,
4821+ 0x088cf88b,
4822+ 0x0000cb38,
4823+ 0x000001f8, /* 00B0(:0): NOP */
4824+ 0xc282e01b,
4825+ 0xc002a31e,
4826+ 0x811a601b,
4827+ 0xda9b001b,
4828+ 0x9b9be01b,
4829+ 0x0000d3a0,
4830+ 0xc184a102,
4831+ 0x841be009,
4832+ 0x6bfe0000,
4833+ 0x0d4cfddf,
4834+ 0xda9b001b,
4835+ 0x9b9be01b,
4836+ 0x70000002,
4837+ 0x004cf99f,
4838+ 0x70000006,
4839+ 0x088cf88b,
4840+ 0x1000cb28,
4841+ 0x70000006,
4842+ 0x088cf88b,
4843+ 0x1000cb30,
4844+ 0x70000006,
4845+ 0x088cf88b,
4846+ 0x0000cb38,
4847+ 0x000001f8, /* 0110(:0): NOP */
4848+ 0x8144801c,
4849+ 0x0000c008,
4850+ 0xc398027f,
4851+ 0x8018801b,
4852+ 0x040001f8,
4853+};
4854+#endif
4855+u32 MCD_ENetRcv_TDT[] = {
4856+ 0x80004000,
4857+ 0x81988000,
4858+ 0x10000788,
4859+ 0x6000000a,
4860+ 0x080cf05f,
4861+ 0x98180209,
4862+ 0x81c40004,
4863+ 0x7000000e,
4864+ 0x010cf05f,
4865+ 0x7000000c,
4866+ 0x01ccf05f,
4867+ 0x70000004,
4868+ 0x014cf049,
4869+ 0x70000004,
4870+ 0x004cf04a,
4871+ 0x00000b88,
4872+ 0xc4030150,
4873+ 0x8119e012,
4874+ 0x03e0cf90,
4875+ 0x81188000,
4876+ 0x000ac788,
4877+ 0xc4030000,
4878+ 0x8199e000,
4879+ 0x63e00004,
4880+ 0x084cfc8b,
4881+ 0xd8990000,
4882+ 0x9999e000,
4883+ 0x60000005,
4884+ 0x0cccf841,
4885+ 0x81c60000,
4886+ 0xc399021b,
4887+ 0x80198000,
4888+ 0x00008400,
4889+ 0x00000f08,
4890+ 0x81988000,
4891+ 0x10000788,
4892+ 0x6000000a,
4893+ 0x080cf05f,
4894+ 0xc2188209,
4895+ 0x80190000,
4896+ 0x040001f8,
4897+ 0x000001f8,
4898+};
4899+u32 MCD_ENetXmit_TDT[] = {
4900+ 0x80004000,
4901+ 0x81988000,
4902+ 0x10000788,
4903+ 0x6000000a,
4904+ 0x080cf05f,
4905+ 0x98180309,
4906+ 0x80004003,
4907+ 0x81c60004,
4908+ 0x7000000e,
4909+ 0x014cf05f,
4910+ 0x7000000c,
4911+ 0x028cf05f,
4912+ 0x7000000d,
4913+ 0x018cf05f,
4914+ 0x70000004,
4915+ 0x01ccf04d,
4916+ 0x10000b90,
4917+ 0x60000004,
4918+ 0x020cf0a1,
4919+ 0xc3188312,
4920+ 0x83c70000,
4921+ 0x00001f10,
4922+ 0xc583a3c3,
4923+ 0x81042325,
4924+ 0x03e0c798,
4925+ 0xd8990000,
4926+ 0x9999e000,
4927+ 0x000acf98,
4928+ 0xd8992306,
4929+ 0x9999e03f,
4930+ 0x03eac798,
4931+ 0xd8990000,
4932+ 0x9999e000,
4933+ 0x000acf98,
4934+ 0xd8990000,
4935+ 0x99832302,
4936+ 0x0beac798,
4937+ 0x81988000,
4938+ 0x6000000b,
4939+ 0x0c4cfc5f,
4940+ 0x81c80000,
4941+ 0xc5190312,
4942+ 0x80198000,
4943+ 0x00008400,
4944+ 0x00000f08,
4945+ 0x81988000,
4946+ 0x10000788,
4947+ 0x6000000a,
4948+ 0x080cf05f,
4949+ 0xc2988309,
4950+ 0x80190000,
4951+ 0x040001f8,
4952+ 0x000001f8,
4953+};
4954+
4955+#ifdef MCD_INCLUDE_EU
4956+MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
4957+#endif
4958--- /dev/null
4959+++ b/drivers/dma/MCD_tasksInit.c
4960@@ -0,0 +1,271 @@
4961+/*
4962+ * drivers/dma/MCD_tasksInit.c
4963+ *
4964+ * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
4965+ * Kurt Mahan <kmahan@freescale.com>
4966+ * Shrek Wu b16972@freescale.com
4967+ *
4968+ * This program is free software; you can redistribute it and/or
4969+ * modify it under the terms of the GNU General Public License as
4970+ * published by the Free Software Foundation; either version 2 of
4971+ * the License, or (at your option) any later version.
4972+ *
4973+ * This program is distributed in the hope that it will be useful,
4974+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
4975+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4976+ * GNU General Public License for more details.
4977+ *
4978+ * You should have received a copy of the GNU General Public License
4979+ * along with this program; if not, write to the Free Software
4980+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
4981+ * MA 02111-1307 USA
4982+ */
4983+
4984+/*
4985+ * Autogenerated - Do not edit!
4986+ */
4987+
4988+#include "MCD_dma.h"
4989+
4990+extern dmaRegs *MCD_dmaBar;
4991+
4992+
4993+/*
4994+ * Task 0
4995+ */
4996+
4997+void MCD_startDmaChainNoEu(int *currBD, short srcIncr,
4998+ short destIncr, int xferSize, short xferSizeIncr,
4999+ int *cSave, volatile TaskTableEntry *taskTable,
5000+ int channel)
5001+{
5002+ MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
5003+ MCD_SET_VAR(taskTable+channel, 25,
5004+ (u32)(0xe000 << 16) | (0xffff & srcIncr));
5005+
5006+ /* inc[1] */
5007+ MCD_SET_VAR(taskTable+channel, 24,
5008+ (u32)(0xe000 << 16) | (0xffff & destIncr));
5009+ /* inc[0] */
5010+ MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize); /* var[11] */
5011+ MCD_SET_VAR(taskTable+channel, 26,
5012+ (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));
5013+ /* inc[2] */
5014+ MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
5015+ MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
5016+ MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */
5017+ MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
5018+ MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
5019+ MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
5020+ MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
5021+ MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
5022+ MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
5023+ MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
5024+ MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */
5025+ MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000); /* var[13] */
5026+ MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010); /* var[14] */
5027+ MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */
5028+ MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000); /* var[16] */
5029+ MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
5030+ MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */
5031+ MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001); /* inc[5] */
5032+ MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000); /* inc[6] */
5033+
5034+ /* Set the task's Enable bit in its Task Control Register */
5035+ MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
5036+}
5037+
5038+
5039+/*
5040+ * Task 1
5041+ */
5042+
5043+void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr,
5044+ char *destAddr, short destIncr, int dmaSize,
5045+ short xferSizeIncr, int flags, int *currBD, int *cSave,
5046+ volatile TaskTableEntry *taskTable, int channel)
5047+{
5048+ MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr); /* var[7] */
5049+ MCD_SET_VAR(taskTable+channel, 25,
5050+ (u32)(0xe000 << 16) | (0xffff & srcIncr));
5051+ /* inc[1] */
5052+ MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr); /* var[2] */
5053+ MCD_SET_VAR(taskTable+channel, 24,
5054+ (u32)(0xe000 << 16) | (0xffff & destIncr));
5055+ /* inc[0] */
5056+ MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize); /* var[3] */
5057+ MCD_SET_VAR(taskTable+channel, 26,
5058+ (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));
5059+ /* inc[2] */
5060+ MCD_SET_VAR(taskTable+channel, 5, (u32)flags); /* var[5] */
5061+ MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */
5062+ MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
5063+ MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
5064+ MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
5065+ MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
5066+ MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */
5067+ MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000); /* var[10] */
5068+ MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
5069+ MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001); /* inc[4] */
5070+ MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000); /* inc[5] */
5071+
5072+ /* Set the task's Enable bit in its Task Control Register */
5073+ MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
5074+}
5075+
5076+
5077+/*
5078+ * Task 2
5079+ */
5080+
5081+void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,
5082+ int xferSize, short xferSizeIncr, int *cSave,
5083+ volatile TaskTableEntry *taskTable, int channel)
5084+{
5085+
5086+ MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
5087+ MCD_SET_VAR(taskTable+channel, 25,
5088+ (u32)(0xe000 << 16) | (0xffff & srcIncr));
5089+ /* inc[1] */
5090+ MCD_SET_VAR(taskTable+channel, 24,
5091+ (u32)(0xe000 << 16) | (0xffff & destIncr));
5092+ /* inc[0] */
5093+ MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize);
5094+ /* var[12] */
5095+ MCD_SET_VAR(taskTable+channel, 26,
5096+ (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));
5097+ /* inc[2] */
5098+ MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
5099+ MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
5100+ MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
5101+ MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
5102+ MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
5103+ MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
5104+ MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
5105+ MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
5106+ MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
5107+ MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
5108+ MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000); /* var[11] */
5109+ MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000); /* var[13] */
5110+ MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000); /* var[14] */
5111+ MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010); /* var[15] */
5112+ MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001); /* var[16] */
5113+ MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004); /* var[17] */
5114+ MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000); /* var[18] */
5115+ MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
5116+ MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */
5117+ MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000); /* inc[5] */
5118+ MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */
5119+ MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */
5120+
5121+ /* Set the task's Enable bit in its Task Control Register */
5122+ MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
5123+}
5124+
5125+
5126+/*
5127+ * Task 3
5128+ */
5129+
5130+void MCD_startDmaSingleEu(char *srcAddr, short srcIncr,
5131+ char *destAddr, short destIncr, int dmaSize,
5132+ short xferSizeIncr, int flags, int *currBD, int *cSave,
5133+ volatile TaskTableEntry *taskTable, int channel)
5134+{
5135+ MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr); /* var[8] */
5136+ MCD_SET_VAR(taskTable+channel, 25,
5137+ (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
5138+ MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr); /* var[3] */
5139+ MCD_SET_VAR(taskTable+channel, 24,
5140+ (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
5141+ MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize); /* var[4] */
5142+ MCD_SET_VAR(taskTable+channel, 26,
5143+ (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
5144+ MCD_SET_VAR(taskTable+channel, 6, (u32)flags); /* var[6] */
5145+ MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
5146+ MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
5147+ MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
5148+ MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
5149+ MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
5150+ MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
5151+ MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001); /* var[10] */
5152+ MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004); /* var[11] */
5153+ MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000); /* var[12] */
5154+ MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
5155+ MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000); /* inc[4] */
5156+ MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */
5157+ MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */
5158+ MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */
5159+
5160+ /* Set the task's Enable bit in its Task Control Register */
5161+ MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
5162+}
5163+
5164+
5165+/*
5166+ * Task 4
5167+ */
5168+
5169+void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr,
5170+ volatile TaskTableEntry *taskTable, int channel)
5171+{
5172+ MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
5173+ MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
5174+ MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */
5175+ MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
5176+ MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
5177+ MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
5178+ MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
5179+ MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
5180+ MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
5181+ MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */
5182+ MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000); /* var[10] */
5183+ MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff); /* var[11] */
5184+ MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008); /* var[12] */
5185+ MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */
5186+ MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */
5187+ MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004); /* inc[2] */
5188+ MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000); /* inc[3] */
5189+
5190+ /* Set the task's Enable bit in its Task Control Register */
5191+ MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
5192+}
5193+
5194+
5195+/*
5196+ * Task 5
5197+ */
5198+
5199+void MCD_startDmaENetXmit(char *bDBase, char *currBD,
5200+ char *xmitFifoPtr, volatile TaskTableEntry *taskTable,
5201+ int channel)
5202+{
5203+ MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
5204+ MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
5205+ MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr); /* var[11] */
5206+ MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
5207+ MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
5208+ MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
5209+ MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
5210+ MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
5211+ MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
5212+ MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
5213+ MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
5214+ MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
5215+ MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */
5216+ MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff); /* var[13] */
5217+ MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff); /* var[14] */
5218+ MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */
5219+ MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008); /* var[16] */
5220+ MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */
5221+ MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */
5222+ MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000); /* inc[2] */
5223+ MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc); /* inc[3] */
5224+ MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004); /* inc[4] */
5225+ MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */
5226+ MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff); /* inc[6] */
5227+ MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001); /* inc[7] */
5228+
5229+ /* Set the task's Enable bit in its Task Control Register */
5230+ MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
5231+}
5232--- /dev/null
5233+++ b/drivers/dma/MCD_tasksInit.h
5234@@ -0,0 +1,84 @@
5235+/*
5236+ * drivers/dma/MCD_tasksInit.h
5237+ *
5238+ * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
5239+ * Kurt Mahan <kmahan@freescale.com>
5240+ * Shrek Wu b16972@freescale.com
5241+ *
5242+ * This program is free software; you can redistribute it and/or
5243+ * modify it under the terms of the GNU General Public License as
5244+ * published by the Free Software Foundation; either version 2 of
5245+ * the License, or (at your option) any later version.
5246+ *
5247+ * This program is distributed in the hope that it will be useful,
5248+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
5249+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5250+ * GNU General Public License for more details.
5251+ *
5252+ * You should have received a copy of the GNU General Public License
5253+ * along with this program; if not, write to the Free Software
5254+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
5255+ * MA 02111-1307 USA
5256+ */
5257+#ifndef MCD_TSK_INIT_H
5258+#define MCD_TSK_INIT_H 1
5259+
5260+/*
5261+ * Autogenerated - Do not edit!
5262+ */
5263+
5264+/*
5265+ * Task 0
5266+ */
5267+void MCD_startDmaChainNoEu(int *currBD, short srcIncr,
5268+ short destIncr, int xferSize,
5269+ short xferSizeIncr, int *cSave,
5270+ volatile TaskTableEntry *taskTable,
5271+ int channel);
5272+
5273+
5274+/*
5275+ * Task 1
5276+ */
5277+void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr,
5278+ char *destAddr, short destIncr, int dmaSize,
5279+ short xferSizeIncr, int flags, int *currBD,
5280+ int *cSave, volatile TaskTableEntry *taskTable,
5281+ int channel);
5282+
5283+
5284+/*
5285+ * Task 2
5286+ */
5287+void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,
5288+ int xferSize, short xferSizeIncr, int *cSave,
5289+ volatile TaskTableEntry *taskTable,
5290+ int channel);
5291+
5292+
5293+/*
5294+ * Task 3
5295+ */
5296+void MCD_startDmaSingleEu(char *srcAddr, short srcIncr,
5297+ char *destAddr, short destIncr, int dmaSize,
5298+ short xferSizeIncr, int flags, int *currBD,
5299+ int *cSave, volatile TaskTableEntry *taskTable,
5300+ int channel);
5301+
5302+
5303+/*
5304+ * Task 4
5305+ */
5306+void MCD_startDmaENetRcv(char *bDBase, char *currBD,
5307+ char *rcvFifoPtr,
5308+ volatile TaskTableEntry *taskTable, int channel);
5309+
5310+
5311+/*
5312+ * Task 5
5313+ */
5314+void MCD_startDmaENetXmit(char *bDBase, char *currBD,
5315+ char *xmitFifoPtr,
5316+ volatile TaskTableEntry *taskTable, int channel);
5317+
5318+#endif /* MCD_TSK_INIT_H */
5319

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