Root/target/linux/generic/files/crypto/ocf/kirkwood/cesa/mvCesa.h

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63*******************************************************************************/
64
65/*******************************************************************************
66* mvCesa.h - Header File for Cryptographic Engines and Security Accelerator
67*
68* DESCRIPTION:
69* This header file contains macros typedefs and function declaration for
70* the Marvell Cryptographic Engines and Security Accelerator.
71*
72*******************************************************************************/
73
74#ifndef __mvCesa_h__
75#define __mvCesa_h__
76
77#include "mvOs.h"
78#include "mvCommon.h"
79#include "mvDebug.h"
80
81#include "ctrlEnv/mvCtrlEnvSpec.h"
82
83#include "cesa/mvMD5.h"
84#include "cesa/mvSHA1.h"
85
86#include "cesa/mvCesa.h"
87#include "cesa/AES/mvAes.h"
88#include "mvSysHwConfig.h"
89
90#ifdef MV_INCLUDE_IDMA
91#include "idma/mvIdma.h"
92#include "idma/mvIdmaRegs.h"
93#else
94/* Redefine MV_DMA_DESC structure */
95typedef struct _mvDmaDesc
96{
97    MV_U32 byteCnt; /* The total number of bytes to transfer */
98    MV_U32 phySrcAdd; /* The physical source address */
99    MV_U32 phyDestAdd; /* The physical destination address */
100    MV_U32 phyNextDescPtr; /* If we are using chain mode DMA transfer, */
101                            /* then this pointer should point to the */
102                            /* physical address of the next descriptor, */
103                            /* otherwise it should be NULL. */
104}MV_DMA_DESC;
105#endif /* MV_INCLUDE_IDMA */
106
107#include "cesa/mvCesaRegs.h"
108
109#define MV_CESA_AUTH_BLOCK_SIZE 64 /* bytes */
110
111#define MV_CESA_MD5_DIGEST_SIZE 16 /* bytes */
112#define MV_CESA_SHA1_DIGEST_SIZE 20 /* bytes */
113
114#define MV_CESA_MAX_DIGEST_SIZE MV_CESA_SHA1_DIGEST_SIZE
115
116#define MV_CESA_DES_KEY_LENGTH 8 /* bytes = 64 bits */
117#define MV_CESA_3DES_KEY_LENGTH 24 /* bytes = 192 bits */
118#define MV_CESA_AES_128_KEY_LENGTH 16 /* bytes = 128 bits */
119#define MV_CESA_AES_192_KEY_LENGTH 24 /* bytes = 192 bits */
120#define MV_CESA_AES_256_KEY_LENGTH 32 /* bytes = 256 bits */
121
122#define MV_CESA_MAX_CRYPTO_KEY_LENGTH MV_CESA_AES_256_KEY_LENGTH
123
124#define MV_CESA_DES_BLOCK_SIZE 8 /* bytes = 64 bits */
125#define MV_CESA_3DES_BLOCK_SIZE 8 /* bytes = 64 bits */
126
127#define MV_CESA_AES_BLOCK_SIZE 16 /* bytes = 128 bits */
128
129#define MV_CESA_MAX_IV_LENGTH MV_CESA_AES_BLOCK_SIZE
130
131#define MV_CESA_MAX_MAC_KEY_LENGTH 64 /* bytes */
132
133typedef struct
134{
135    MV_U8 cryptoKey[MV_CESA_MAX_CRYPTO_KEY_LENGTH];
136    MV_U8 macKey[MV_CESA_MAX_MAC_KEY_LENGTH];
137    MV_CESA_OPERATION operation;
138    MV_CESA_DIRECTION direction;
139    MV_CESA_CRYPTO_ALG cryptoAlgorithm;
140    MV_CESA_CRYPTO_MODE cryptoMode;
141       MV_U8 cryptoKeyLength;
142    MV_CESA_MAC_MODE macMode;
143    MV_U8 macKeyLength;
144    MV_U8 digestSize;
145
146} MV_CESA_OPEN_SESSION;
147
148typedef struct
149{
150    MV_BUF_INFO *pFrags;
151    MV_U16 numFrags;
152    MV_U16 mbufSize;
153
154} MV_CESA_MBUF;
155
156typedef struct
157{
158    void* pReqPrv; /* instead of reqId */
159    MV_U32 retCode;
160    MV_16 sessionId;
161
162} MV_CESA_RESULT;
163
164typedef void (*MV_CESA_CALLBACK) (MV_CESA_RESULT* pResult);
165
166
167typedef struct
168{
169    void* pReqPrv; /* instead of reqId */
170    MV_CESA_MBUF* pSrc;
171    MV_CESA_MBUF* pDst;
172    MV_CESA_CALLBACK* pFuncCB;
173    MV_16 sessionId;
174    MV_U16 ivFromUser;
175    MV_U16 ivOffset;
176    MV_U16 cryptoOffset;
177    MV_U16 cryptoLength;
178    MV_U16 digestOffset;
179    MV_U16 macOffset;
180    MV_U16 macLength;
181    MV_BOOL skipFlush;
182} MV_CESA_COMMAND;
183
184
185
186MV_STATUS mvCesaHalInit (int numOfSession, int queueDepth, char* pSramBase, MV_U32 cryptEngBase, void *osHandle);
187MV_STATUS mvCesaFinish (void);
188MV_STATUS mvCesaSessionOpen(MV_CESA_OPEN_SESSION *pSession, short* pSid);
189MV_STATUS mvCesaSessionClose(short sid);
190MV_STATUS mvCesaCryptoIvSet(MV_U8* pIV, int ivSize);
191
192MV_STATUS mvCesaAction (MV_CESA_COMMAND* pCmd);
193
194MV_U32 mvCesaInProcessGet(void);
195MV_STATUS mvCesaReadyDispatch(void);
196MV_STATUS mvCesaReadyGet(MV_CESA_RESULT* pResult);
197MV_BOOL mvCesaIsReady(void);
198
199int mvCesaMbufOffset(MV_CESA_MBUF* pMbuf, int offset, int* pBufOffset);
200MV_STATUS mvCesaCopyFromMbuf(MV_U8* pDst, MV_CESA_MBUF* pSrcMbuf,
201                               int offset, int size);
202MV_STATUS mvCesaCopyToMbuf(MV_U8* pSrc, MV_CESA_MBUF* pDstMbuf,
203                               int offset, int size);
204MV_STATUS mvCesaMbufCopy(MV_CESA_MBUF* pMbufDst, int dstMbufOffset,
205                           MV_CESA_MBUF* pMbufSrc, int srcMbufOffset, int size);
206
207/********** Debug functions ********/
208
209void mvCesaDebugMbuf(const char* str, MV_CESA_MBUF *pMbuf, int offset, int size);
210void mvCesaDebugSA(short sid, int mode);
211void mvCesaDebugStats(void);
212void mvCesaDebugStatsClear(void);
213void mvCesaDebugRegs(void);
214void mvCesaDebugStatus(void);
215void mvCesaDebugQueue(int mode);
216void mvCesaDebugSram(int mode);
217void mvCesaDebugSAD(int mode);
218
219
220/******** CESA Private definitions ********/
221#if (MV_CESA_VERSION >= 2)
222#if (MV_CACHE_COHERENCY == MV_CACHE_COHER_SW)
223#define MV_CESA_TDMA_CTRL_VALUE MV_CESA_TDMA_DST_BURST_MASK(MV_CESA_TDMA_BURST_128B) \
224                                    | MV_CESA_TDMA_SRC_BURST_MASK(MV_CESA_TDMA_BURST_128B) \
225                                    | MV_CESA_TDMA_OUTSTAND_READ_EN_MASK \
226                    | MV_CESA_TDMA_NO_BYTE_SWAP_MASK \
227                                    | MV_CESA_TDMA_ENABLE_MASK
228#else
229#define MV_CESA_TDMA_CTRL_VALUE MV_CESA_TDMA_DST_BURST_MASK(MV_CESA_TDMA_BURST_32B) \
230                                    | MV_CESA_TDMA_SRC_BURST_MASK(MV_CESA_TDMA_BURST_128B) \
231                                    /*| MV_CESA_TDMA_OUTSTAND_READ_EN_MASK */\
232                                    | MV_CESA_TDMA_ENABLE_MASK
233
234#endif
235#else
236#define MV_CESA_IDMA_CTRL_LOW_VALUE ICCLR_DST_BURST_LIM_128BYTE \
237                                    | ICCLR_SRC_BURST_LIM_128BYTE \
238                                    | ICCLR_INT_MODE_MASK \
239                                    | ICCLR_BLOCK_MODE \
240                                    | ICCLR_CHAN_ENABLE \
241                                    | ICCLR_DESC_MODE_16M
242#endif /* MV_CESA_VERSION >= 2 */
243
244#define MV_CESA_MAX_PKT_SIZE (64 * 1024)
245#define MV_CESA_MAX_MBUF_FRAGS 20
246
247#define MV_CESA_MAX_REQ_FRAGS ( (MV_CESA_MAX_PKT_SIZE / MV_CESA_MAX_BUF_SIZE) + 1)
248
249#define MV_CESA_MAX_DMA_DESC (MV_CESA_MAX_MBUF_FRAGS*2 + 5)
250
251#define MAX_CESA_CHAIN_LENGTH 20
252
253typedef enum
254{
255    MV_CESA_IDLE = 0,
256    MV_CESA_PENDING,
257    MV_CESA_PROCESS,
258    MV_CESA_READY,
259#if (MV_CESA_VERSION >= 3)
260    MV_CESA_CHAIN,
261#endif
262} MV_CESA_STATE;
263
264
265/* Session database */
266
267/* Map of Key materials of the session in SRAM.
268 * Each field must be 8 byte aligned
269 * Total size: 32 + 24 + 24 = 80 bytes
270 */
271typedef struct
272{
273    MV_U8 cryptoKey[MV_CESA_MAX_CRYPTO_KEY_LENGTH];
274    MV_U8 macInnerIV[MV_CESA_MAX_DIGEST_SIZE];
275    MV_U8 reservedInner[4];
276    MV_U8 macOuterIV[MV_CESA_MAX_DIGEST_SIZE];
277    MV_U8 reservedOuter[4];
278
279} MV_CESA_SRAM_SA;
280
281typedef struct
282{
283    MV_CESA_SRAM_SA* pSramSA;
284    MV_U32 config;
285    MV_U8 cryptoKeyLength;
286    MV_U8 cryptoIvSize;
287    MV_U8 cryptoBlockSize;
288    MV_U8 digestSize;
289    MV_U8 macKeyLength;
290    MV_U8 valid;
291    MV_U8 ctrMode;
292    MV_U32 count;
293
294} MV_CESA_SA;
295
296/* DMA list management */
297typedef struct
298{
299    MV_DMA_DESC* pDmaFirst;
300    MV_DMA_DESC* pDmaLast;
301
302} MV_CESA_DMA;
303
304
305typedef struct
306{
307    MV_U8 numFrag;
308    MV_U8 nextFrag;
309    int bufOffset;
310    int cryptoSize;
311    int macSize;
312    int newDigestOffset;
313    MV_U8 orgDigest[MV_CESA_MAX_DIGEST_SIZE];
314
315} MV_CESA_FRAGS;
316
317/* Request queue */
318typedef struct
319{
320    MV_U8 state;
321    MV_U8 fragMode;
322    MV_U8 fixOffset;
323    MV_CESA_COMMAND* pCmd;
324    MV_CESA_COMMAND* pOrgCmd;
325    MV_BUF_INFO dmaDescBuf;
326    MV_CESA_DMA dma[MV_CESA_MAX_REQ_FRAGS];
327    MV_BUF_INFO cesaDescBuf;
328    MV_CESA_DESC* pCesaDesc;
329    MV_CESA_FRAGS frags;
330
331
332} MV_CESA_REQ;
333
334
335/* SRAM map */
336/* Total SRAM size calculation */
337/* SRAM size =
338 * MV_CESA_MAX_BUF_SIZE +
339 * sizeof(MV_CESA_DESC) +
340 * MV_CESA_MAX_IV_LENGTH +
341 * MV_CESA_MAX_IV_LENGTH +
342 * MV_CESA_MAX_DIGEST_SIZE +
343 * sizeof(MV_CESA_SRAM_SA)
344 * = 1600 + 32 + 16 + 16 + 24 + 80 + 280 (reserved) = 2048 bytes
345 * = 3200 + 32 + 16 + 16 + 24 + 80 + 728 (reserved) = 4096 bytes
346 */
347typedef struct
348{
349    MV_U8 buf[MV_CESA_MAX_BUF_SIZE];
350    MV_CESA_DESC desc;
351    MV_U8 cryptoIV[MV_CESA_MAX_IV_LENGTH];
352    MV_U8 tempCryptoIV[MV_CESA_MAX_IV_LENGTH];
353    MV_U8 tempDigest[MV_CESA_MAX_DIGEST_SIZE+4];
354    MV_CESA_SRAM_SA sramSA;
355
356} MV_CESA_SRAM_MAP;
357
358
359typedef struct
360{
361    MV_U32 openedCount;
362    MV_U32 closedCount;
363    MV_U32 fragCount;
364    MV_U32 reqCount;
365    MV_U32 maxReqCount;
366    MV_U32 procCount;
367    MV_U32 readyCount;
368    MV_U32 notReadyCount;
369    MV_U32 startCount;
370#if (MV_CESA_VERSION >= 3)
371    MV_U32 maxChainUsage;
372#endif
373
374} MV_CESA_STATS;
375
376
377/* External variables */
378
379extern MV_CESA_STATS cesaStats;
380extern MV_CESA_FRAGS cesaFrags;
381
382extern MV_BUF_INFO cesaSramSaBuf;
383
384extern MV_CESA_SA* pCesaSAD;
385extern MV_U16 cesaMaxSA;
386
387extern MV_CESA_REQ* pCesaReqFirst;
388extern MV_CESA_REQ* pCesaReqLast;
389extern MV_CESA_REQ* pCesaReqEmpty;
390extern MV_CESA_REQ* pCesaReqProcess;
391extern int cesaQueueDepth;
392extern int cesaReqResources;
393#if (MV_CESA_VERSION>= 3)
394extern MV_U32 cesaChainLength;
395#endif
396
397extern MV_CESA_SRAM_MAP* cesaSramVirtPtr;
398extern MV_U32 cesaSramPhysAddr;
399
400static INLINE MV_ULONG mvCesaVirtToPhys(MV_BUF_INFO* pBufInfo, void* pVirt)
401{
402    return (pBufInfo->bufPhysAddr + ((MV_U8*)pVirt - pBufInfo->bufVirtPtr));
403}
404
405/* Additional DEBUG functions */
406void mvCesaDebugSramSA(MV_CESA_SRAM_SA* pSramSA, int mode);
407void mvCesaDebugCmd(MV_CESA_COMMAND* pCmd, int mode);
408void mvCesaDebugDescriptor(MV_CESA_DESC* pDesc);
409
410
411
412#endif /* __mvCesa_h__ */
413

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