| 1 | The current fixed physical/virtual mappings for the internal peripherals |
| 2 | of the ixp4xx SoC devices is using a virtual address outside of the vmalloc |
| 3 | region. This results in kernel warnings like this on the boot console: |
| 4 | |
| 5 | BUG: mapping for 0xc8000000 at 0xffbeb000 out of vmalloc space |
| 6 | BUG: mapping for 0xc4000000 at 0xffbfe000 out of vmalloc space |
| 7 | BUG: mapping for 0xc0000000 at 0xffbff000 out of vmalloc space |
| 8 | |
| 9 | The virtual kernel memory layout lists this for the vmalloc region: |
| 10 | |
| 11 | ... |
| 12 | vmalloc : 0xc2800000 - 0xff000000 ( 968 MB) |
| 13 | ... |
| 14 | |
| 15 | With a little adjustment to the virtual address used we can map these |
| 16 | internal devices in the vmalloc region. |
| 17 | |
| 18 | Signed-off-by: Greg Ungerer <gerg@uclinux.org> |
| 19 | |
| 20 | --- |
| 21 | arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | 14 +++++++------- |
| 22 | 1 files changed, 7 insertions(+), 7 deletions(-) |
| 23 | |
| 24 | --- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h |
| 25 | +++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h |
| 26 | @@ -32,11 +32,11 @@ |
| 27 | * |
| 28 | * 0x6000000 0x00004000 ioremap'd QMgr |
| 29 | * |
| 30 | - * 0xC0000000 0x00001000 0xffbff000 PCI CFG |
| 31 | + * 0xC0000000 0x00001000 0xfebff000 PCI CFG |
| 32 | * |
| 33 | - * 0xC4000000 0x00001000 0xffbfe000 EXP CFG |
| 34 | + * 0xC4000000 0x00001000 0xfebfe000 EXP CFG |
| 35 | * |
| 36 | - * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals |
| 37 | + * 0xC8000000 0x00013000 0xfebeb000 On-Chip Peripherals |
| 38 | */ |
| 39 | |
| 40 | /* |
| 41 | @@ -49,21 +49,21 @@ |
| 42 | * Expansion BUS Configuration registers |
| 43 | */ |
| 44 | #define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) |
| 45 | -#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000) |
| 46 | +#define IXP4XX_EXP_CFG_BASE_VIRT (0xFEBFE000) |
| 47 | #define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) |
| 48 | |
| 49 | /* |
| 50 | * PCI Config registers |
| 51 | */ |
| 52 | #define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) |
| 53 | -#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000) |
| 54 | +#define IXP4XX_PCI_CFG_BASE_VIRT (0xFEBFF000) |
| 55 | #define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) |
| 56 | |
| 57 | /* |
| 58 | * Peripheral space |
| 59 | */ |
| 60 | #define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) |
| 61 | -#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000) |
| 62 | +#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFEBEB000) |
| 63 | #define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) |
| 64 | |
| 65 | /* |
| 66 | @@ -73,7 +73,7 @@ |
| 67 | * aligned so that it * can be used with the low-level debug code. |
| 68 | */ |
| 69 | #define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) |
| 70 | -#define IXP4XX_DEBUG_UART_BASE_VIRT (0xffb00000) |
| 71 | +#define IXP4XX_DEBUG_UART_BASE_VIRT (0xfeb00000) |
| 72 | #define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) |
| 73 | |
| 74 | #define IXP4XX_EXP_CS0_OFFSET 0x00 |
| 75 | |
