| 1 | / { |
| 2 | #address-cells = <1>; |
| 3 | #size-cells = <1>; |
| 4 | compatible = "lantiq,xway", "lantiq,ase"; |
| 5 | |
| 6 | cpus { |
| 7 | cpu@0 { |
| 8 | compatible = "mips,mips4Kc"; |
| 9 | }; |
| 10 | }; |
| 11 | |
| 12 | biu@1F800000 { |
| 13 | #address-cells = <1>; |
| 14 | #size-cells = <1>; |
| 15 | compatible = "lantiq,biu", "simple-bus"; |
| 16 | reg = <0x1F800000 0x800000>; |
| 17 | ranges = <0x0 0x1F800000 0x7FFFFF>; |
| 18 | |
| 19 | icu0: icu@80200 { |
| 20 | #interrupt-cells = <1>; |
| 21 | interrupt-controller; |
| 22 | compatible = "lantiq,icu"; |
| 23 | reg = <0x80200 0x28 |
| 24 | 0x80228 0x28 |
| 25 | 0x80250 0x28 |
| 26 | 0x80278 0x28 |
| 27 | 0x802a0 0x28>; |
| 28 | }; |
| 29 | |
| 30 | watchdog@803F0 { |
| 31 | compatible = "lantiq,wdt"; |
| 32 | reg = <0x803F0 0x10>; |
| 33 | }; |
| 34 | }; |
| 35 | |
| 36 | sram@1F000000 { |
| 37 | #address-cells = <1>; |
| 38 | #size-cells = <1>; |
| 39 | compatible = "lantiq,sram", "simple-bus"; |
| 40 | reg = <0x1F000000 0x800000>; |
| 41 | ranges = <0x0 0x1F000000 0x7FFFFF>; |
| 42 | |
| 43 | eiu0: eiu@101000 { |
| 44 | #interrupt-cells = <1>; |
| 45 | compatible = "lantiq,eiu-xway"; |
| 46 | reg = <0x101000 0x1000>; |
| 47 | interrupt-parent = <&icu0>; |
| 48 | interrupts = <29 30 31>; |
| 49 | }; |
| 50 | |
| 51 | pmu0: pmu@102000 { |
| 52 | compatible = "lantiq,pmu-xway"; |
| 53 | reg = <0x102000 0x1000>; |
| 54 | }; |
| 55 | |
| 56 | cgu0: cgu@103000 { |
| 57 | compatible = "lantiq,cgu-xway"; |
| 58 | reg = <0x103000 0x1000>; |
| 59 | #clock-cells = <1>; |
| 60 | }; |
| 61 | |
| 62 | rcu0: rcu@203000 { |
| 63 | compatible = "lantiq,rcu-xway"; |
| 64 | reg = <0x203000 0x1000>; |
| 65 | }; |
| 66 | }; |
| 67 | |
| 68 | fpi@10000000 { |
| 69 | #address-cells = <1>; |
| 70 | #size-cells = <1>; |
| 71 | compatible = "lantiq,fpi", "simple-bus"; |
| 72 | ranges = <0x0 0x10000000 0xEEFFFFF>; |
| 73 | reg = <0x10000000 0xEF00000>; |
| 74 | |
| 75 | spi@E100800 { |
| 76 | compatible = "lantiq,spi-xway"; |
| 77 | reg = <0xE100800 0x100>; |
| 78 | interrupt-parent = <&icu0>; |
| 79 | interrupts = <24 25 26>; |
| 80 | #address-cells = <1>; |
| 81 | #size-cells = <1>; |
| 82 | }; |
| 83 | |
| 84 | gptu@E100A00 { |
| 85 | compatible = "lantiq,gptu-xway"; |
| 86 | reg = <0xE100A00 0x100>; |
| 87 | interrupt-parent = <&icu0>; |
| 88 | interrupts = <97 98 99 100 101 102>; |
| 89 | status = "disabled"; |
| 90 | }; |
| 91 | |
| 92 | gpio: pinmux@E100B10 { |
| 93 | compatible = "lantiq,pinctrl-ase"; |
| 94 | #gpio-cells = <2>; |
| 95 | gpio-controller; |
| 96 | reg = <0xE100B10 0xA0>; |
| 97 | }; |
| 98 | |
| 99 | serial@E100C00 { |
| 100 | compatible = "lantiq,asc"; |
| 101 | reg = <0xE100C00 0x400>; |
| 102 | interrupt-parent = <&icu0>; |
| 103 | interrupts = <72 74 75>; |
| 104 | }; |
| 105 | |
| 106 | mei@E116000 { |
| 107 | compatible = "lantiq,mei-xway"; |
| 108 | interrupt-parent = <&icu0>; |
| 109 | interrupts = <63>; |
| 110 | }; |
| 111 | |
| 112 | ifxhcd@E101000 { |
| 113 | compatible = "lantiq,ifxhcd-ase"; |
| 114 | reg = <0xE101000 0x1000 |
| 115 | 0xE120000 0x3f000>; |
| 116 | interrupt-parent = <&icu0>; |
| 117 | interrupts = <39>; |
| 118 | status = "disabled"; |
| 119 | }; |
| 120 | |
| 121 | dma0: dma@E104100 { |
| 122 | compatible = "lantiq,dma-xway"; |
| 123 | reg = <0xE104100 0x800>; |
| 124 | }; |
| 125 | |
| 126 | ebu0: ebu@E105300 { |
| 127 | compatible = "lantiq,ebu-xway"; |
| 128 | reg = <0xE105300 0x100>; |
| 129 | }; |
| 130 | |
| 131 | ppe@E234000 { |
| 132 | compatible = "lantiq,ppe-ase"; |
| 133 | interrupt-parent = <&icu0>; |
| 134 | interrupts = <85>; |
| 135 | }; |
| 136 | |
| 137 | etop@E180000 { |
| 138 | compatible = "lantiq,etop-xway"; |
| 139 | reg = <0xE180000 0x40000>; |
| 140 | interrupt-parent = <&icu0>; |
| 141 | interrupts = <105 109>; |
| 142 | }; |
| 143 | }; |
| 144 | |
| 145 | adsl { |
| 146 | compatible = "lantiq,adsl-ase"; |
| 147 | }; |
| 148 | }; |
| 149 | |
