| 1 | / { |
| 2 | #address-cells = <1>; |
| 3 | #size-cells = <1>; |
| 4 | compatible = "lantiq,xway", "lantiq,ar9"; |
| 5 | |
| 6 | cpus { |
| 7 | cpu@0 { |
| 8 | compatible = "mips,mips34K"; |
| 9 | }; |
| 10 | }; |
| 11 | |
| 12 | biu@1F800000 { |
| 13 | #address-cells = <1>; |
| 14 | #size-cells = <1>; |
| 15 | compatible = "lantiq,biu", "simple-bus"; |
| 16 | reg = <0x1F800000 0x800000>; |
| 17 | ranges = <0x0 0x1F800000 0x7FFFFF>; |
| 18 | |
| 19 | icu0: icu@80200 { |
| 20 | #interrupt-cells = <1>; |
| 21 | interrupt-controller; |
| 22 | compatible = "lantiq,icu"; |
| 23 | reg = <0x80200 0x28 |
| 24 | 0x80228 0x28 |
| 25 | 0x80250 0x28 |
| 26 | 0x80278 0x28 |
| 27 | 0x802a0 0x28>; |
| 28 | }; |
| 29 | |
| 30 | watchdog@803F0 { |
| 31 | compatible = "lantiq,wdt"; |
| 32 | reg = <0x803F0 0x10>; |
| 33 | }; |
| 34 | }; |
| 35 | |
| 36 | sram@1F000000 { |
| 37 | #address-cells = <1>; |
| 38 | #size-cells = <1>; |
| 39 | compatible = "lantiq,sram"; |
| 40 | reg = <0x1F000000 0x800000>; |
| 41 | ranges = <0x0 0x1F000000 0x7FFFFF>; |
| 42 | |
| 43 | eiu0: eiu@101000 { |
| 44 | #interrupt-cells = <1>; |
| 45 | interrupt-controller; |
| 46 | compatible = "lantiq,eiu-xway"; |
| 47 | reg = <0x101000 0x1000>; |
| 48 | interrupt-parent = <&icu0>; |
| 49 | interrupts = <166 135 66 40 41 42>; |
| 50 | }; |
| 51 | |
| 52 | pmu0: pmu@102000 { |
| 53 | compatible = "lantiq,pmu-xway"; |
| 54 | reg = <0x102000 0x1000>; |
| 55 | }; |
| 56 | |
| 57 | cgu0: cgu@103000 { |
| 58 | compatible = "lantiq,cgu-xway"; |
| 59 | reg = <0x103000 0x1000>; |
| 60 | #clock-cells = <1>; |
| 61 | }; |
| 62 | |
| 63 | rcu0: rcu@203000 { |
| 64 | compatible = "lantiq,rcu-xway"; |
| 65 | reg = <0x203000 0x1000>; |
| 66 | }; |
| 67 | }; |
| 68 | |
| 69 | fpi@10000000 { |
| 70 | #address-cells = <1>; |
| 71 | #size-cells = <1>; |
| 72 | compatible = "lantiq,fpi", "simple-bus"; |
| 73 | ranges = <0x0 0x10000000 0xEEFFFFF>; |
| 74 | reg = <0x10000000 0xEF00000>; |
| 75 | |
| 76 | localbus@0 { |
| 77 | #address-cells = <2>; |
| 78 | #size-cells = <1>; |
| 79 | ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ |
| 80 | 1 0 0x4000000 0x4000010>; /* addsel1 */ |
| 81 | compatible = "lantiq,localbus", "simple-bus"; |
| 82 | }; |
| 83 | |
| 84 | gptu@E100A00 { |
| 85 | compatible = "lantiq,gptu-xway"; |
| 86 | reg = <0xE100A00 0x100>; |
| 87 | interrupt-parent = <&icu0>; |
| 88 | interrupts = <126 127 128 129 130 131>; |
| 89 | }; |
| 90 | |
| 91 | asc0: serial@E100400 { |
| 92 | compatible = "lantiq,asc"; |
| 93 | reg = <0xE100400 0x400>; |
| 94 | interrupt-parent = <&icu0>; |
| 95 | interrupts = <104 105 106>; |
| 96 | status = "disabled"; |
| 97 | }; |
| 98 | |
| 99 | gpio: pinmux@E100B10 { |
| 100 | compatible = "lantiq,pinctrl-xr9"; |
| 101 | #gpio-cells = <2>; |
| 102 | gpio-controller; |
| 103 | reg = <0xE100B10 0xA0>; |
| 104 | }; |
| 105 | |
| 106 | asc1: serial@E100C00 { |
| 107 | compatible = "lantiq,asc"; |
| 108 | reg = <0xE100C00 0x400>; |
| 109 | interrupt-parent = <&icu0>; |
| 110 | interrupts = <112 113 114>; |
| 111 | }; |
| 112 | |
| 113 | ifxhcd@E101000 { |
| 114 | compatible = "lantiq,ifxhcd-arx100"; |
| 115 | reg = <0xE101000 0x1000 |
| 116 | 0xE120000 0x3f000>; |
| 117 | interrupt-parent = <&icu0>; |
| 118 | interrupts = <62 91>; |
| 119 | status = "disabled"; |
| 120 | }; |
| 121 | |
| 122 | deu@E103100 { |
| 123 | compatible = "lantiq,deu-arx100"; |
| 124 | reg = <0xE103100 0xf00>; |
| 125 | }; |
| 126 | |
| 127 | dma0: dma@E104100 { |
| 128 | compatible = "lantiq,dma-xway"; |
| 129 | reg = <0xE104100 0x800>; |
| 130 | }; |
| 131 | |
| 132 | ebu0: ebu@E105300 { |
| 133 | compatible = "lantiq,ebu-xway"; |
| 134 | reg = <0xE105300 0x100>; |
| 135 | }; |
| 136 | |
| 137 | mei@E116000 { |
| 138 | compatible = "lantiq,mei-xway"; |
| 139 | interrupt-parent = <&icu0>; |
| 140 | interrupts = <63>; |
| 141 | }; |
| 142 | |
| 143 | etop@E180000 { |
| 144 | compatible = "lantiq,etop-xway"; |
| 145 | reg = <0xE180000 0x40000 |
| 146 | 0xE108000 0x200>; |
| 147 | interrupt-parent = <&icu0>; |
| 148 | interrupts = <73 72>; |
| 149 | mac-address = [ 00 11 22 33 44 55 ]; |
| 150 | }; |
| 151 | |
| 152 | ppe@E234000 { |
| 153 | compatible = "lantiq,ppe-arx100"; |
| 154 | interrupt-parent = <&icu0>; |
| 155 | interrupts = <96>; |
| 156 | }; |
| 157 | |
| 158 | pci0: pci@E105400 { |
| 159 | status = "disabled"; |
| 160 | #address-cells = <3>; |
| 161 | #size-cells = <2>; |
| 162 | #interrupt-cells = <1>; |
| 163 | compatible = "lantiq,pci-xway"; |
| 164 | bus-range = <0x0 0x0>; |
| 165 | ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ |
| 166 | 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */ |
| 167 | reg = <0x7000000 0x8000 /* config space */ |
| 168 | 0xE105400 0x400>; /* pci bridge */ |
| 169 | lantiq,bus-clock = <33333333>; |
| 170 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 171 | interrupt-map = <0x7000 0 0 1 &icu0 30 1>; |
| 172 | req-mask = <0x1>; |
| 173 | }; |
| 174 | }; |
| 175 | |
| 176 | adsl { |
| 177 | compatible = "lantiq,adsl-arx100"; |
| 178 | }; |
| 179 | }; |
| 180 | |
