| 1 | From 3aa46ed76b27df771f75db9c74ff011aca505fc5 Mon Sep 17 00:00:00 2001 |
| 2 | From: John Crispin <blogic@openwrt.org> |
| 3 | Date: Wed, 5 Dec 2012 17:38:48 +0100 |
| 4 | Subject: [PATCH 106/123] MIPS: lantiq: adds minimal dcdc driver |
| 5 | |
| 6 | This driver so far only reads the core voltage. |
| 7 | |
| 8 | Signed-off-by: John Crispin <blogic@openwrt.org> |
| 9 | --- |
| 10 | arch/mips/lantiq/xway/Makefile | 2 +- |
| 11 | arch/mips/lantiq/xway/dcdc.c | 74 ++++++++++++++++++++++++++++++++++++++++ |
| 12 | 2 files changed, 75 insertions(+), 1 deletion(-) |
| 13 | create mode 100644 arch/mips/lantiq/xway/dcdc.c |
| 14 | |
| 15 | diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile |
| 16 | index 7a13660..087497d 100644 |
| 17 | --- a/arch/mips/lantiq/xway/Makefile |
| 18 | +++ b/arch/mips/lantiq/xway/Makefile |
| 19 | @@ -1,3 +1,3 @@ |
| 20 | -obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o |
| 21 | +obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o |
| 22 | |
| 23 | obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o |
| 24 | diff --git a/arch/mips/lantiq/xway/dcdc.c b/arch/mips/lantiq/xway/dcdc.c |
| 25 | new file mode 100644 |
| 26 | index 0000000..0ac73a5 |
| 27 | --- /dev/null |
| 28 | +++ b/arch/mips/lantiq/xway/dcdc.c |
| 29 | @@ -0,0 +1,74 @@ |
| 30 | +/* |
| 31 | + * This program is free software; you can redistribute it and/or modify it |
| 32 | + * under the terms of the GNU General Public License version 2 as published |
| 33 | + * by the Free Software Foundation. |
| 34 | + * |
| 35 | + * Copyright (C) 2012 John Crispin <blogic@openwrt.org> |
| 36 | + * Copyright (C) 2010 Sameer Ahmad, Lantiq GmbH |
| 37 | + */ |
| 38 | + |
| 39 | +#include <linux/interrupt.h> |
| 40 | +#include <linux/ioport.h> |
| 41 | +#include <linux/module.h> |
| 42 | +#include <linux/of_platform.h> |
| 43 | +#include <linux/of_irq.h> |
| 44 | + |
| 45 | +#include <lantiq_soc.h> |
| 46 | + |
| 47 | +/* Bias and regulator Setup Register */ |
| 48 | +#define DCDC_BIAS_VREG0 0xa |
| 49 | +/* Bias and regulator Setup Register */ |
| 50 | +#define DCDC_BIAS_VREG1 0xb |
| 51 | + |
| 52 | +#define dcdc_w8(x, y) ltq_w8((x), dcdc_membase + (y)) |
| 53 | +#define dcdc_r8(x) ltq_r8(dcdc_membase + (x)) |
| 54 | + |
| 55 | +static void __iomem *dcdc_membase; |
| 56 | + |
| 57 | +static int __devinit dcdc_probe(struct platform_device *pdev) |
| 58 | +{ |
| 59 | + struct resource *res; |
| 60 | + |
| 61 | + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 62 | + if (!res) { |
| 63 | + dev_err(&pdev->dev, "Failed to get resource\n"); |
| 64 | + return -ENOMEM; |
| 65 | + } |
| 66 | + |
| 67 | + /* remap dcdc register range */ |
| 68 | + dcdc_membase = devm_request_and_ioremap(&pdev->dev, res); |
| 69 | + if (!dcdc_membase) { |
| 70 | + dev_err(&pdev->dev, "Failed to remap resource\n"); |
| 71 | + return -ENOMEM; |
| 72 | + } |
| 73 | + |
| 74 | + dev_info(&pdev->dev, "Core Voltage : %d mV\n", dcdc_r8(DCDC_BIAS_VREG1) * 8); |
| 75 | + |
| 76 | + return 0; |
| 77 | +} |
| 78 | + |
| 79 | +static const struct of_device_id dcdc_match[] = { |
| 80 | + { .compatible = "lantiq,dcdc-xrx200" }, |
| 81 | + {}, |
| 82 | +}; |
| 83 | +MODULE_DEVICE_TABLE(of, dcdc_match); |
| 84 | + |
| 85 | +static struct platform_driver dcdc_driver = { |
| 86 | + .probe = dcdc_probe, |
| 87 | + .driver = { |
| 88 | + .name = "dcdc-xrx200", |
| 89 | + .owner = THIS_MODULE, |
| 90 | + .of_match_table = dcdc_match, |
| 91 | + }, |
| 92 | +}; |
| 93 | + |
| 94 | +int __init dcdc_init(void) |
| 95 | +{ |
| 96 | + int ret = platform_driver_register(&dcdc_driver); |
| 97 | + |
| 98 | + if (ret) |
| 99 | + pr_info("dcdc: Error registering platform driver\n"); |
| 100 | + return ret; |
| 101 | +} |
| 102 | + |
| 103 | +arch_initcall(dcdc_init); |
| 104 | -- |
| 105 | 1.7.10.4 |
| 106 | |
| 107 | |
