Root/target/linux/lantiq/patches-3.7/0119-owrt-ATM-adds-lantiq-specific-hacks.patch

1From 8d2a7d1fb561c9cb098c2b13ded34fe0f49dcca5 Mon Sep 17 00:00:00 2001
2From: John Crispin <blogic@openwrt.org>
3Date: Fri, 3 Aug 2012 10:27:25 +0200
4Subject: [PATCH 20/25] owrt atm
5
6---
7 arch/mips/lantiq/irq.c | 2 ++
8 arch/mips/mm/cache.c | 2 ++
9 net/atm/common.c | 6 ++++++
10 net/atm/proc.c | 2 +-
11 4 files changed, 11 insertions(+), 1 deletions(-)
12
13Index: linux-3.7-rc6/arch/mips/lantiq/irq.c
14===================================================================
15--- linux-3.7-rc6.orig/arch/mips/lantiq/irq.c 2012-12-06 21:02:42.000000000 +0100
16+++ linux-3.7-rc6/arch/mips/lantiq/irq.c 2012-12-06 21:03:13.850060387 +0100
17@@ -14,6 +14,7 @@
18 #include <linux/of_platform.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21+#include <linux/module.h>
22 
23 #include <asm/bootinfo.h>
24 #include <asm/irq_cpu.h>
25@@ -99,6 +100,7 @@
26     ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier);
27     ltq_icu_w32(im, BIT(offset), isr);
28 }
29+EXPORT_SYMBOL(ltq_mask_and_ack_irq);
30 
31 static void ltq_ack_irq(struct irq_data *d)
32 {
33Index: linux-3.7-rc6/arch/mips/mm/cache.c
34===================================================================
35--- linux-3.7-rc6.orig/arch/mips/mm/cache.c 2012-12-06 21:02:40.000000000 +0100
36+++ linux-3.7-rc6/arch/mips/mm/cache.c 2012-12-06 21:03:13.850060387 +0100
37@@ -58,6 +58,8 @@
38 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
39 
40 EXPORT_SYMBOL(_dma_cache_wback_inv);
41+EXPORT_SYMBOL(_dma_cache_wback);
42+EXPORT_SYMBOL(_dma_cache_inv);
43 
44 #endif /* CONFIG_DMA_NONCOHERENT */
45 
46Index: linux-3.7-rc6/net/atm/common.c
47===================================================================
48--- linux-3.7-rc6.orig/net/atm/common.c 2012-11-17 02:42:40.000000000 +0100
49+++ linux-3.7-rc6/net/atm/common.c 2012-12-06 21:03:13.850060387 +0100
50@@ -62,11 +62,17 @@
51     write_unlock_irq(&vcc_sklist_lock);
52 }
53 
54+struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL;
55+EXPORT_SYMBOL(ifx_atm_alloc_tx);
56+
57 static struct sk_buff *alloc_tx(struct atm_vcc *vcc, unsigned int size)
58 {
59     struct sk_buff *skb;
60     struct sock *sk = sk_atm(vcc);
61 
62+ if (ifx_atm_alloc_tx != NULL)
63+ return ifx_atm_alloc_tx(vcc, size);
64+
65     if (sk_wmem_alloc_get(sk) && !atm_may_send(vcc, size)) {
66         pr_debug("Sorry: wmem_alloc = %d, size = %d, sndbuf = %d\n",
67              sk_wmem_alloc_get(sk), size, sk->sk_sndbuf);
68Index: linux-3.7-rc6/net/atm/proc.c
69===================================================================
70--- linux-3.7-rc6.orig/net/atm/proc.c 2012-11-17 02:42:40.000000000 +0100
71+++ linux-3.7-rc6/net/atm/proc.c 2012-12-06 21:03:13.850060387 +0100
72@@ -154,7 +154,7 @@
73 static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
74 {
75     static const char *const class_name[] = {
76- "off", "UBR", "CBR", "VBR", "ABR"};
77+ "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
78     static const char *const aal_name[] = {
79         "---", "1", "2", "3/4", /* 0- 3 */
80         "???", "5", "???", "???", /* 4- 7 */
81Index: linux-3.7-rc6/arch/mips/include/asm/mach-lantiq/lantiq_atm.h
82===================================================================
83--- /dev/null 1970-01-01 00:00:00.000000000 +0000
84+++ linux-3.7-rc6/arch/mips/include/asm/mach-lantiq/lantiq_atm.h 2012-12-06 21:03:13.850060387 +0100
85@@ -0,0 +1,196 @@
86+/******************************************************************************
87+**
88+** FILE NAME : ifx_atm.h
89+** PROJECT : UEIP
90+** MODULES : ATM
91+**
92+** DATE : 17 Jun 2009
93+** AUTHOR : Xu Liang
94+** DESCRIPTION : Global ATM driver header file
95+** COPYRIGHT : Copyright (c) 2006
96+** Infineon Technologies AG
97+** Am Campeon 1-12, 85579 Neubiberg, Germany
98+**
99+** This program is free software; you can redistribute it and/or modify
100+** it under the terms of the GNU General Public License as published by
101+** the Free Software Foundation; either version 2 of the License, or
102+** (at your option) any later version.
103+**
104+** HISTORY
105+** $Date $Author $Comment
106+** 07 JUL 2009 Xu Liang Init Version
107+*******************************************************************************/
108+
109+#ifndef IFX_ATM_H
110+#define IFX_ATM_H
111+
112+
113+
114+/*!
115+ \defgroup IFX_ATM UEIP Project - ATM driver module
116+ \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9.
117+ */
118+
119+/*!
120+ \defgroup IFX_ATM_IOCTL IOCTL Commands
121+ \ingroup IFX_ATM
122+ \brief IOCTL Commands used by user application.
123+ */
124+
125+/*!
126+ \defgroup IFX_ATM_STRUCT Structures
127+ \ingroup IFX_ATM
128+ \brief Structures used by user application.
129+ */
130+
131+/*!
132+ \file ifx_atm.h
133+ \ingroup IFX_ATM
134+ \brief ATM driver header file
135+ */
136+
137+
138+
139+/*
140+ * ####################################
141+ * Definition
142+ * ####################################
143+ */
144+
145+/*!
146+ \addtogroup IFX_ATM_STRUCT
147+ */
148+/*@{*/
149+
150+/*
151+ * ATM MIB
152+ */
153+
154+/*!
155+ \struct atm_cell_ifEntry_t
156+ \brief Structure used for Cell Level MIB Counters.
157+
158+ User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL".
159+ */
160+typedef struct {
161+ __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */
162+ __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */
163+ __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */
164+ __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */
165+ __u32 ifInErrors; /*!< counter of error ingress cells */
166+ __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */
167+ __u32 ifOutErrors; /*!< counter of error egress cells */
168+} atm_cell_ifEntry_t;
169+
170+/*!
171+ \struct atm_aal5_ifEntry_t
172+ \brief Structure used for AAL5 Frame Level MIB Counters.
173+
174+ User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5".
175+ */
176+typedef struct {
177+ __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */
178+ __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */
179+ __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */
180+ __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */
181+ __u32 ifInUcastPkts; /*!< counter of ingress packets */
182+ __u32 ifOutUcastPkts; /*!< counter of egress packets */
183+ __u32 ifInErrors; /*!< counter of error ingress packets */
184+ __u32 ifInDiscards; /*!< counter of dropped ingress packets */
185+ __u32 ifOutErros; /*!< counter of error egress packets */
186+ __u32 ifOutDiscards; /*!< counter of dropped egress packets */
187+} atm_aal5_ifEntry_t;
188+
189+/*!
190+ \struct atm_aal5_vcc_t
191+ \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
192+
193+ This structure is a part of structure "atm_aal5_vcc_x_t".
194+ */
195+typedef struct {
196+ __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */
197+ __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet
198+ __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */
199+} atm_aal5_vcc_t;
200+
201+/*!
202+ \struct atm_aal5_vcc_x_t
203+ \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
204+
205+ User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC".
206+ */
207+typedef struct {
208+ int vpi; /*!< VPI of the VCC to get MIB counters */
209+ int vci; /*!< VCI of the VCC to get MIB counters */
210+ atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */
211+} atm_aal5_vcc_x_t;
212+
213+/*@}*/
214+
215+
216+
217+/*
218+ * ####################################
219+ * IOCTL
220+ * ####################################
221+ */
222+
223+/*!
224+ \addtogroup IFX_ATM_IOCTL
225+ */
226+/*@{*/
227+
228+/*
229+ * ioctl Command
230+ */
231+/*!
232+ \brief ATM IOCTL Magic Number
233+ */
234+#define PPE_ATM_IOC_MAGIC 'o'
235+/*!
236+ \brief ATM IOCTL Command - Get Cell Level MIB Counters
237+
238+ This command is obsolete. User can get cell level MIB from DSL API.
239+ This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters.
240+ */
241+#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t)
242+/*!
243+ \brief ATM IOCTL Command - Get AAL5 Level MIB Counters
244+
245+ Get AAL5 packet counters.
246+ This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters.
247+ */
248+#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t)
249+/*!
250+ \brief ATM IOCTL Command - Get Per PVC MIB Counters
251+
252+ Get AAL5 packet counters for each PVC.
253+ This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters.
254+ */
255+#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
256+/*!
257+ \brief Total Number of ATM IOCTL Commands
258+ */
259+#define PPE_ATM_IOC_MAXNR 3
260+
261+/*@}*/
262+
263+
264+
265+/*
266+ * ####################################
267+ * API
268+ * ####################################
269+ */
270+
271+#ifdef __KERNEL__
272+struct port_cell_info {
273+ unsigned int port_num;
274+ unsigned int tx_link_rate[2];
275+};
276+#endif
277+
278+
279+
280+#endif // IFX_ATM_H
281+
282Index: linux-3.7-rc6/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
283===================================================================
284--- /dev/null 1970-01-01 00:00:00.000000000 +0000
285+++ linux-3.7-rc6/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h 2012-12-06 21:03:13.854060387 +0100
286@@ -0,0 +1,203 @@
287+/******************************************************************************
288+**
289+** FILE NAME : ifx_ptm.h
290+** PROJECT : UEIP
291+** MODULES : PTM
292+**
293+** DATE : 17 Jun 2009
294+** AUTHOR : Xu Liang
295+** DESCRIPTION : Global PTM driver header file
296+** COPYRIGHT : Copyright (c) 2006
297+** Infineon Technologies AG
298+** Am Campeon 1-12, 85579 Neubiberg, Germany
299+**
300+** This program is free software; you can redistribute it and/or modify
301+** it under the terms of the GNU General Public License as published by
302+** the Free Software Foundation; either version 2 of the License, or
303+** (at your option) any later version.
304+**
305+** HISTORY
306+** $Date $Author $Comment
307+** 07 JUL 2009 Xu Liang Init Version
308+*******************************************************************************/
309+
310+#ifndef IFX_PTM_H
311+#define IFX_PTM_H
312+
313+
314+
315+/*!
316+ \defgroup IFX_PTM UEIP Project - PTM driver module
317+ \brief UEIP Project - PTM driver module, support Danube, Amazon-SE, AR9, VR9.
318+ */
319+
320+/*!
321+ \defgroup IFX_PTM_IOCTL IOCTL Commands
322+ \ingroup IFX_PTM
323+ \brief IOCTL Commands used by user application.
324+ */
325+
326+/*!
327+ \defgroup IFX_PTM_STRUCT Structures
328+ \ingroup IFX_PTM
329+ \brief Structures used by user application.
330+ */
331+
332+/*!
333+ \file ifx_ptm.h
334+ \ingroup IFX_PTM
335+ \brief PTM driver header file
336+ */
337+
338+
339+
340+/*
341+ * ####################################
342+ * Definition
343+ * ####################################
344+ */
345+
346+
347+
348+/*
349+ * ####################################
350+ * IOCTL
351+ * ####################################
352+ */
353+
354+/*!
355+ \addtogroup IFX_PTM_IOCTL
356+ */
357+/*@{*/
358+
359+/*
360+ * ioctl Command
361+ */
362+/*!
363+ \brief PTM IOCTL Command - Get codeword MIB counters.
364+
365+ This command uses structure "PTM_CW_IF_ENTRY_T" to get codeword level MIB counters.
366+ */
367+#define IFX_PTM_MIB_CW_GET SIOCDEVPRIVATE + 1
368+/*!
369+ \brief PTM IOCTL Command - Get packet MIB counters.
370+
371+ This command uses structure "PTM_FRAME_MIB_T" to get packet level MIB counters.
372+ */
373+#define IFX_PTM_MIB_FRAME_GET SIOCDEVPRIVATE + 2
374+/*!
375+ \brief PTM IOCTL Command - Get firmware configuration (CRC).
376+
377+ This command uses structure "IFX_PTM_CFG_T" to get firmware configuration (CRC).
378+ */
379+#define IFX_PTM_CFG_GET SIOCDEVPRIVATE + 3
380+/*!
381+ \brief PTM IOCTL Command - Set firmware configuration (CRC).
382+
383+ This command uses structure "IFX_PTM_CFG_T" to set firmware configuration (CRC).
384+ */
385+#define IFX_PTM_CFG_SET SIOCDEVPRIVATE + 4
386+/*!
387+ \brief PTM IOCTL Command - Program priority value to TX queue mapping.
388+
389+ This command uses structure "IFX_PTM_PRIO_Q_MAP_T" to program priority value to TX queue mapping.
390+ */
391+#define IFX_PTM_MAP_PKT_PRIO_TO_Q SIOCDEVPRIVATE + 14
392+
393+/*@}*/
394+
395+
396+/*!
397+ \addtogroup IFX_PTM_STRUCT
398+ */
399+/*@{*/
400+
401+/*
402+ * ioctl Data Type
403+ */
404+
405+/*!
406+ \typedef PTM_CW_IF_ENTRY_T
407+ \brief Wrapping of structure "ptm_cw_ifEntry_t".
408+ */
409+/*!
410+ \struct ptm_cw_ifEntry_t
411+ \brief Structure used for CodeWord level MIB counters.
412+ */
413+typedef struct ptm_cw_ifEntry_t {
414+ uint32_t ifRxNoIdleCodewords; /*!< output, number of ingress user codeword */
415+ uint32_t ifRxIdleCodewords; /*!< output, number of ingress idle codeword */
416+ uint32_t ifRxCodingViolation; /*!< output, number of error ingress codeword */
417+ uint32_t ifTxNoIdleCodewords; /*!< output, number of egress user codeword */
418+ uint32_t ifTxIdleCodewords; /*!< output, number of egress idle codeword */
419+} PTM_CW_IF_ENTRY_T;
420+
421+/*!
422+ \typedef PTM_FRAME_MIB_T
423+ \brief Wrapping of structure "ptm_frame_mib_t".
424+ */
425+/*!
426+ \struct ptm_frame_mib_t
427+ \brief Structure used for packet level MIB counters.
428+ */
429+typedef struct ptm_frame_mib_t {
430+ uint32_t RxCorrect; /*!< output, number of ingress packet */
431+ uint32_t TC_CrcError; /*!< output, number of egress packet with CRC error */
432+ uint32_t RxDropped; /*!< output, number of dropped ingress packet */
433+ uint32_t TxSend; /*!< output, number of egress packet */
434+} PTM_FRAME_MIB_T;
435+
436+/*!
437+ \typedef IFX_PTM_CFG_T
438+ \brief Wrapping of structure "ptm_cfg_t".
439+ */
440+/*!
441+ \struct ptm_cfg_t
442+ \brief Structure used for ETH/TC CRC configuration.
443+ */
444+typedef struct ptm_cfg_t {
445+ uint32_t RxEthCrcPresent; /*!< input/output, ingress packet has ETH CRC */
446+ uint32_t RxEthCrcCheck; /*!< input/output, check ETH CRC of ingress packet */
447+ uint32_t RxTcCrcCheck; /*!< input/output, check TC CRC of ingress codeword */
448+ uint32_t RxTcCrcLen; /*!< input/output, length of TC CRC of ingress codeword */
449+ uint32_t TxEthCrcGen; /*!< input/output, generate ETH CRC for egress packet */
450+ uint32_t TxTcCrcGen; /*!< input/output, generate TC CRC for egress codeword */
451+ uint32_t TxTcCrcLen; /*!< input/output, length of TC CRC of egress codeword */
452+} IFX_PTM_CFG_T;
453+
454+/*!
455+ \typedef IFX_PTM_PRIO_Q_MAP_T
456+ \brief Wrapping of structure "ppe_prio_q_map".
457+ */
458+/*!
459+ \struct ppe_prio_q_map
460+ \brief Structure used for Priority Value to TX Queue mapping.
461+ */
462+typedef struct ppe_prio_q_map {
463+ int pkt_prio;
464+ int qid;
465+ int vpi; // ignored in eth interface
466+ int vci; // ignored in eth interface
467+} IFX_PTM_PRIO_Q_MAP_T;
468+
469+/*@}*/
470+
471+
472+
473+/*
474+ * ####################################
475+ * API
476+ * ####################################
477+ */
478+
479+#ifdef __KERNEL__
480+struct port_cell_info {
481+ unsigned int port_num;
482+ unsigned int tx_link_rate[2];
483+};
484+#endif
485+
486+
487+
488+#endif // IFX_PTM_H
489+
490Index: linux-3.7-rc6/include/uapi/linux/atm.h
491===================================================================
492--- linux-3.7-rc6.orig/include/uapi/linux/atm.h 2012-12-06 21:02:41.458059575 +0100
493+++ linux-3.7-rc6/include/uapi/linux/atm.h 2012-12-06 21:04:21.282062078 +0100
494@@ -130,8 +130,14 @@
495 #define ATM_ABR 4
496 #define ATM_ANYCLASS 5 /* compatible with everything */
497 
498+#define ATM_VBR_NRT ATM_VBR
499+#define ATM_VBR_RT 6
500+#define ATM_UBR_PLUS 7
501+#define ATM_GFR 8
502+
503 #define ATM_MAX_PCR -1 /* maximum available PCR */
504 
505+
506 struct atm_trafprm {
507     unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */
508     int max_pcr; /* maximum PCR in cells per second */
509

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