| 1 | /* |
| 2 | * Moschip MCS8140 Ethernet MAC driver |
| 3 | * |
| 4 | * Copyright (C) 2003, Moschip Semiconductors |
| 5 | * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org> |
| 6 | * |
| 7 | * Licensed under GPLv2 |
| 8 | */ |
| 9 | #include <linux/module.h> |
| 10 | #include <linux/slab.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/netdevice.h> |
| 14 | #include <linux/etherdevice.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/ethtool.h> |
| 17 | #include <linux/mii.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/of.h> |
| 22 | #include <linux/irq.h> |
| 23 | #include <linux/err.h> |
| 24 | #include <linux/phy.h> |
| 25 | #include <linux/clk.h> |
| 26 | #include <linux/dma-mapping.h> |
| 27 | |
| 28 | #include <asm/unaligned.h> |
| 29 | #include <asm/sizes.h> |
| 30 | |
| 31 | /* Hardware registers */ |
| 32 | #define MAC_BASE_ADDR ((priv->mac_base)) |
| 33 | |
| 34 | #define CTRL_REG (MAC_BASE_ADDR) |
| 35 | #define MII_BUSY (1 << 0) |
| 36 | #define MII_WRITE (1 << 1) |
| 37 | #define RX_ENABLE (1 << 2) |
| 38 | #define TX_ENABLE (1 << 3) |
| 39 | #define DEFER_CHECK (1 << 5) |
| 40 | #define STRIP_PAD (1 << 8) |
| 41 | #define DRTRY_DISABLE (1 << 10) |
| 42 | #define FULL_DUPLEX (1 << 20) |
| 43 | #define HBD_DISABLE (1 << 28) |
| 44 | #define MAC_ADDR_HIGH_REG (MAC_BASE_ADDR + 0x04) |
| 45 | #define MAC_ADDR_LOW_REG (MAC_BASE_ADDR + 0x08) |
| 46 | #define MII_ADDR_REG (MAC_BASE_ADDR + 0x14) |
| 47 | #define MII_ADDR_SHIFT (11) |
| 48 | #define MII_REG_SHIFT (6) |
| 49 | #define MII_DATA_REG (MAC_BASE_ADDR + 0x18) |
| 50 | /* Link interrupt registers */ |
| 51 | #define LINK_INT_CSR (MAC_BASE_ADDR + 0xD0) |
| 52 | #define LINK_INT_EN (1 << 0) |
| 53 | #define LINK_PHY_ADDR_SHIFT (1) |
| 54 | #define LINK_PHY_REG_SHIFT (6) |
| 55 | #define LINK_BIT_UP_SHIFT (11) |
| 56 | #define LINK_UP (1 << 16) |
| 57 | #define LINK_INT_POLL_TIME (MAC_BASE_ADDR + 0xD4) |
| 58 | #define LINK_POLL_MASK ((1 << 20) - 1) |
| 59 | |
| 60 | #define DMA_CHAN_WIDTH 32 |
| 61 | #define DMA_RX_CHAN 0 |
| 62 | #define DMA_TX_CHAN 2 |
| 63 | |
| 64 | /* Receive DMA registers */ |
| 65 | #define RX_DMA_BASE ((priv->dma_base) + \ |
| 66 | (DMA_CHAN_WIDTH * DMA_RX_CHAN)) |
| 67 | #define RX_BUFFER_ADDR (RX_DMA_BASE + 0x00) |
| 68 | #define RX_MAX_BYTES (RX_DMA_BASE + 0x04) |
| 69 | #define RX_ACT_BYTES (RX_DMA_BASE + 0x08) |
| 70 | #define RX_START_DMA (RX_DMA_BASE + 0x0C) |
| 71 | #define RX_DMA_ENABLE (1 << 0) |
| 72 | #define RX_DMA_RESET (1 << 1) |
| 73 | #define RX_DMA_STATUS_FIFO (1 << 12) |
| 74 | #define RX_DMA_ENH (RX_DMA_BASE + 0x14) |
| 75 | #define RX_DMA_INT_ENABLE (1 << 1) |
| 76 | |
| 77 | /* Transmit DMA registers */ |
| 78 | #define TX_DMA_BASE ((priv->dma_base) + \ |
| 79 | (DMA_CHAN_WIDTH * DMA_TX_CHAN)) |
| 80 | #define TX_BUFFER_ADDR (TX_DMA_BASE + 0x00) |
| 81 | #define TX_PKT_BYTES (TX_DMA_BASE + 0x04) |
| 82 | #define TX_BYTES_SENT (TX_DMA_BASE + 0x08) |
| 83 | #define TX_START_DMA (TX_DMA_BASE + 0x0C) |
| 84 | #define TX_DMA_ENABLE (1 << 0) |
| 85 | #define TX_DMA_START_FRAME (1 << 2) |
| 86 | #define TX_DMA_END_FRAME (1 << 3) |
| 87 | #define TX_DMA_PAD_DISABLE (1 << 8) |
| 88 | #define TX_DMA_CRC_DISABLE (1 << 9) |
| 89 | #define TX_DMA_FIFO_FULL (1 << 16) |
| 90 | #define TX_DMA_FIFO_EMPTY (1 << 17) |
| 91 | #define TX_DMA_STATUS_AVAIL (1 << 18) |
| 92 | #define TX_DMA_RESET (1 << 24) |
| 93 | #define TX_DMA_STATUS (TX_DMA_BASE + 0x10) |
| 94 | #define TX_DMA_ENH (TX_DMA_BASE + 0x14) |
| 95 | #define TX_DMA_ENH_ENABLE (1 << 0) |
| 96 | #define TX_DMA_INT_FIFO (1 << 1) |
| 97 | |
| 98 | #define RX_ALLOC_SIZE SZ_2K |
| 99 | #define MAX_ETH_FRAME_SIZE 1536 |
| 100 | #define RX_SKB_TAILROOM 128 |
| 101 | #define RX_SKB_HEADROOM (RX_ALLOC_SIZE - \ |
| 102 | (MAX_ETH_FRAME_SIZE + RX_SKB_TAILROOM) + 0) |
| 103 | |
| 104 | /* WDT Late COL Lenght COL Type */ |
| 105 | #define ERROR_FILTER_MASK ((1<<14) | (1<<15) | (1<<16) | (1<<17) | (0<<18) | \ |
| 106 | /* MII Dribbling CRC Len/type Control */\ |
| 107 | (1<<19) | (1<<20) | (1<<21) | (0<<24) | (1<<25) | \ |
| 108 | /* Unsup Missed */\ |
| 109 | (1<<26) | (0<<31)) |
| 110 | #define TX_RING_SIZE 30 |
| 111 | #define RX_RING_SIZE 30 |
| 112 | |
| 113 | static inline u32 nuport_mac_readl(void __iomem *reg) |
| 114 | { |
| 115 | return readl_relaxed(reg); |
| 116 | } |
| 117 | |
| 118 | static inline u8 nuport_mac_readb(void __iomem *reg) |
| 119 | { |
| 120 | return readb_relaxed(reg); |
| 121 | } |
| 122 | |
| 123 | static inline void nuport_mac_writel(u32 value, void __iomem *reg) |
| 124 | { |
| 125 | writel_relaxed(value, reg); |
| 126 | } |
| 127 | |
| 128 | static inline void nuport_mac_writeb(u8 value, void __iomem *reg) |
| 129 | { |
| 130 | writel_relaxed(value, reg); |
| 131 | } |
| 132 | |
| 133 | /* MAC private data */ |
| 134 | struct nuport_mac_priv { |
| 135 | spinlock_t lock; |
| 136 | |
| 137 | void __iomem *mac_base; |
| 138 | void __iomem *dma_base; |
| 139 | |
| 140 | int rx_irq; |
| 141 | int tx_irq; |
| 142 | int link_irq; |
| 143 | struct clk *emac_clk; |
| 144 | struct clk *ephy_clk; |
| 145 | |
| 146 | /* Transmit buffers */ |
| 147 | struct sk_buff *tx_skb[TX_RING_SIZE]; |
| 148 | dma_addr_t tx_addr; |
| 149 | unsigned int valid_txskb[TX_RING_SIZE]; |
| 150 | unsigned int cur_tx; |
| 151 | unsigned int dma_tx; |
| 152 | unsigned int tx_full; |
| 153 | |
| 154 | /* Receive buffers */ |
| 155 | struct sk_buff *rx_skb[RX_RING_SIZE]; |
| 156 | dma_addr_t rx_addr; |
| 157 | unsigned int irq_rxskb[RX_RING_SIZE]; |
| 158 | int pkt_len[RX_RING_SIZE]; |
| 159 | unsigned int cur_rx; |
| 160 | unsigned int dma_rx; |
| 161 | unsigned int rx_full; |
| 162 | |
| 163 | unsigned int first_pkt; |
| 164 | |
| 165 | /* Private data */ |
| 166 | struct napi_struct napi; |
| 167 | struct net_device *dev; |
| 168 | struct platform_device *pdev; |
| 169 | struct mii_bus *mii_bus; |
| 170 | struct phy_device *phydev; |
| 171 | int old_link; |
| 172 | int old_duplex; |
| 173 | u32 msg_level; |
| 174 | unsigned int buffer_shifting_len; |
| 175 | }; |
| 176 | |
| 177 | static inline int nuport_mac_mii_busy_wait(struct nuport_mac_priv *priv) |
| 178 | { |
| 179 | unsigned long curr; |
| 180 | unsigned long finish = jiffies + 3 * HZ; |
| 181 | |
| 182 | do { |
| 183 | curr = jiffies; |
| 184 | if (!(nuport_mac_readl(MII_ADDR_REG) & MII_BUSY)) |
| 185 | return 0; |
| 186 | cpu_relax(); |
| 187 | } while (!time_after_eq(curr, finish)); |
| 188 | |
| 189 | return -EBUSY; |
| 190 | } |
| 191 | |
| 192 | /* Read from PHY registers */ |
| 193 | static int nuport_mac_mii_read(struct mii_bus *bus, |
| 194 | int mii_id, int regnum) |
| 195 | { |
| 196 | struct net_device *dev = bus->priv; |
| 197 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 198 | int ret; |
| 199 | u32 val = 0; |
| 200 | |
| 201 | ret = nuport_mac_mii_busy_wait(priv); |
| 202 | if (ret) |
| 203 | return ret; |
| 204 | |
| 205 | val |= (mii_id << MII_ADDR_SHIFT) | (regnum << MII_REG_SHIFT) | MII_BUSY; |
| 206 | nuport_mac_writel(val, MII_ADDR_REG); |
| 207 | ret = nuport_mac_mii_busy_wait(priv); |
| 208 | if (ret) |
| 209 | return ret; |
| 210 | |
| 211 | return nuport_mac_readl(MII_DATA_REG); |
| 212 | } |
| 213 | |
| 214 | static int nuport_mac_mii_write(struct mii_bus *bus, int mii_id, |
| 215 | int regnum, u16 value) |
| 216 | { |
| 217 | struct net_device *dev = bus->priv; |
| 218 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 219 | int ret; |
| 220 | u32 val = 0; |
| 221 | |
| 222 | ret = nuport_mac_mii_busy_wait(priv); |
| 223 | if (ret) |
| 224 | return ret; |
| 225 | |
| 226 | val |= (mii_id << MII_ADDR_SHIFT) | (regnum << MII_REG_SHIFT); |
| 227 | val |= MII_BUSY | MII_WRITE; |
| 228 | nuport_mac_writel(value, MII_DATA_REG); |
| 229 | nuport_mac_writel(val, MII_ADDR_REG); |
| 230 | |
| 231 | return nuport_mac_mii_busy_wait(priv); |
| 232 | } |
| 233 | |
| 234 | static int nuport_mac_mii_reset(struct mii_bus *bus) |
| 235 | { |
| 236 | return 0; |
| 237 | } |
| 238 | |
| 239 | static int nuport_mac_start_tx_dma(struct nuport_mac_priv *priv, |
| 240 | struct sk_buff *skb) |
| 241 | { |
| 242 | u32 reg; |
| 243 | unsigned int timeout = 2048; |
| 244 | |
| 245 | while (timeout--) { |
| 246 | reg = nuport_mac_readl(TX_START_DMA); |
| 247 | if (!(reg & TX_DMA_ENABLE)) { |
| 248 | netdev_dbg(priv->dev, "dma ready\n"); |
| 249 | break; |
| 250 | } |
| 251 | cpu_relax(); |
| 252 | } |
| 253 | |
| 254 | if (!timeout) |
| 255 | return -EBUSY; |
| 256 | |
| 257 | priv->tx_addr = dma_map_single(&priv->pdev->dev, skb->data, |
| 258 | skb->len, DMA_TO_DEVICE); |
| 259 | if (dma_mapping_error(&priv->pdev->dev, priv->tx_addr)) |
| 260 | return -ENOMEM; |
| 261 | |
| 262 | /* enable enhanced mode */ |
| 263 | nuport_mac_writel(TX_DMA_ENH_ENABLE, TX_DMA_ENH); |
| 264 | nuport_mac_writel(priv->tx_addr, TX_BUFFER_ADDR); |
| 265 | nuport_mac_writel((skb->len) - 1, TX_PKT_BYTES); |
| 266 | wmb(); |
| 267 | reg = TX_DMA_ENABLE | TX_DMA_START_FRAME | TX_DMA_END_FRAME; |
| 268 | nuport_mac_writel(reg, TX_START_DMA); |
| 269 | |
| 270 | return 0; |
| 271 | } |
| 272 | |
| 273 | static void nuport_mac_reset_tx_dma(struct nuport_mac_priv *priv) |
| 274 | { |
| 275 | u32 reg; |
| 276 | |
| 277 | reg = nuport_mac_readl(TX_START_DMA); |
| 278 | reg |= TX_DMA_RESET; |
| 279 | nuport_mac_writel(reg, TX_START_DMA); |
| 280 | } |
| 281 | |
| 282 | static int nuport_mac_start_rx_dma(struct nuport_mac_priv *priv, |
| 283 | struct sk_buff *skb) |
| 284 | { |
| 285 | u32 reg; |
| 286 | unsigned int timeout = 2048; |
| 287 | |
| 288 | while (timeout--) { |
| 289 | reg = nuport_mac_readl(RX_START_DMA); |
| 290 | if (!(reg & RX_DMA_ENABLE)) { |
| 291 | netdev_dbg(priv->dev, "dma ready\n"); |
| 292 | break; |
| 293 | } |
| 294 | cpu_relax(); |
| 295 | } |
| 296 | |
| 297 | if (!timeout) |
| 298 | return -EBUSY; |
| 299 | |
| 300 | priv->rx_addr = dma_map_single(&priv->pdev->dev, skb->data, |
| 301 | RX_ALLOC_SIZE, DMA_FROM_DEVICE); |
| 302 | if (dma_mapping_error(&priv->pdev->dev, priv->rx_addr)) |
| 303 | return -ENOMEM; |
| 304 | |
| 305 | nuport_mac_writel(priv->rx_addr, RX_BUFFER_ADDR); |
| 306 | wmb(); |
| 307 | nuport_mac_writel(RX_DMA_ENABLE, RX_START_DMA); |
| 308 | |
| 309 | return 0; |
| 310 | } |
| 311 | |
| 312 | static void nuport_mac_reset_rx_dma(struct nuport_mac_priv *priv) |
| 313 | { |
| 314 | u32 reg; |
| 315 | |
| 316 | reg = nuport_mac_readl(RX_START_DMA); |
| 317 | reg |= RX_DMA_RESET; |
| 318 | nuport_mac_writel(reg, RX_START_DMA); |
| 319 | } |
| 320 | |
| 321 | /* I suppose this might do something, but I am not sure actually */ |
| 322 | static void nuport_mac_disable_rx_dma(struct nuport_mac_priv *priv) |
| 323 | { |
| 324 | u32 reg; |
| 325 | |
| 326 | reg = nuport_mac_readl(RX_DMA_ENH); |
| 327 | reg &= ~RX_DMA_INT_ENABLE; |
| 328 | nuport_mac_writel(reg, RX_DMA_ENH); |
| 329 | } |
| 330 | |
| 331 | static void nuport_mac_enable_rx_dma(struct nuport_mac_priv *priv) |
| 332 | { |
| 333 | u32 reg; |
| 334 | |
| 335 | reg = nuport_mac_readl(RX_DMA_ENH); |
| 336 | reg |= RX_DMA_INT_ENABLE; |
| 337 | nuport_mac_writel(reg, RX_DMA_ENH); |
| 338 | } |
| 339 | |
| 340 | /* Add packets to the transmit queue */ |
| 341 | static int nuport_mac_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 342 | { |
| 343 | unsigned long flags; |
| 344 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 345 | int ret; |
| 346 | |
| 347 | if (netif_queue_stopped(dev)) { |
| 348 | netdev_warn(dev, "netif queue was stopped, restarting\n"); |
| 349 | netif_start_queue(dev); |
| 350 | } |
| 351 | |
| 352 | spin_lock_irqsave(&priv->lock, flags); |
| 353 | if (priv->first_pkt) { |
| 354 | ret = nuport_mac_start_tx_dma(priv, skb); |
| 355 | if (ret) { |
| 356 | netif_stop_queue(dev); |
| 357 | spin_unlock_irqrestore(&priv->lock, flags); |
| 358 | netdev_err(dev, "transmit path busy\n"); |
| 359 | return NETDEV_TX_BUSY; |
| 360 | } |
| 361 | priv->first_pkt = 0; |
| 362 | } |
| 363 | |
| 364 | priv->tx_skb[priv->cur_tx] = skb; |
| 365 | dev->stats.tx_bytes += skb->len; |
| 366 | dev->stats.tx_packets++; |
| 367 | priv->valid_txskb[priv->cur_tx] = 1; |
| 368 | priv->cur_tx++; |
| 369 | dev->trans_start = jiffies; |
| 370 | |
| 371 | if (priv->cur_tx >= TX_RING_SIZE) |
| 372 | priv->cur_tx = 0; |
| 373 | |
| 374 | spin_unlock_irqrestore(&priv->lock, flags); |
| 375 | |
| 376 | if (priv->valid_txskb[priv->cur_tx]) { |
| 377 | priv->tx_full = 1; |
| 378 | netdev_err(dev, "stopping queue\n"); |
| 379 | netif_stop_queue(dev); |
| 380 | } |
| 381 | |
| 382 | return NETDEV_TX_OK; |
| 383 | } |
| 384 | |
| 385 | static void nuport_mac_adjust_link(struct net_device *dev) |
| 386 | { |
| 387 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 388 | struct phy_device *phydev = priv->phydev; |
| 389 | unsigned int status_changed = 0; |
| 390 | u32 reg; |
| 391 | |
| 392 | BUG_ON(!phydev); |
| 393 | |
| 394 | if (priv->old_link != phydev->link) { |
| 395 | status_changed = 1; |
| 396 | priv->old_link = phydev->link; |
| 397 | } |
| 398 | |
| 399 | if (phydev->link && (priv->old_duplex != phydev->duplex)) { |
| 400 | reg = nuport_mac_readl(CTRL_REG); |
| 401 | if (phydev->duplex == DUPLEX_FULL) |
| 402 | reg |= DUPLEX_FULL; |
| 403 | else |
| 404 | reg &= ~DUPLEX_FULL; |
| 405 | nuport_mac_writel(reg, CTRL_REG); |
| 406 | |
| 407 | status_changed = 1; |
| 408 | priv->old_duplex = phydev->duplex; |
| 409 | } |
| 410 | |
| 411 | if (!status_changed) |
| 412 | return; |
| 413 | |
| 414 | pr_info("%s: link %s", dev->name, phydev->link ? |
| 415 | "UP" : "DOWN"); |
| 416 | if (phydev->link) { |
| 417 | pr_cont(" - %d/%s", phydev->speed, |
| 418 | phydev->duplex == DUPLEX_FULL ? "full" : "half"); |
| 419 | } |
| 420 | pr_cont("\n"); |
| 421 | } |
| 422 | |
| 423 | static irqreturn_t nuport_mac_link_interrupt(int irq, void *dev_id) |
| 424 | { |
| 425 | struct net_device *dev = dev_id; |
| 426 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 427 | u32 reg; |
| 428 | u8 phy_addr; |
| 429 | unsigned long flags; |
| 430 | irqreturn_t ret = IRQ_HANDLED; |
| 431 | |
| 432 | spin_lock_irqsave(&priv->lock, flags); |
| 433 | reg = nuport_mac_readl(LINK_INT_CSR); |
| 434 | phy_addr = (reg >> LINK_PHY_ADDR_SHIFT) & (PHY_MAX_ADDR - 1); |
| 435 | |
| 436 | if (phy_addr != priv->phydev->addr) { |
| 437 | netdev_err(dev, "spurious PHY irq (phy: %d)\n", phy_addr); |
| 438 | ret = IRQ_NONE; |
| 439 | goto out; |
| 440 | } |
| 441 | |
| 442 | priv->phydev->link = (reg & LINK_UP); |
| 443 | nuport_mac_adjust_link(dev); |
| 444 | |
| 445 | out: |
| 446 | spin_unlock_irqrestore(&priv->lock, flags); |
| 447 | return ret; |
| 448 | } |
| 449 | |
| 450 | static irqreturn_t nuport_mac_tx_interrupt(int irq, void *dev_id) |
| 451 | { |
| 452 | struct net_device *dev = (struct net_device *)dev_id; |
| 453 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 454 | struct sk_buff *skb; |
| 455 | unsigned long flags; |
| 456 | int ret; |
| 457 | u32 reg; |
| 458 | |
| 459 | spin_lock_irqsave(&priv->lock, flags); |
| 460 | /* clear status word available if ready */ |
| 461 | reg = nuport_mac_readl(TX_START_DMA); |
| 462 | if (reg & TX_DMA_STATUS_AVAIL) { |
| 463 | nuport_mac_writel(reg, TX_START_DMA); |
| 464 | reg = nuport_mac_readl(TX_DMA_STATUS); |
| 465 | |
| 466 | if (reg & 1) |
| 467 | dev->stats.tx_errors++; |
| 468 | } else |
| 469 | netdev_dbg(dev, "no status word: %08x\n", reg); |
| 470 | |
| 471 | skb = priv->tx_skb[priv->dma_tx]; |
| 472 | priv->tx_skb[priv->dma_tx] = NULL; |
| 473 | priv->valid_txskb[priv->dma_tx] = 0; |
| 474 | dma_unmap_single(&priv->pdev->dev, priv->rx_addr, skb->len, |
| 475 | DMA_TO_DEVICE); |
| 476 | dev_kfree_skb_irq(skb); |
| 477 | |
| 478 | priv->dma_tx++; |
| 479 | if (priv->dma_tx >= TX_RING_SIZE) |
| 480 | priv->dma_tx = 0; |
| 481 | |
| 482 | if (!priv->valid_txskb[priv->dma_tx]) |
| 483 | priv->first_pkt = 1; |
| 484 | else { |
| 485 | ret = nuport_mac_start_tx_dma(priv, priv->tx_skb[priv->dma_tx]); |
| 486 | if (ret) |
| 487 | netdev_err(dev, "failed to restart TX dma\n"); |
| 488 | } |
| 489 | |
| 490 | if (priv->tx_full) { |
| 491 | netdev_dbg(dev, "restarting transmit queue\n"); |
| 492 | netif_wake_queue(dev); |
| 493 | priv->tx_full = 0; |
| 494 | } |
| 495 | |
| 496 | spin_unlock_irqrestore(&priv->lock, flags); |
| 497 | |
| 498 | return IRQ_HANDLED; |
| 499 | } |
| 500 | |
| 501 | static unsigned int nuport_mac_has_work(struct nuport_mac_priv *priv) |
| 502 | { |
| 503 | unsigned int i; |
| 504 | |
| 505 | for (i = 0; i < RX_RING_SIZE; i++) |
| 506 | if (priv->rx_skb[i]) |
| 507 | return 1; |
| 508 | |
| 509 | return 0; |
| 510 | } |
| 511 | |
| 512 | static irqreturn_t nuport_mac_rx_interrupt(int irq, void *dev_id) |
| 513 | { |
| 514 | struct net_device *dev = (struct net_device *)dev_id; |
| 515 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 516 | unsigned long flags; |
| 517 | int ret; |
| 518 | |
| 519 | spin_lock_irqsave(&priv->lock, flags); |
| 520 | if (!priv->rx_full) { |
| 521 | priv->pkt_len[priv->dma_rx] = nuport_mac_readl(RX_ACT_BYTES) - 4; |
| 522 | priv->irq_rxskb[priv->dma_rx] = 0; |
| 523 | priv->dma_rx++; |
| 524 | |
| 525 | if (priv->dma_rx >= RX_RING_SIZE) |
| 526 | priv->dma_rx = 0; |
| 527 | } else |
| 528 | priv->rx_full = 0; |
| 529 | |
| 530 | if (priv->irq_rxskb[priv->dma_rx] == 1) { |
| 531 | ret = nuport_mac_start_rx_dma(priv, priv->rx_skb[priv->dma_rx]); |
| 532 | if (ret) |
| 533 | netdev_err(dev, "failed to start rx dma\n"); |
| 534 | } else { |
| 535 | priv->rx_full = 1; |
| 536 | netdev_dbg(dev, "RX ring full\n"); |
| 537 | } |
| 538 | |
| 539 | if (likely(nuport_mac_has_work(priv))) { |
| 540 | /* find a way to disable DMA rx irq */ |
| 541 | nuport_mac_disable_rx_dma(priv); |
| 542 | napi_schedule(&priv->napi); |
| 543 | } |
| 544 | spin_unlock_irqrestore(&priv->lock, flags); |
| 545 | |
| 546 | return IRQ_HANDLED; |
| 547 | } |
| 548 | |
| 549 | /* Process received packets in tasklet */ |
| 550 | static int nuport_mac_rx(struct net_device *dev, int limit) |
| 551 | { |
| 552 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 553 | struct sk_buff *skb; |
| 554 | int len, status; |
| 555 | int count = 0; |
| 556 | |
| 557 | while (count < limit && !priv->irq_rxskb[priv->cur_rx]) { |
| 558 | skb = priv->rx_skb[priv->cur_rx]; |
| 559 | len = priv->pkt_len[priv->cur_rx]; |
| 560 | |
| 561 | /* Remove 2 bytes added by RX buffer shifting */ |
| 562 | len = len - priv->buffer_shifting_len; |
| 563 | skb->data = skb->data + priv->buffer_shifting_len; |
| 564 | |
| 565 | /* Get packet status */ |
| 566 | status = get_unaligned((u32 *) (skb->data + len)); |
| 567 | |
| 568 | dma_unmap_single(&priv->pdev->dev, priv->rx_addr, skb->len, |
| 569 | DMA_FROM_DEVICE); |
| 570 | |
| 571 | /* packet filter failed */ |
| 572 | if (!(status & (1 << 30))) { |
| 573 | dev_kfree_skb_irq(skb); |
| 574 | goto exit; |
| 575 | } |
| 576 | |
| 577 | /* missed frame */ |
| 578 | if (status & (1 << 31)) { |
| 579 | dev->stats.rx_missed_errors++; |
| 580 | dev_kfree_skb_irq(skb); |
| 581 | goto exit; |
| 582 | } |
| 583 | |
| 584 | /* Not ethernet type */ |
| 585 | if ((!(status & (1 << 18))) || (status & ERROR_FILTER_MASK)) |
| 586 | dev->stats.rx_errors++; |
| 587 | |
| 588 | if (len > MAX_ETH_FRAME_SIZE) { |
| 589 | dev_kfree_skb_irq(skb); |
| 590 | goto exit; |
| 591 | } else |
| 592 | skb_put(skb, len); |
| 593 | |
| 594 | skb->protocol = eth_type_trans(skb, dev); |
| 595 | dev->stats.rx_packets++; |
| 596 | |
| 597 | if (status & (1 << 29)) |
| 598 | skb->pkt_type = PACKET_OTHERHOST; |
| 599 | if (status & (1 << 27)) |
| 600 | skb->pkt_type = PACKET_MULTICAST; |
| 601 | if (status & (1 << 28)) |
| 602 | skb->pkt_type = PACKET_BROADCAST; |
| 603 | |
| 604 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 605 | |
| 606 | /* Pass the received packet to network layer */ |
| 607 | status = netif_receive_skb(skb); |
| 608 | if (status != NET_RX_DROP) |
| 609 | dev->stats.rx_bytes += len - 4; /* Without CRC */ |
| 610 | else |
| 611 | dev->stats.rx_dropped++; |
| 612 | |
| 613 | dev->last_rx = jiffies; |
| 614 | |
| 615 | exit: |
| 616 | skb = netdev_alloc_skb(dev, RX_ALLOC_SIZE); |
| 617 | if (!skb) |
| 618 | goto out; |
| 619 | |
| 620 | skb_reserve(skb, RX_SKB_HEADROOM); |
| 621 | priv->rx_skb[priv->cur_rx] = skb; |
| 622 | priv->irq_rxskb[priv->cur_rx] = 1; |
| 623 | priv->cur_rx++; |
| 624 | |
| 625 | if (priv->cur_rx >= RX_RING_SIZE) |
| 626 | priv->cur_rx = 0; |
| 627 | count++; |
| 628 | } |
| 629 | out: |
| 630 | return count; |
| 631 | } |
| 632 | |
| 633 | static int nuport_mac_poll(struct napi_struct *napi, int budget) |
| 634 | { |
| 635 | struct nuport_mac_priv *priv = |
| 636 | container_of(napi, struct nuport_mac_priv, napi); |
| 637 | struct net_device *dev = priv->dev; |
| 638 | int work_done; |
| 639 | |
| 640 | work_done = nuport_mac_rx(dev, budget); |
| 641 | |
| 642 | if (work_done < budget) { |
| 643 | napi_complete(napi); |
| 644 | nuport_mac_enable_rx_dma(priv); |
| 645 | } |
| 646 | |
| 647 | return work_done; |
| 648 | } |
| 649 | |
| 650 | static void nuport_mac_init_tx_ring(struct nuport_mac_priv *priv) |
| 651 | { |
| 652 | int i; |
| 653 | |
| 654 | priv->cur_tx = priv->dma_tx = priv->tx_full = 0; |
| 655 | for (i = 0; i < TX_RING_SIZE; i++) { |
| 656 | priv->tx_skb[i] = NULL; |
| 657 | priv->valid_txskb[i] = 0; |
| 658 | } |
| 659 | priv->first_pkt = 1; |
| 660 | } |
| 661 | |
| 662 | static int nuport_mac_init_rx_ring(struct net_device *dev) |
| 663 | { |
| 664 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 665 | struct sk_buff *skb; |
| 666 | int i; |
| 667 | |
| 668 | priv->cur_rx = priv->dma_rx = priv->rx_full = 0; |
| 669 | |
| 670 | for (i = 0; i < RX_RING_SIZE; i++) { |
| 671 | skb = netdev_alloc_skb(dev, RX_ALLOC_SIZE); |
| 672 | if (!skb) |
| 673 | return -ENOMEM; |
| 674 | skb_reserve(skb, RX_SKB_HEADROOM); |
| 675 | priv->rx_skb[i] = skb; |
| 676 | priv->irq_rxskb[i] = 1; |
| 677 | } |
| 678 | |
| 679 | return 0; |
| 680 | } |
| 681 | |
| 682 | static void nuport_mac_free_rx_ring(struct nuport_mac_priv *priv) |
| 683 | { |
| 684 | int i; |
| 685 | |
| 686 | for (i = 0; i < RX_RING_SIZE; i++) { |
| 687 | if (!priv->rx_skb[i]) |
| 688 | continue; |
| 689 | |
| 690 | dev_kfree_skb(priv->rx_skb[i]); |
| 691 | priv->rx_skb[i] = NULL; |
| 692 | } |
| 693 | |
| 694 | if (priv->rx_addr) |
| 695 | dma_unmap_single(&priv->pdev->dev, priv->rx_addr, RX_ALLOC_SIZE, |
| 696 | DMA_TO_DEVICE); |
| 697 | } |
| 698 | |
| 699 | static void nuport_mac_read_mac_address(struct net_device *dev) |
| 700 | { |
| 701 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 702 | int i; |
| 703 | |
| 704 | for (i = 0; i < 4; i++) |
| 705 | dev->dev_addr[i] = nuport_mac_readb(MAC_ADDR_LOW_REG + i); |
| 706 | dev->dev_addr[4] = nuport_mac_readb(MAC_ADDR_HIGH_REG); |
| 707 | dev->dev_addr[5] = nuport_mac_readb(MAC_ADDR_HIGH_REG + 1); |
| 708 | |
| 709 | if (!is_valid_ether_addr(dev->dev_addr)) { |
| 710 | dev_info(&priv->pdev->dev, "using random address\n"); |
| 711 | random_ether_addr(dev->dev_addr); |
| 712 | } |
| 713 | } |
| 714 | |
| 715 | static int nuport_mac_change_mac_address(struct net_device *dev, void *mac_addr) |
| 716 | { |
| 717 | struct sockaddr *addr = mac_addr; |
| 718 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 719 | unsigned long *temp = (unsigned long *)dev->dev_addr; |
| 720 | u32 high, low; |
| 721 | |
| 722 | if (netif_running(dev)) |
| 723 | return -EBUSY; |
| 724 | |
| 725 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); |
| 726 | |
| 727 | spin_lock_irq(&priv->lock); |
| 728 | |
| 729 | nuport_mac_writel(*temp, MAC_ADDR_LOW_REG); |
| 730 | temp = (unsigned long *)(dev->dev_addr + 4); |
| 731 | nuport_mac_writel(*temp, MAC_ADDR_HIGH_REG); |
| 732 | |
| 733 | low = nuport_mac_readl(MAC_ADDR_LOW_REG); |
| 734 | high = nuport_mac_readl(MAC_ADDR_HIGH_REG); |
| 735 | |
| 736 | spin_unlock_irq(&priv->lock); |
| 737 | |
| 738 | return 0; |
| 739 | } |
| 740 | |
| 741 | static int nuport_mac_open(struct net_device *dev) |
| 742 | { |
| 743 | int ret; |
| 744 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 745 | unsigned long flags; |
| 746 | u32 reg = 0; |
| 747 | |
| 748 | ret = clk_enable(priv->emac_clk); |
| 749 | if (ret) { |
| 750 | netdev_err(dev, "failed to enable EMAC clock\n"); |
| 751 | return ret; |
| 752 | } |
| 753 | |
| 754 | /* Set MAC into full duplex mode by default */ |
| 755 | reg |= RX_ENABLE | TX_ENABLE; |
| 756 | reg |= DEFER_CHECK | STRIP_PAD | DRTRY_DISABLE; |
| 757 | reg |= FULL_DUPLEX | HBD_DISABLE; |
| 758 | nuport_mac_writel(reg, CTRL_REG); |
| 759 | |
| 760 | /* set mac address in hardware in case it was not already */ |
| 761 | nuport_mac_change_mac_address(dev, dev->dev_addr); |
| 762 | |
| 763 | ret = request_irq(priv->link_irq, &nuport_mac_link_interrupt, |
| 764 | 0, dev->name, dev); |
| 765 | if (ret) { |
| 766 | netdev_err(dev, "unable to request link interrupt\n"); |
| 767 | goto out_emac_clk; |
| 768 | } |
| 769 | |
| 770 | ret = request_irq(priv->tx_irq, &nuport_mac_tx_interrupt, |
| 771 | 0, dev->name, dev); |
| 772 | if (ret) { |
| 773 | netdev_err(dev, "unable to request rx interrupt\n"); |
| 774 | goto out_link_irq; |
| 775 | } |
| 776 | |
| 777 | /* Enable link interrupt monitoring for our PHY address */ |
| 778 | reg = LINK_INT_EN | (priv->phydev->addr << LINK_PHY_ADDR_SHIFT); |
| 779 | /* MII_BMSR register to be watched */ |
| 780 | reg |= (1 << LINK_PHY_REG_SHIFT); |
| 781 | /* BMSR_STATUS to be watched in particular */ |
| 782 | reg |= (2 << LINK_BIT_UP_SHIFT); |
| 783 | |
| 784 | spin_lock_irqsave(&priv->lock, flags); |
| 785 | nuport_mac_writel(reg, LINK_INT_CSR); |
| 786 | nuport_mac_writel(LINK_POLL_MASK, LINK_INT_POLL_TIME); |
| 787 | spin_unlock_irqrestore(&priv->lock, flags); |
| 788 | |
| 789 | phy_start(priv->phydev); |
| 790 | |
| 791 | ret = request_irq(priv->rx_irq, &nuport_mac_rx_interrupt, |
| 792 | 0, dev->name, dev); |
| 793 | if (ret) { |
| 794 | netdev_err(dev, "unable to request tx interrupt\n"); |
| 795 | goto out_tx_irq; |
| 796 | } |
| 797 | |
| 798 | netif_start_queue(dev); |
| 799 | |
| 800 | nuport_mac_init_tx_ring(priv); |
| 801 | |
| 802 | ret = nuport_mac_init_rx_ring(dev); |
| 803 | if (ret) { |
| 804 | netdev_err(dev, "rx ring init failed\n"); |
| 805 | goto out_rx_skb; |
| 806 | } |
| 807 | |
| 808 | nuport_mac_reset_tx_dma(priv); |
| 809 | nuport_mac_reset_rx_dma(priv); |
| 810 | |
| 811 | /* Start RX DMA */ |
| 812 | spin_lock_irqsave(&priv->lock, flags); |
| 813 | ret = nuport_mac_start_rx_dma(priv, priv->rx_skb[0]); |
| 814 | spin_unlock_irqrestore(&priv->lock, flags); |
| 815 | |
| 816 | napi_enable(&priv->napi); |
| 817 | |
| 818 | return ret; |
| 819 | |
| 820 | out_rx_skb: |
| 821 | nuport_mac_free_rx_ring(priv); |
| 822 | free_irq(priv->rx_irq, dev); |
| 823 | out_tx_irq: |
| 824 | free_irq(priv->tx_irq, dev); |
| 825 | out_link_irq: |
| 826 | free_irq(priv->link_irq, dev); |
| 827 | out_emac_clk: |
| 828 | clk_disable(priv->emac_clk); |
| 829 | return ret; |
| 830 | } |
| 831 | |
| 832 | static int nuport_mac_close(struct net_device *dev) |
| 833 | { |
| 834 | u32 reg; |
| 835 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 836 | |
| 837 | spin_lock_irq(&priv->lock); |
| 838 | reg = nuport_mac_readl(CTRL_REG); |
| 839 | reg &= ~(RX_ENABLE | TX_ENABLE); |
| 840 | nuport_mac_writel(reg, CTRL_REG); |
| 841 | |
| 842 | napi_disable(&priv->napi); |
| 843 | netif_stop_queue(dev); |
| 844 | |
| 845 | free_irq(priv->link_irq, dev); |
| 846 | /* disable PHY polling */ |
| 847 | nuport_mac_writel(0, LINK_INT_CSR); |
| 848 | nuport_mac_writel(0, LINK_INT_POLL_TIME); |
| 849 | phy_stop(priv->phydev); |
| 850 | |
| 851 | free_irq(priv->tx_irq, dev); |
| 852 | free_irq(priv->rx_irq, dev); |
| 853 | spin_unlock_irq(&priv->lock); |
| 854 | |
| 855 | nuport_mac_free_rx_ring(priv); |
| 856 | |
| 857 | clk_disable(priv->emac_clk); |
| 858 | |
| 859 | return 0; |
| 860 | } |
| 861 | |
| 862 | static void nuport_mac_tx_timeout(struct net_device *dev) |
| 863 | { |
| 864 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 865 | unsigned int i; |
| 866 | |
| 867 | netdev_warn(dev, "transmit timeout, attempting recovery\n"); |
| 868 | |
| 869 | netdev_info(dev, "TX DMA regs\n"); |
| 870 | for (i = 0; i < DMA_CHAN_WIDTH; i += 4) |
| 871 | netdev_info(dev, "[%02x]: 0x%08x\n", i, nuport_mac_readl(TX_DMA_BASE + i)); |
| 872 | netdev_info(dev, "RX DMA regs\n"); |
| 873 | for (i = 0; i < DMA_CHAN_WIDTH; i += 4) |
| 874 | netdev_info(dev, "[%02x]: 0x%08x\n", i, nuport_mac_readl(RX_DMA_BASE + i)); |
| 875 | |
| 876 | nuport_mac_init_tx_ring(priv); |
| 877 | nuport_mac_reset_tx_dma(priv); |
| 878 | |
| 879 | netif_wake_queue(dev); |
| 880 | } |
| 881 | |
| 882 | static int nuport_mac_mii_probe(struct net_device *dev) |
| 883 | { |
| 884 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 885 | struct phy_device *phydev = NULL; |
| 886 | int ret; |
| 887 | |
| 888 | ret = clk_enable(priv->ephy_clk); |
| 889 | if (ret) { |
| 890 | netdev_err(dev, "unable to enable ePHY clk\n"); |
| 891 | return ret; |
| 892 | } |
| 893 | |
| 894 | phydev = phy_find_first(priv->mii_bus); |
| 895 | if (!phydev) { |
| 896 | netdev_err(dev, "no PHYs found\n"); |
| 897 | ret = -ENODEV; |
| 898 | goto out; |
| 899 | } |
| 900 | |
| 901 | phydev = phy_connect(dev, dev_name(&phydev->dev), |
| 902 | nuport_mac_adjust_link, 0, |
| 903 | PHY_INTERFACE_MODE_MII); |
| 904 | if (IS_ERR(phydev)) { |
| 905 | netdev_err(dev, "could not attach PHY\n"); |
| 906 | ret = PTR_ERR(phydev); |
| 907 | goto out; |
| 908 | } |
| 909 | |
| 910 | phydev->supported &= PHY_BASIC_FEATURES; |
| 911 | phydev->advertising = phydev->supported; |
| 912 | priv->phydev = phydev; |
| 913 | priv->old_link = 1; |
| 914 | priv->old_duplex = DUPLEX_FULL; |
| 915 | |
| 916 | dev_info(&priv->pdev->dev, "attached PHY driver [%s] " |
| 917 | "(mii_bus:phy_addr=%d)\n", |
| 918 | phydev->drv->name, phydev->addr); |
| 919 | |
| 920 | return 0; |
| 921 | |
| 922 | out: |
| 923 | /* disable the Ethernet PHY clock for the moment */ |
| 924 | clk_disable(priv->ephy_clk); |
| 925 | |
| 926 | return ret; |
| 927 | } |
| 928 | |
| 929 | static void nuport_mac_ethtool_drvinfo(struct net_device *dev, |
| 930 | struct ethtool_drvinfo *info) |
| 931 | { |
| 932 | strncpy(info->driver, "nuport-mac", sizeof(info->driver)); |
| 933 | strncpy(info->version, "0.1", sizeof(info->version)); |
| 934 | strncpy(info->fw_version, "N/A", sizeof(info->fw_version)); |
| 935 | strncpy(info->bus_info, "internal", sizeof(info->bus_info)); |
| 936 | info->n_stats = 0; |
| 937 | info->testinfo_len = 0; |
| 938 | info->regdump_len = 0; |
| 939 | info->eedump_len = 0; |
| 940 | } |
| 941 | |
| 942 | static int nuport_mac_ethtool_get_settings(struct net_device *dev, |
| 943 | struct ethtool_cmd *cmd) |
| 944 | { |
| 945 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 946 | |
| 947 | if (priv->phydev) |
| 948 | return phy_ethtool_gset(priv->phydev, cmd); |
| 949 | |
| 950 | return -EINVAL; |
| 951 | } |
| 952 | |
| 953 | static int nuport_mac_ethtool_set_settings(struct net_device *dev, |
| 954 | struct ethtool_cmd *cmd) |
| 955 | { |
| 956 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 957 | |
| 958 | if (priv->phydev) |
| 959 | return phy_ethtool_sset(priv->phydev, cmd); |
| 960 | |
| 961 | return -EINVAL; |
| 962 | } |
| 963 | |
| 964 | static void nuport_mac_set_msglevel(struct net_device *dev, u32 msg_level) |
| 965 | { |
| 966 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 967 | |
| 968 | priv->msg_level = msg_level; |
| 969 | } |
| 970 | |
| 971 | static u32 nuport_mac_get_msglevel(struct net_device *dev) |
| 972 | { |
| 973 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 974 | |
| 975 | return priv->msg_level; |
| 976 | } |
| 977 | |
| 978 | static const struct ethtool_ops nuport_mac_ethtool_ops = { |
| 979 | .get_drvinfo = nuport_mac_ethtool_drvinfo, |
| 980 | .get_link = ethtool_op_get_link, |
| 981 | .get_settings = nuport_mac_ethtool_get_settings, |
| 982 | .set_settings = nuport_mac_ethtool_set_settings, |
| 983 | .set_msglevel = nuport_mac_set_msglevel, |
| 984 | .get_msglevel = nuport_mac_get_msglevel, |
| 985 | }; |
| 986 | |
| 987 | static const struct net_device_ops nuport_mac_ops = { |
| 988 | .ndo_open = nuport_mac_open, |
| 989 | .ndo_stop = nuport_mac_close, |
| 990 | .ndo_start_xmit = nuport_mac_start_xmit, |
| 991 | .ndo_change_mtu = eth_change_mtu, |
| 992 | .ndo_validate_addr = eth_validate_addr, |
| 993 | .ndo_set_mac_address = nuport_mac_change_mac_address, |
| 994 | .ndo_tx_timeout = nuport_mac_tx_timeout, |
| 995 | }; |
| 996 | |
| 997 | static int __init nuport_mac_probe(struct platform_device *pdev) |
| 998 | { |
| 999 | struct net_device *dev; |
| 1000 | struct nuport_mac_priv *priv = NULL; |
| 1001 | struct resource *regs, *dma; |
| 1002 | int ret = 0; |
| 1003 | int rx_irq, tx_irq, link_irq; |
| 1004 | int i; |
| 1005 | const unsigned int *intspec; |
| 1006 | |
| 1007 | dev = alloc_etherdev(sizeof(struct nuport_mac_priv)); |
| 1008 | if (!dev) { |
| 1009 | dev_err(&pdev->dev, "no memory for net_device\n"); |
| 1010 | return -ENOMEM; |
| 1011 | } |
| 1012 | |
| 1013 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1014 | dma = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 1015 | if (!regs || !dma) { |
| 1016 | dev_err(&pdev->dev, "failed to get regs resources\n"); |
| 1017 | ret = -ENODEV; |
| 1018 | goto out; |
| 1019 | } |
| 1020 | |
| 1021 | rx_irq = platform_get_irq(pdev, 0); |
| 1022 | tx_irq = platform_get_irq(pdev, 1); |
| 1023 | link_irq = platform_get_irq(pdev, 2); |
| 1024 | if (rx_irq < 0 || tx_irq < 0 || link_irq < 0) { |
| 1025 | ret = -ENODEV; |
| 1026 | goto out; |
| 1027 | } |
| 1028 | |
| 1029 | platform_set_drvdata(pdev, dev); |
| 1030 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 1031 | priv = netdev_priv(dev); |
| 1032 | priv->pdev = pdev; |
| 1033 | priv->dev = dev; |
| 1034 | spin_lock_init(&priv->lock); |
| 1035 | |
| 1036 | intspec = of_get_property(pdev->dev.of_node, |
| 1037 | "nuport-mac,buffer-shifting", NULL); |
| 1038 | if (!intspec) |
| 1039 | priv->buffer_shifting_len = 0; |
| 1040 | else |
| 1041 | priv->buffer_shifting_len = 2; |
| 1042 | |
| 1043 | priv->mac_base = devm_ioremap(&pdev->dev, |
| 1044 | regs->start, resource_size(regs)); |
| 1045 | if (!priv->mac_base) { |
| 1046 | dev_err(&pdev->dev, "failed to remap regs\n"); |
| 1047 | ret = -ENOMEM; |
| 1048 | goto out_platform; |
| 1049 | } |
| 1050 | |
| 1051 | priv->dma_base = devm_ioremap(&pdev->dev, |
| 1052 | dma->start, resource_size(dma)); |
| 1053 | if (!priv->dma_base) { |
| 1054 | dev_err(&pdev->dev, "failed to remap dma-regs\n"); |
| 1055 | ret = -ENOMEM; |
| 1056 | goto out_platform; |
| 1057 | } |
| 1058 | |
| 1059 | priv->emac_clk = clk_get(&pdev->dev, "emac"); |
| 1060 | if (IS_ERR_OR_NULL(priv->emac_clk)) { |
| 1061 | dev_err(&pdev->dev, "failed to get emac clk\n"); |
| 1062 | ret = PTR_ERR(priv->emac_clk); |
| 1063 | goto out_platform; |
| 1064 | } |
| 1065 | |
| 1066 | priv->ephy_clk = clk_get(&pdev->dev, "ephy"); |
| 1067 | if (IS_ERR_OR_NULL(priv->ephy_clk)) { |
| 1068 | dev_err(&pdev->dev, "failed to get ephy clk\n"); |
| 1069 | ret = PTR_ERR(priv->ephy_clk); |
| 1070 | goto out_platform; |
| 1071 | } |
| 1072 | |
| 1073 | priv->link_irq = link_irq; |
| 1074 | priv->rx_irq = rx_irq; |
| 1075 | priv->tx_irq = tx_irq; |
| 1076 | priv->msg_level = NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK; |
| 1077 | dev->netdev_ops = &nuport_mac_ops; |
| 1078 | dev->ethtool_ops = &nuport_mac_ethtool_ops; |
| 1079 | dev->watchdog_timeo = HZ; |
| 1080 | dev->flags = IFF_BROADCAST; /* Supports Broadcast */ |
| 1081 | dev->tx_queue_len = TX_RING_SIZE / 2; |
| 1082 | |
| 1083 | netif_napi_add(dev, &priv->napi, nuport_mac_poll, 64); |
| 1084 | |
| 1085 | priv->mii_bus = mdiobus_alloc(); |
| 1086 | if (!priv->mii_bus) { |
| 1087 | dev_err(&pdev->dev, "mii bus allocation failed\n"); |
| 1088 | goto out; |
| 1089 | } |
| 1090 | |
| 1091 | priv->mii_bus->priv = dev; |
| 1092 | priv->mii_bus->read = nuport_mac_mii_read; |
| 1093 | priv->mii_bus->write = nuport_mac_mii_write; |
| 1094 | priv->mii_bus->reset = nuport_mac_mii_reset; |
| 1095 | priv->mii_bus->name = "nuport-mac-mii"; |
| 1096 | priv->mii_bus->phy_mask = (1 << 0); |
| 1097 | snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name); |
| 1098 | priv->mii_bus->irq = kzalloc(PHY_MAX_ADDR * sizeof(int), GFP_KERNEL); |
| 1099 | if (!priv->mii_bus->irq) { |
| 1100 | dev_err(&pdev->dev, "failed to allocate mii_bus irqs\n"); |
| 1101 | ret = -ENOMEM; |
| 1102 | goto out_mdio; |
| 1103 | } |
| 1104 | |
| 1105 | /* We support PHY interrupts routed back to the MAC */ |
| 1106 | for (i = 0; i < PHY_MAX_ADDR; i++) |
| 1107 | priv->mii_bus->irq[i] = PHY_IGNORE_INTERRUPT; |
| 1108 | |
| 1109 | ret = mdiobus_register(priv->mii_bus); |
| 1110 | if (ret) { |
| 1111 | dev_err(&pdev->dev, "failed to register mii_bus\n"); |
| 1112 | goto out_mdio_irq; |
| 1113 | } |
| 1114 | |
| 1115 | ret = nuport_mac_mii_probe(dev); |
| 1116 | if (ret) { |
| 1117 | dev_err(&pdev->dev, "failed to probe MII bus\n"); |
| 1118 | goto out_mdio_unregister; |
| 1119 | } |
| 1120 | |
| 1121 | ret = register_netdev(dev); |
| 1122 | if (ret) { |
| 1123 | dev_err(&pdev->dev, "failed to register net_device\n"); |
| 1124 | goto out_mdio_probe; |
| 1125 | } |
| 1126 | |
| 1127 | /* read existing mac address */ |
| 1128 | nuport_mac_read_mac_address(dev); |
| 1129 | |
| 1130 | dev_info(&pdev->dev, "registered (MAC: %pM)\n", dev->dev_addr); |
| 1131 | |
| 1132 | return ret; |
| 1133 | |
| 1134 | out_mdio_probe: |
| 1135 | phy_disconnect(priv->phydev); |
| 1136 | out_mdio_unregister: |
| 1137 | mdiobus_unregister(priv->mii_bus); |
| 1138 | out_mdio_irq: |
| 1139 | kfree(priv->mii_bus->irq); |
| 1140 | out_mdio: |
| 1141 | mdiobus_free(priv->mii_bus); |
| 1142 | out_platform: |
| 1143 | platform_set_drvdata(pdev, NULL); |
| 1144 | out: |
| 1145 | clk_put(priv->ephy_clk); |
| 1146 | clk_put(priv->emac_clk); |
| 1147 | free_netdev(dev); |
| 1148 | platform_set_drvdata(pdev, NULL); |
| 1149 | return ret; |
| 1150 | } |
| 1151 | |
| 1152 | static int nuport_mac_remove(struct platform_device *pdev) |
| 1153 | { |
| 1154 | struct net_device *dev = platform_get_drvdata(pdev); |
| 1155 | struct nuport_mac_priv *priv = netdev_priv(dev); |
| 1156 | |
| 1157 | unregister_netdev(dev); |
| 1158 | phy_disconnect(priv->phydev); |
| 1159 | mdiobus_unregister(priv->mii_bus); |
| 1160 | kfree(priv->mii_bus->irq); |
| 1161 | mdiobus_free(priv->mii_bus); |
| 1162 | clk_put(priv->ephy_clk); |
| 1163 | clk_put(priv->emac_clk); |
| 1164 | free_netdev(dev); |
| 1165 | |
| 1166 | platform_set_drvdata(pdev, NULL); |
| 1167 | |
| 1168 | return 0; |
| 1169 | } |
| 1170 | |
| 1171 | static struct of_device_id nuport_eth_ids[] __initdata = { |
| 1172 | {.compatible = "moschip,nuport-mac",}, |
| 1173 | { /* sentinel */ }, |
| 1174 | }; |
| 1175 | |
| 1176 | static struct platform_driver nuport_eth_driver = { |
| 1177 | .driver = { |
| 1178 | .name = "nuport-mac", |
| 1179 | .owner = THIS_MODULE, |
| 1180 | .of_match_table = nuport_eth_ids, |
| 1181 | }, |
| 1182 | .probe = nuport_mac_probe, |
| 1183 | .remove = __devexit_p(nuport_mac_remove), |
| 1184 | }; |
| 1185 | |
| 1186 | module_platform_driver(nuport_eth_driver); |
| 1187 | |
| 1188 | MODULE_AUTHOR("Moschip Semiconductors Ltd."); |
| 1189 | MODULE_DESCRIPTION("Moschip MCS8140 Ethernet MAC driver"); |
| 1190 | MODULE_LICENSE("GPL"); |
| 1191 | |