| 1 | --- a/drivers/net/ethernet/freescale/gianfar.c |
| 2 | +++ b/drivers/net/ethernet/freescale/gianfar.c |
| 3 | @@ -1004,7 +1004,16 @@ static int gfar_probe(struct platform_de |
| 4 | /* We need to delay at least 3 TX clocks */ |
| 5 | udelay(2); |
| 6 | |
| 7 | - tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); |
| 8 | + if ((mfspr(SPRN_SVR) & 0xffff) >= 0x0011) { |
| 9 | + tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); |
| 10 | + } else { |
| 11 | + /* |
| 12 | + * Do not enable flow control on chips earlier than rev 1.1, |
| 13 | + * because of the eTSEC27 erratum |
| 14 | + */ |
| 15 | + tempval = 0; |
| 16 | + } |
| 17 | + |
| 18 | gfar_write(®s->maccfg1, tempval); |
| 19 | |
| 20 | /* Initialize MACCFG2. */ |
| 21 | |
