| 1 | /* |
| 2 | * Ralink RT288x SoC specific setup |
| 3 | * |
| 4 | * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 6 | * |
| 7 | * Parts of this file are based on Ralink's 2.6.21 BSP |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License version 2 as published |
| 11 | * by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> |
| 17 | |
| 18 | #include <asm/mach-ralink/common.h> |
| 19 | #include <asm/mach-ralink/ramips_gpio.h> |
| 20 | #include <asm/mach-ralink/rt288x.h> |
| 21 | #include <asm/mach-ralink/rt288x_regs.h> |
| 22 | |
| 23 | void __iomem * rt288x_sysc_base; |
| 24 | void __iomem * rt288x_memc_base; |
| 25 | |
| 26 | void __init ramips_soc_prom_init(void) |
| 27 | { |
| 28 | void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT2880_SYSC_BASE); |
| 29 | u32 n0; |
| 30 | u32 n1; |
| 31 | u32 id; |
| 32 | |
| 33 | n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); |
| 34 | n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); |
| 35 | id = __raw_readl(sysc + SYSC_REG_CHIP_ID); |
| 36 | |
| 37 | snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN, |
| 38 | "Ralink %c%c%c%c%c%c%c%c id:%u rev:%u", |
| 39 | (char) (n0 & 0xff), (char) ((n0 >> 8) & 0xff), |
| 40 | (char) ((n0 >> 16) & 0xff), (char) ((n0 >> 24) & 0xff), |
| 41 | (char) (n1 & 0xff), (char) ((n1 >> 8) & 0xff), |
| 42 | (char) ((n1 >> 16) & 0xff), (char) ((n1 >> 24) & 0xff), |
| 43 | (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK, |
| 44 | (id & CHIP_ID_REV_MASK)); |
| 45 | |
| 46 | ramips_mem_base = RT2880_SDRAM_BASE; |
| 47 | ramips_mem_size_min = RT288X_MEM_SIZE_MIN; |
| 48 | ramips_mem_size_max = RT288X_MEM_SIZE_MAX; |
| 49 | } |
| 50 | |
| 51 | static struct ramips_gpio_chip rt288x_gpio_chips[] = { |
| 52 | { |
| 53 | .chip = { |
| 54 | .label = "RT288X-GPIO0", |
| 55 | .base = 0, |
| 56 | .ngpio = 24, |
| 57 | }, |
| 58 | .regs = { |
| 59 | [RAMIPS_GPIO_REG_INT] = 0x00, |
| 60 | [RAMIPS_GPIO_REG_EDGE] = 0x04, |
| 61 | [RAMIPS_GPIO_REG_RENA] = 0x08, |
| 62 | [RAMIPS_GPIO_REG_FENA] = 0x0c, |
| 63 | [RAMIPS_GPIO_REG_DATA] = 0x20, |
| 64 | [RAMIPS_GPIO_REG_DIR] = 0x24, |
| 65 | [RAMIPS_GPIO_REG_POL] = 0x28, |
| 66 | [RAMIPS_GPIO_REG_SET] = 0x2c, |
| 67 | [RAMIPS_GPIO_REG_RESET] = 0x30, |
| 68 | [RAMIPS_GPIO_REG_TOGGLE] = 0x34, |
| 69 | }, |
| 70 | .map_base = RT2880_PIO_BASE, |
| 71 | .map_size = RT2880_PIO_SIZE, |
| 72 | }, |
| 73 | { |
| 74 | .chip = { |
| 75 | .label = "RT288X-GPIO1", |
| 76 | .base = 24, |
| 77 | .ngpio = 16, |
| 78 | }, |
| 79 | .regs = { |
| 80 | [RAMIPS_GPIO_REG_INT] = 0x38, |
| 81 | [RAMIPS_GPIO_REG_EDGE] = 0x3c, |
| 82 | [RAMIPS_GPIO_REG_RENA] = 0x40, |
| 83 | [RAMIPS_GPIO_REG_FENA] = 0x44, |
| 84 | [RAMIPS_GPIO_REG_DATA] = 0x48, |
| 85 | [RAMIPS_GPIO_REG_DIR] = 0x4c, |
| 86 | [RAMIPS_GPIO_REG_POL] = 0x50, |
| 87 | [RAMIPS_GPIO_REG_SET] = 0x54, |
| 88 | [RAMIPS_GPIO_REG_RESET] = 0x58, |
| 89 | [RAMIPS_GPIO_REG_TOGGLE] = 0x5c, |
| 90 | }, |
| 91 | .map_base = RT2880_PIO_BASE, |
| 92 | .map_size = RT2880_PIO_SIZE, |
| 93 | }, |
| 94 | { |
| 95 | .chip = { |
| 96 | .label = "RT288X-GPIO2", |
| 97 | .base = 40, |
| 98 | .ngpio = 32, |
| 99 | }, |
| 100 | .regs = { |
| 101 | [RAMIPS_GPIO_REG_INT] = 0x60, |
| 102 | [RAMIPS_GPIO_REG_EDGE] = 0x64, |
| 103 | [RAMIPS_GPIO_REG_RENA] = 0x68, |
| 104 | [RAMIPS_GPIO_REG_FENA] = 0x6c, |
| 105 | [RAMIPS_GPIO_REG_DATA] = 0x70, |
| 106 | [RAMIPS_GPIO_REG_DIR] = 0x74, |
| 107 | [RAMIPS_GPIO_REG_POL] = 0x78, |
| 108 | [RAMIPS_GPIO_REG_SET] = 0x7c, |
| 109 | [RAMIPS_GPIO_REG_RESET] = 0x80, |
| 110 | [RAMIPS_GPIO_REG_TOGGLE] = 0x84, |
| 111 | }, |
| 112 | .map_base = RT2880_PIO_BASE, |
| 113 | .map_size = RT2880_PIO_SIZE, |
| 114 | }, |
| 115 | }; |
| 116 | |
| 117 | static struct ramips_gpio_data rt288x_gpio_data = { |
| 118 | .chips = rt288x_gpio_chips, |
| 119 | .num_chips = ARRAY_SIZE(rt288x_gpio_chips), |
| 120 | }; |
| 121 | |
| 122 | static void rt288x_gpio_reserve(int first, int last) |
| 123 | { |
| 124 | for (; first <= last; first++) |
| 125 | gpio_request(first, "reserved"); |
| 126 | } |
| 127 | |
| 128 | void __init rt288x_gpio_init(u32 mode) |
| 129 | { |
| 130 | rt288x_sysc_wr(mode, SYSC_REG_GPIO_MODE); |
| 131 | |
| 132 | ramips_gpio_init(&rt288x_gpio_data); |
| 133 | if ((mode & RT2880_GPIO_MODE_I2C) == 0) |
| 134 | rt288x_gpio_reserve(1, 2); |
| 135 | |
| 136 | if ((mode & RT2880_GPIO_MODE_SPI) == 0) |
| 137 | rt288x_gpio_reserve(3, 6); |
| 138 | |
| 139 | if ((mode & RT2880_GPIO_MODE_UART0) == 0) |
| 140 | rt288x_gpio_reserve(7, 14); |
| 141 | |
| 142 | if ((mode & RT2880_GPIO_MODE_JTAG) == 0) |
| 143 | rt288x_gpio_reserve(17, 21); |
| 144 | |
| 145 | if ((mode & RT2880_GPIO_MODE_MDIO) == 0) |
| 146 | rt288x_gpio_reserve(22, 23); |
| 147 | |
| 148 | if ((mode & RT2880_GPIO_MODE_SDRAM) == 0) |
| 149 | rt288x_gpio_reserve(24, 39); |
| 150 | |
| 151 | if ((mode & RT2880_GPIO_MODE_PCI) == 0) |
| 152 | rt288x_gpio_reserve(40, 71); |
| 153 | } |
| 154 | |
