Root/target/linux/ramips/files/drivers/usb/dwc_otg/linux/dwc_otg_plat.h

1/* ==========================================================================
2 * $File: //dwh/usb_iip/dev/software/otg/linux/platform/dwc_otg_plat.h $
3 * $Revision: 1.2 $
4 * $Date: 2008-11-21 05:39:16 $
5 * $Change: 1064915 $
6 *
7 * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8 * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9 * otherwise expressly agreed to in writing between Synopsys and you.
10 *
11 * The Software IS NOT an item of Licensed Software or Licensed Product under
12 * any End User Software License Agreement or Agreement for Licensed Product
13 * with Synopsys or any supplement thereto. You are permitted to use and
14 * redistribute this Software in source and binary forms, with or without
15 * modification, provided that redistributions of source code must retain this
16 * notice. You may not view, use, disclose, copy or distribute this file or
17 * any information contained herein except pursuant to this license grant from
18 * Synopsys. If you do not agree with this notice, including the disclaimer
19 * below, then you are not authorized to use the Software.
20 *
21 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
31 * DAMAGE.
32 * ========================================================================== */
33
34#if !defined(__DWC_OTG_PLAT_H__)
35#define __DWC_OTG_PLAT_H__
36
37#include <linux/types.h>
38#include <linux/slab.h>
39#include <linux/list.h>
40#include <linux/delay.h>
41#include <asm/io.h>
42
43/**
44 * @file
45 *
46 * This file contains the Platform Specific constants, interfaces
47 * (functions and macros) for Linux.
48 *
49 */
50//#if !defined(__LINUX_ARM_ARCH__)
51//#error "The contents of this file is Linux specific!!!"
52//#endif
53
54/**
55 * Reads the content of a register.
56 *
57 * @param reg address of register to read.
58 * @return contents of the register.
59 *
60
61 * Usage:<br>
62 * <code>uint32_t dev_ctl = dwc_read_reg32(&dev_regs->dctl);</code>
63 */
64static __inline__ uint32_t dwc_read_reg32( volatile uint32_t *reg)
65{
66        return readl(reg);
67};
68
69/**
70 * Writes a register with a 32 bit value.
71 *
72 * @param reg address of register to read.
73 * @param value to write to _reg.
74 *
75 * Usage:<br>
76 * <code>dwc_write_reg32(&dev_regs->dctl, 0); </code>
77 */
78static __inline__ void dwc_write_reg32( volatile uint32_t *reg, const uint32_t value)
79{
80        writel( value, reg );
81};
82
83/**
84 * This function modifies bit values in a register. Using the
85 * algorithm: (reg_contents & ~clear_mask) | set_mask.
86 *
87 * @param reg address of register to read.
88 * @param clear_mask bit mask to be cleared.
89 * @param set_mask bit mask to be set.
90 *
91 * Usage:<br>
92 * <code> // Clear the SOF Interrupt Mask bit and <br>
93 * // set the OTG Interrupt mask bit, leaving all others as they were.
94 * dwc_modify_reg32(&dev_regs->gintmsk, DWC_SOF_INT, DWC_OTG_INT);</code>
95 */
96static __inline__
97 void dwc_modify_reg32( volatile uint32_t *reg, const uint32_t clear_mask, const uint32_t set_mask)
98{
99        writel( (readl(reg) & ~clear_mask) | set_mask, reg );
100};
101
102
103/**
104 * Wrapper for the OS micro-second delay function.
105 * @param[in] usecs Microseconds of delay
106 */
107static __inline__ void UDELAY( const uint32_t usecs )
108{
109        udelay( usecs );
110}
111
112/**
113 * Wrapper for the OS milli-second delay function.
114 * @param[in] msecs milliseconds of delay
115 */
116static __inline__ void MDELAY( const uint32_t msecs )
117{
118        mdelay( msecs );
119}
120
121/**
122 * Wrapper for the Linux spin_lock. On the ARM (Integrator)
123 * spin_lock() is a nop.
124 *
125 * @param lock Pointer to the spinlock.
126 */
127static __inline__ void SPIN_LOCK( spinlock_t *lock )
128{
129        spin_lock(lock);
130}
131
132/**
133 * Wrapper for the Linux spin_unlock. On the ARM (Integrator)
134 * spin_lock() is a nop.
135 *
136 * @param lock Pointer to the spinlock.
137 */
138static __inline__ void SPIN_UNLOCK( spinlock_t *lock )
139{
140        spin_unlock(lock);
141}
142
143/**
144 * Wrapper (macro) for the Linux spin_lock_irqsave. On the ARM
145 * (Integrator) spin_lock() is a nop.
146 *
147 * @param l Pointer to the spinlock.
148 * @param f unsigned long for irq flags storage.
149 */
150#define SPIN_LOCK_IRQSAVE( l, f ) spin_lock_irqsave(l,f);
151
152/**
153 * Wrapper (macro) for the Linux spin_unlock_irqrestore. On the ARM
154 * (Integrator) spin_lock() is a nop.
155 *
156 * @param l Pointer to the spinlock.
157 * @param f unsigned long for irq flags storage.
158 */
159#define SPIN_UNLOCK_IRQRESTORE( l,f ) spin_unlock_irqrestore(l,f);
160
161/*
162 * Debugging support vanishes in non-debug builds.
163 */
164
165
166/**
167 * The Debug Level bit-mask variable.
168 */
169extern uint32_t g_dbg_lvl;
170/**
171 * Set the Debug Level variable.
172 */
173static inline uint32_t SET_DEBUG_LEVEL( const uint32_t new )
174{
175        uint32_t old = g_dbg_lvl;
176        g_dbg_lvl = new;
177        return old;
178}
179
180/** When debug level has the DBG_CIL bit set, display CIL Debug messages. */
181#define DBG_CIL (0x2)
182/** When debug level has the DBG_CILV bit set, display CIL Verbose debug
183 * messages */
184#define DBG_CILV (0x20)
185/** When debug level has the DBG_PCD bit set, display PCD (Device) debug
186 * messages */
187#define DBG_PCD (0x4)
188/** When debug level has the DBG_PCDV set, display PCD (Device) Verbose debug
189 * messages */
190#define DBG_PCDV (0x40)
191/** When debug level has the DBG_HCD bit set, display Host debug messages */
192#define DBG_HCD (0x8)
193/** When debug level has the DBG_HCDV bit set, display Verbose Host debug
194 * messages */
195#define DBG_HCDV (0x80)
196/** When debug level has the DBG_HCD_URB bit set, display enqueued URBs in host
197 * mode. */
198#define DBG_HCD_URB (0x800)
199
200/** When debug level has any bit set, display debug messages */
201#define DBG_ANY (0xFF)
202
203/** All debug messages off */
204#define DBG_OFF 0
205
206/** Prefix string for DWC_DEBUG print macros. */
207#define USB_DWC "dwc_otg: "
208
209/**
210 * Print a debug message when the Global debug level variable contains
211 * the bit defined in <code>lvl</code>.
212 *
213 * @param[in] lvl - Debug level, use one of the DBG_ constants above.
214 * @param[in] x - like printf
215 *
216 * Example:<p>
217 * <code>
218 * DWC_DEBUGPL( DBG_ANY, "%s(%p)\n", __func__, _reg_base_addr);
219 * </code>
220 * <br>
221 * results in:<br>
222 * <code>
223 * usb-DWC_otg: dwc_otg_cil_init(ca867000)
224 * </code>
225 */
226#ifdef DEBUG
227
228# define DWC_DEBUGPL(lvl, x...) do{ if ((lvl)&g_dbg_lvl)printk( KERN_DEBUG USB_DWC x ); }while(0)
229# define DWC_DEBUGP(x...) DWC_DEBUGPL(DBG_ANY, x )
230
231# define CHK_DEBUG_LEVEL(level) ((level) & g_dbg_lvl)
232
233#else
234
235# define DWC_DEBUGPL(lvl, x...) do{}while(0)
236# define DWC_DEBUGP(x...)
237
238# define CHK_DEBUG_LEVEL(level) (0)
239
240#endif /*DEBUG*/
241
242/**
243 * Print an Error message.
244 */
245#define DWC_ERROR(x...) printk( KERN_ERR USB_DWC x )
246/**
247 * Print a Warning message.
248 */
249#define DWC_WARN(x...) printk( KERN_WARNING USB_DWC x )
250/**
251 * Print a notice (normal but significant message).
252 */
253#define DWC_NOTICE(x...) printk( KERN_NOTICE USB_DWC x )
254/**
255 * Basic message printing.
256 */
257#define DWC_PRINT(x...) printk( KERN_INFO USB_DWC x )
258
259#endif
260
261

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