Root/target/linux/generic-2.6/files/drivers/net/phy/ar8216.c

1/*
2 * ar8216.c: AR8216 switch driver
3 *
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/if.h>
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/list.h>
21#include <linux/if_ether.h>
22#include <linux/skbuff.h>
23#include <linux/netdevice.h>
24#include <linux/netlink.h>
25#include <linux/bitops.h>
26#include <net/genetlink.h>
27#include <linux/switch.h>
28#include <linux/delay.h>
29#include <linux/phy.h>
30#include <linux/netdevice.h>
31#include <linux/etherdevice.h>
32#include "ar8216.h"
33
34/* size of the vlan table */
35#define AR8X16_MAX_VLANS 128
36#define AR8X16_PROBE_RETRIES 10
37
38struct ar8216_priv {
39    struct switch_dev dev;
40    struct phy_device *phy;
41    u32 (*read)(struct ar8216_priv *priv, int reg);
42    void (*write)(struct ar8216_priv *priv, int reg, u32 val);
43    const struct net_device_ops *ndo_old;
44    struct net_device_ops ndo;
45    struct mutex reg_mutex;
46    int chip;
47
48    /* all fields below are cleared on reset */
49    bool vlan;
50    u16 vlan_id[AR8X16_MAX_VLANS];
51    u8 vlan_table[AR8X16_MAX_VLANS];
52    u8 vlan_tagged;
53    u16 pvid[AR8216_NUM_PORTS];
54};
55
56#define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
57
58static inline void
59split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
60{
61    regaddr >>= 1;
62    *r1 = regaddr & 0x1e;
63
64    regaddr >>= 5;
65    *r2 = regaddr & 0x7;
66
67    regaddr >>= 3;
68    *page = regaddr & 0x1ff;
69}
70
71static u32
72ar8216_mii_read(struct ar8216_priv *priv, int reg)
73{
74    struct phy_device *phy = priv->phy;
75    u16 r1, r2, page;
76    u16 lo, hi;
77
78    split_addr((u32) reg, &r1, &r2, &page);
79    phy->bus->write(phy->bus, 0x18, 0, page);
80    msleep(1); /* wait for the page switch to propagate */
81    lo = phy->bus->read(phy->bus, 0x10 | r2, r1);
82    hi = phy->bus->read(phy->bus, 0x10 | r2, r1 + 1);
83
84    return (hi << 16) | lo;
85}
86
87static void
88ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
89{
90    struct phy_device *phy = priv->phy;
91    u16 r1, r2, r3;
92    u16 lo, hi;
93
94    split_addr((u32) reg, &r1, &r2, &r3);
95    phy->bus->write(phy->bus, 0x18, 0, r3);
96    msleep(1); /* wait for the page switch to propagate */
97
98    lo = val & 0xffff;
99    hi = (u16) (val >> 16);
100    phy->bus->write(phy->bus, 0x10 | r2, r1 + 1, hi);
101    phy->bus->write(phy->bus, 0x10 | r2, r1, lo);
102}
103
104static u32
105ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
106{
107    u32 v;
108
109    v = priv->read(priv, reg);
110    v &= ~mask;
111    v |= val;
112    priv->write(priv, reg, v);
113
114    return v;
115}
116
117static inline int
118ar8216_id_chip(struct ar8216_priv *priv)
119{
120    u32 val;
121    u16 id;
122    int i;
123
124    val = ar8216_mii_read(priv, AR8216_REG_CTRL);
125    if (val == ~0)
126        return UNKNOWN;
127
128    id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
129    for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
130        u16 t;
131
132        val = ar8216_mii_read(priv, AR8216_REG_CTRL);
133        if (val == ~0)
134            return UNKNOWN;
135
136        t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
137        if (t != id)
138            return UNKNOWN;
139    }
140
141    switch (id) {
142    case 0x0101:
143        return AR8216;
144    case 0x1001:
145        return AR8316;
146    default:
147        printk(KERN_DEBUG
148            "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
149            (int)(id >> AR8216_CTRL_VERSION_S),
150            (int)(id & AR8216_CTRL_REVISION),
151            priv->phy->bus->read(priv->phy->bus, priv->phy->addr, 2),
152            priv->phy->bus->read(priv->phy->bus, priv->phy->addr, 3));
153
154        return UNKNOWN;
155    }
156}
157
158static int
159ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
160                struct switch_val *val)
161{
162    struct ar8216_priv *priv = to_ar8216(dev);
163    priv->vlan = !!val->value.i;
164    return 0;
165}
166
167static int
168ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
169                struct switch_val *val)
170{
171    struct ar8216_priv *priv = to_ar8216(dev);
172    val->value.i = priv->vlan;
173    return 0;
174}
175
176
177static int
178ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
179{
180    struct ar8216_priv *priv = to_ar8216(dev);
181
182    /* make sure no invalid PVIDs get set */
183
184    if (vlan >= dev->vlans)
185        return -EINVAL;
186
187    priv->pvid[port] = vlan;
188    return 0;
189}
190
191static int
192ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
193{
194    struct ar8216_priv *priv = to_ar8216(dev);
195    *vlan = priv->pvid[port];
196    return 0;
197}
198
199static int
200ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
201                struct switch_val *val)
202{
203    struct ar8216_priv *priv = to_ar8216(dev);
204    priv->vlan_id[val->port_vlan] = val->value.i;
205    return 0;
206}
207
208static int
209ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
210                struct switch_val *val)
211{
212    struct ar8216_priv *priv = to_ar8216(dev);
213    val->value.i = priv->vlan_id[val->port_vlan];
214    return 0;
215}
216
217
218static int
219ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
220{
221    struct ar8216_priv *priv = dev->phy_ptr;
222    unsigned char *buf;
223
224    if (unlikely(!priv))
225        goto error;
226
227    if (!priv->vlan)
228        goto send;
229
230    if (unlikely(skb_headroom(skb) < 2)) {
231        if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
232            goto error;
233    }
234
235    buf = skb_push(skb, 2);
236    buf[0] = 0x10;
237    buf[1] = 0x80;
238
239send:
240    return priv->ndo_old->ndo_start_xmit(skb, dev);
241
242error:
243    dev_kfree_skb_any(skb);
244    return 0;
245}
246
247static int
248ar8216_mangle_rx(struct sk_buff *skb, int napi)
249{
250    struct ar8216_priv *priv;
251    struct net_device *dev;
252    unsigned char *buf;
253    int port, vlan;
254
255    dev = skb->dev;
256    if (!dev)
257        goto error;
258
259    priv = dev->phy_ptr;
260    if (!priv)
261        goto error;
262
263    /* don't strip the header if vlan mode is disabled */
264    if (!priv->vlan)
265        goto recv;
266
267    /* strip header, get vlan id */
268    buf = skb->data;
269    skb_pull(skb, 2);
270
271    /* check for vlan header presence */
272    if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
273        goto recv;
274
275    port = buf[0] & 0xf;
276
277    /* no need to fix up packets coming from a tagged source */
278    if (priv->vlan_tagged & (1 << port))
279        goto recv;
280
281    /* lookup port vid from local table, the switch passes an invalid vlan id */
282    vlan = priv->vlan_id[priv->pvid[port]];
283
284    buf[14 + 2] &= 0xf0;
285    buf[14 + 2] |= vlan >> 8;
286    buf[15 + 2] = vlan & 0xff;
287
288recv:
289    skb->protocol = eth_type_trans(skb, skb->dev);
290
291    if (napi)
292        return netif_receive_skb(skb);
293    else
294        return netif_rx(skb);
295
296error:
297    /* no vlan? eat the packet! */
298    dev_kfree_skb_any(skb);
299    return NET_RX_DROP;
300}
301
302static int
303ar8216_netif_rx(struct sk_buff *skb)
304{
305    return ar8216_mangle_rx(skb, 0);
306}
307
308static int
309ar8216_netif_receive_skb(struct sk_buff *skb)
310{
311    return ar8216_mangle_rx(skb, 1);
312}
313
314
315static struct switch_attr ar8216_globals[] = {
316    {
317        .type = SWITCH_TYPE_INT,
318        .name = "enable_vlan",
319        .description = "Enable VLAN mode",
320        .set = ar8216_set_vlan,
321        .get = ar8216_get_vlan,
322        .max = 1
323    },
324};
325
326static struct switch_attr ar8216_port[] = {
327};
328
329static struct switch_attr ar8216_vlan[] = {
330    {
331        .type = SWITCH_TYPE_INT,
332        .name = "pvid",
333        .description = "VLAN ID",
334        .set = ar8216_set_vid,
335        .get = ar8216_get_vid,
336        .max = 4094,
337    },
338};
339
340
341static int
342ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
343{
344    struct ar8216_priv *priv = to_ar8216(dev);
345    u8 ports = priv->vlan_table[val->port_vlan];
346    int i;
347
348    val->len = 0;
349    for (i = 0; i < AR8216_NUM_PORTS; i++) {
350        struct switch_port *p;
351
352        if (!(ports & (1 << i)))
353            continue;
354
355        p = &val->value.ports[val->len++];
356        p->id = i;
357        if (priv->vlan_tagged & (1 << i))
358            p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
359        else
360            p->flags = 0;
361    }
362    return 0;
363}
364
365static int
366ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
367{
368    struct ar8216_priv *priv = to_ar8216(dev);
369    u8 *vt = &priv->vlan_table[val->port_vlan];
370    int i, j;
371
372    *vt = 0;
373    for (i = 0; i < val->len; i++) {
374        struct switch_port *p = &val->value.ports[i];
375
376        if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
377            priv->vlan_tagged |= (1 << p->id);
378        else {
379            priv->vlan_tagged &= ~(1 << p->id);
380            priv->pvid[p->id] = val->port_vlan;
381
382            /* make sure that an untagged port does not
383             * appear in other vlans */
384            for (j = 0; j < AR8X16_MAX_VLANS; j++) {
385                if (j == val->port_vlan)
386                    continue;
387                priv->vlan_table[j] &= ~(1 << p->id);
388            }
389        }
390
391        *vt |= 1 << p->id;
392    }
393    return 0;
394}
395
396static int
397ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
398{
399    int timeout = 20;
400
401    while ((priv->read(priv, reg) & mask) != val) {
402        if (timeout-- <= 0) {
403            printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
404            return 1;
405        }
406    }
407    return 0;
408}
409
410static void
411ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
412{
413    if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
414        return;
415    if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
416        val &= AR8216_VTUDATA_MEMBER;
417        val |= AR8216_VTUDATA_VALID;
418        priv->write(priv, AR8216_REG_VTU_DATA, val);
419    }
420    op |= AR8216_VTU_ACTIVE;
421    priv->write(priv, AR8216_REG_VTU, op);
422}
423
424static int
425ar8216_hw_apply(struct switch_dev *dev)
426{
427    struct ar8216_priv *priv = to_ar8216(dev);
428    u8 portmask[AR8216_NUM_PORTS];
429    int i, j;
430
431    mutex_lock(&priv->reg_mutex);
432    /* flush all vlan translation unit entries */
433    ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
434
435    memset(portmask, 0, sizeof(portmask));
436    if (priv->vlan) {
437        /* calculate the port destination masks and load vlans
438         * into the vlan translation unit */
439        for (j = 0; j < AR8X16_MAX_VLANS; j++) {
440            u8 vp = priv->vlan_table[j];
441
442            if (!vp)
443                continue;
444
445            for (i = 0; i < AR8216_NUM_PORTS; i++) {
446                u8 mask = (1 << i);
447                if (vp & mask)
448                    portmask[i] |= vp & ~mask;
449            }
450
451            ar8216_vtu_op(priv,
452                AR8216_VTU_OP_LOAD |
453                (priv->vlan_id[j] << AR8216_VTU_VID_S),
454                priv->vlan_table[j]);
455        }
456    } else {
457        /* vlan disabled:
458         * isolate all ports, but connect them to the cpu port */
459        for (i = 0; i < AR8216_NUM_PORTS; i++) {
460            if (i == AR8216_PORT_CPU)
461                continue;
462
463            portmask[i] = 1 << AR8216_PORT_CPU;
464            portmask[AR8216_PORT_CPU] |= (1 << i);
465        }
466    }
467
468    /* update the port destination mask registers and tag settings */
469    for (i = 0; i < AR8216_NUM_PORTS; i++) {
470        int egress, ingress;
471        int pvid;
472
473        if (priv->vlan) {
474            pvid = priv->vlan_id[priv->pvid[i]];
475        } else {
476            pvid = i;
477        }
478
479        if (priv->vlan && (priv->vlan_tagged & (1 << i))) {
480            egress = AR8216_OUT_ADD_VLAN;
481        } else {
482            egress = AR8216_OUT_STRIP_VLAN;
483        }
484        if (priv->vlan) {
485            ingress = AR8216_IN_SECURE;
486        } else {
487            ingress = AR8216_IN_PORT_ONLY;
488        }
489
490        ar8216_rmw(priv, AR8216_REG_PORT_CTRL(i),
491            AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
492            AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
493            AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
494            AR8216_PORT_CTRL_LEARN |
495              (priv->vlan && i == AR8216_PORT_CPU && (priv->chip == AR8216) ?
496               AR8216_PORT_CTRL_HEADER : 0) |
497              (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
498              (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
499
500        ar8216_rmw(priv, AR8216_REG_PORT_VLAN(i),
501            AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
502              AR8216_PORT_VLAN_DEFAULT_ID,
503            (portmask[i] << AR8216_PORT_VLAN_DEST_PORTS_S) |
504              (ingress << AR8216_PORT_VLAN_MODE_S) |
505              (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
506    }
507    mutex_unlock(&priv->reg_mutex);
508    return 0;
509}
510
511static int
512ar8316_hw_init(struct ar8216_priv *priv) {
513    static int initialized;
514    int i;
515    u32 val;
516    struct mii_bus *bus;
517
518    if (initialized)
519        return 0;
520
521    val = priv->read(priv, 0x8);
522
523    if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
524        /* value taken from Ubiquiti RouterStation Pro */
525        if (val == 0x81461bea) {
526            /* switch already intialized by bootloader */
527            initialized = true;
528            return 0;
529        }
530        priv->write(priv, 0x8, 0x81461bea);
531    } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
532        /* value taken from AVM Fritz!Box 7390 sources */
533        if (val == 0x010e5b71) {
534            /* switch already initialized by bootloader */
535            initialized = true;
536            return 0;
537        }
538        priv->write(priv, 0x8, 0x010e5b71);
539    } else {
540        /* no known value for phy interface */
541        printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
542            priv->phy->interface);
543        return -EINVAL;
544    }
545
546    /* standard atheros magic */
547    priv->write(priv, 0x38, 0xc000050e);
548
549    /* Initialize the ports */
550    bus = priv->phy->bus;
551    for (i = 0; i < 5; i++) {
552        if ((i == 4) &&
553            priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
554            /* work around for phy4 rgmii mode */
555            bus->write(bus, i, MII_ATH_DBG_ADDR, 0x12);
556            bus->write(bus, i, MII_ATH_DBG_DATA, 0x480c);
557            /* rx delay */
558            bus->write(bus, i, MII_ATH_DBG_ADDR, 0x0);
559            bus->write(bus, i, MII_ATH_DBG_DATA, 0x824e);
560            /* tx delay */
561            bus->write(bus, i, MII_ATH_DBG_ADDR, 0x5);
562            bus->write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
563            msleep(1000);
564        }
565
566        /* initialize the port itself */
567        bus->write(bus, i, MII_ADVERTISE,
568            ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
569        bus->write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
570        bus->write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
571        msleep(1000);
572    }
573    initialized = true;
574    return 0;
575}
576
577static int
578ar8216_reset_switch(struct switch_dev *dev)
579{
580    struct ar8216_priv *priv = to_ar8216(dev);
581    int i;
582
583    mutex_lock(&priv->reg_mutex);
584    memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
585        offsetof(struct ar8216_priv, vlan));
586    for (i = 0; i < AR8X16_MAX_VLANS; i++) {
587        priv->vlan_id[i] = i;
588    }
589    for (i = 0; i < AR8216_NUM_PORTS; i++) {
590        /* Enable port learning and tx */
591        priv->write(priv, AR8216_REG_PORT_CTRL(i),
592            AR8216_PORT_CTRL_LEARN |
593            (4 << AR8216_PORT_CTRL_STATE_S));
594
595        priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
596
597        /* Configure all PHYs */
598        if (i == AR8216_PORT_CPU) {
599            priv->write(priv, AR8216_REG_PORT_STATUS(i),
600                AR8216_PORT_STATUS_LINK_UP |
601                ((priv->chip == AR8316) ?
602                    AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
603                AR8216_PORT_STATUS_TXMAC |
604                AR8216_PORT_STATUS_RXMAC |
605                ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
606                ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
607                AR8216_PORT_STATUS_DUPLEX);
608        } else {
609            priv->write(priv, AR8216_REG_PORT_STATUS(i),
610                AR8216_PORT_STATUS_LINK_AUTO);
611        }
612    }
613    /* XXX: undocumented magic from atheros, required! */
614    priv->write(priv, 0x38, 0xc000050e);
615
616    if (priv->chip == AR8216) {
617        ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
618            AR8216_GCTRL_MTU, 1518 + 8 + 2);
619    } else if (priv->chip == AR8316) {
620        /* enable jumbo frames */
621        ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
622            AR8316_GCTRL_MTU, 9018 + 8 + 2);
623    }
624
625    if (priv->chip == AR8316) {
626        /* enable cpu port to receive multicast and broadcast frames */
627        priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
628    }
629    mutex_unlock(&priv->reg_mutex);
630    return ar8216_hw_apply(dev);
631}
632
633
634static const struct switch_dev_ops ar8216_ops = {
635    .attr_global = {
636        .attr = ar8216_globals,
637        .n_attr = ARRAY_SIZE(ar8216_globals),
638    },
639    .attr_port = {
640        .attr = ar8216_port,
641        .n_attr = ARRAY_SIZE(ar8216_port),
642    },
643    .attr_vlan = {
644        .attr = ar8216_vlan,
645        .n_attr = ARRAY_SIZE(ar8216_vlan),
646    },
647    .get_port_pvid = ar8216_get_pvid,
648    .set_port_pvid = ar8216_set_pvid,
649    .get_vlan_ports = ar8216_get_ports,
650    .set_vlan_ports = ar8216_set_ports,
651    .apply_config = ar8216_hw_apply,
652    .reset_switch = ar8216_reset_switch,
653};
654
655static int
656ar8216_config_init(struct phy_device *pdev)
657{
658    struct ar8216_priv *priv;
659    struct net_device *dev = pdev->attached_dev;
660    struct switch_dev *swdev;
661    int ret;
662
663    priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
664    if (priv == NULL)
665        return -ENOMEM;
666
667    priv->phy = pdev;
668
669    priv->chip = ar8216_id_chip(priv);
670
671    if (pdev->addr == 0)
672        printk(KERN_INFO "%s: AR%d switch driver attached.\n",
673            pdev->attached_dev->name, priv->chip);
674
675
676    if (pdev->addr != 0) {
677        if (priv->chip == AR8316) {
678            pdev->supported |= SUPPORTED_1000baseT_Full;
679            pdev->advertising |= ADVERTISED_1000baseT_Full;
680        }
681        kfree(priv);
682        return 0;
683    }
684
685    pdev->supported = priv->chip == AR8316 ?
686        SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
687    pdev->advertising = pdev->supported;
688
689    mutex_init(&priv->reg_mutex);
690    priv->read = ar8216_mii_read;
691    priv->write = ar8216_mii_write;
692
693    pdev->priv = priv;
694
695    swdev = &priv->dev;
696    swdev->cpu_port = AR8216_PORT_CPU;
697    swdev->ops = &ar8216_ops;
698
699    if (priv->chip == AR8316) {
700        swdev->name = "Atheros AR8316";
701        swdev->vlans = AR8X16_MAX_VLANS;
702        /* port 5 connected to the other mac, therefore unusable */
703        swdev->ports = (AR8216_NUM_PORTS - 1);
704    } else {
705        swdev->name = "Atheros AR8216";
706        swdev->vlans = AR8216_NUM_VLANS;
707        swdev->ports = AR8216_NUM_PORTS;
708    }
709
710    if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
711        kfree(priv);
712        goto done;
713    }
714
715    if (priv->chip == AR8316) {
716        ret = ar8316_hw_init(priv);
717        if (ret) {
718            kfree(priv);
719            goto done;
720        }
721    }
722
723    ret = ar8216_reset_switch(&priv->dev);
724    if (ret) {
725        kfree(priv);
726        goto done;
727    }
728
729    dev->phy_ptr = priv;
730
731    /* VID fixup only needed on ar8216 */
732    if (pdev->addr == 0 && priv->chip == AR8216) {
733        pdev->pkt_align = 2;
734        pdev->netif_receive_skb = ar8216_netif_receive_skb;
735        pdev->netif_rx = ar8216_netif_rx;
736        priv->ndo_old = dev->netdev_ops;
737        memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
738        priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
739        dev->netdev_ops = &priv->ndo;
740    }
741
742done:
743    return ret;
744}
745
746static int
747ar8216_read_status(struct phy_device *phydev)
748{
749    struct ar8216_priv *priv = phydev->priv;
750    int ret;
751    if (phydev->addr != 0) {
752        return genphy_read_status(phydev);
753    }
754
755    phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
756    phydev->duplex = DUPLEX_FULL;
757    phydev->link = 1;
758
759    /* flush the address translation unit */
760    mutex_lock(&priv->reg_mutex);
761    ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
762
763    if (!ret)
764        priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
765    else
766        ret = -ETIMEDOUT;
767    mutex_unlock(&priv->reg_mutex);
768
769    phydev->state = PHY_RUNNING;
770    netif_carrier_on(phydev->attached_dev);
771    phydev->adjust_link(phydev->attached_dev);
772
773    return ret;
774}
775
776static int
777ar8216_config_aneg(struct phy_device *phydev)
778{
779    if (phydev->addr == 0)
780        return 0;
781
782    return genphy_config_aneg(phydev);
783}
784
785static int
786ar8216_probe(struct phy_device *pdev)
787{
788    struct ar8216_priv priv;
789    u16 chip;
790
791    priv.phy = pdev;
792    chip = ar8216_id_chip(&priv);
793    if (chip == UNKNOWN)
794        return -ENODEV;
795
796    return 0;
797}
798
799static void
800ar8216_remove(struct phy_device *pdev)
801{
802    struct ar8216_priv *priv = pdev->priv;
803    struct net_device *dev = pdev->attached_dev;
804
805    if (!priv)
806        return;
807
808    if (priv->ndo_old && dev)
809        dev->netdev_ops = priv->ndo_old;
810    if (pdev->addr == 0)
811        unregister_switch(&priv->dev);
812    kfree(priv);
813}
814
815static struct phy_driver ar8216_driver = {
816    .phy_id = 0x004d0000,
817    .name = "Atheros AR8216/AR8316",
818    .phy_id_mask = 0xffff0000,
819    .features = PHY_BASIC_FEATURES,
820    .probe = ar8216_probe,
821    .remove = ar8216_remove,
822    .config_init = &ar8216_config_init,
823    .config_aneg = &ar8216_config_aneg,
824    .read_status = &ar8216_read_status,
825    .driver = { .owner = THIS_MODULE },
826};
827
828int __init
829ar8216_init(void)
830{
831    return phy_driver_register(&ar8216_driver);
832}
833
834void __exit
835ar8216_exit(void)
836{
837    phy_driver_unregister(&ar8216_driver);
838}
839
840module_init(ar8216_init);
841module_exit(ar8216_exit);
842MODULE_LICENSE("GPL");
843
844

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