| 1 | --- a/arch/mips/ar7/clock.c |
| 2 | +++ b/arch/mips/ar7/clock.c |
| 3 | @@ -232,12 +232,12 @@ static void tnetd7300_set_clock(u32 shif |
| 4 | calculate(base_clock, frequency, &prediv, &postdiv, &mul); |
| 5 | |
| 6 | writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl); |
| 7 | - msleep(1); |
| 8 | + mdelay(1); |
| 9 | writel(4, &clock->pll); |
| 10 | while (readl(&clock->pll) & PLL_STATUS) |
| 11 | ; |
| 12 | writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); |
| 13 | - msleep(75); |
| 14 | + mdelay(75); |
| 15 | } |
| 16 | |
| 17 | static void __init tnetd7300_init_clocks(void) |
| 18 | @@ -407,7 +407,7 @@ static void __init tnetd7200_init_clocks |
| 19 | iounmap(bootcr); |
| 20 | } |
| 21 | |
| 22 | -int __init ar7_init_clocks(void) |
| 23 | +void __init ar7_init_clocks(void) |
| 24 | { |
| 25 | switch (ar7_chip_id()) { |
| 26 | case AR7_CHIP_7100: |
| 27 | @@ -421,7 +421,4 @@ int __init ar7_init_clocks(void) |
| 28 | default: |
| 29 | break; |
| 30 | } |
| 31 | - |
| 32 | - return 0; |
| 33 | } |
| 34 | -arch_initcall(ar7_init_clocks); |
| 35 | --- a/arch/mips/ar7/time.c |
| 36 | +++ b/arch/mips/ar7/time.c |
| 37 | @@ -26,5 +26,7 @@ |
| 38 | |
| 39 | void __init plat_time_init(void) |
| 40 | { |
| 41 | + ar7_init_clocks(); |
| 42 | + |
| 43 | mips_hpt_frequency = ar7_cpu_freq() / 2; |
| 44 | } |
| 45 | --- a/arch/mips/include/asm/mach-ar7/ar7.h |
| 46 | +++ b/arch/mips/include/asm/mach-ar7/ar7.h |
| 47 | @@ -178,4 +178,6 @@ static inline void ar7_device_off(u32 bi |
| 48 | msleep(20); |
| 49 | } |
| 50 | |
| 51 | +extern void __init ar7_init_clocks(void); |
| 52 | + |
| 53 | #endif /* __AR7_H__ */ |
| 54 | |
