| 1 | /* |
| 2 | * D-Link DIR-600 rev. A1 board support |
| 3 | * |
| 4 | * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/mtd/mtd.h> |
| 12 | #include <linux/mtd/partitions.h> |
| 13 | |
| 14 | #include <asm/mach-ar71xx/ar71xx.h> |
| 15 | |
| 16 | #include "machtype.h" |
| 17 | #include "devices.h" |
| 18 | #include "dev-m25p80.h" |
| 19 | #include "dev-ap91-pci.h" |
| 20 | #include "dev-gpio-buttons.h" |
| 21 | #include "dev-leds-gpio.h" |
| 22 | #include "nvram.h" |
| 23 | |
| 24 | #define DIR_600_A1_GPIO_LED_WPS 0 |
| 25 | #define DIR_600_A1_GPIO_LED_POWER_AMBER 1 |
| 26 | #define DIR_600_A1_GPIO_LED_POWER_GREEN 6 |
| 27 | |
| 28 | #define DIR_600_A1_GPIO_BTN_RESET 8 |
| 29 | #define DIR_600_A1_GPIO_BTN_WPS 12 |
| 30 | |
| 31 | #define DIR_600_A1_BUTTONS_POLL_INTERVAL 20 |
| 32 | |
| 33 | #define DIR_600_A1_NVRAM_ADDR 0x1f030000 |
| 34 | #define DIR_600_A1_NVRAM_SIZE 0x10000 |
| 35 | |
| 36 | #ifdef CONFIG_MTD_PARTITIONS |
| 37 | static struct mtd_partition dir_600_a1_partitions[] = { |
| 38 | { |
| 39 | .name = "u-boot", |
| 40 | .offset = 0, |
| 41 | .size = 0x030000, |
| 42 | .mask_flags = MTD_WRITEABLE, |
| 43 | }, { |
| 44 | .name = "nvram", |
| 45 | .offset = 0x030000, |
| 46 | .size = 0x010000, |
| 47 | }, { |
| 48 | .name = "kernel", |
| 49 | .offset = 0x040000, |
| 50 | .size = 0x0e0000, |
| 51 | }, { |
| 52 | .name = "rootfs", |
| 53 | .offset = 0x120000, |
| 54 | .size = 0x2c0000, |
| 55 | }, { |
| 56 | .name = "mac", |
| 57 | .offset = 0x3e0000, |
| 58 | .size = 0x010000, |
| 59 | .mask_flags = MTD_WRITEABLE, |
| 60 | }, { |
| 61 | .name = "art", |
| 62 | .offset = 0x3f0000, |
| 63 | .size = 0x010000, |
| 64 | .mask_flags = MTD_WRITEABLE, |
| 65 | }, { |
| 66 | .name = "firmware", |
| 67 | .offset = 0x040000, |
| 68 | .size = 0x3a0000, |
| 69 | } |
| 70 | }; |
| 71 | #endif /* CONFIG_MTD_PARTITIONS */ |
| 72 | |
| 73 | static struct flash_platform_data dir_600_a1_flash_data = { |
| 74 | #ifdef CONFIG_MTD_PARTITIONS |
| 75 | .parts = dir_600_a1_partitions, |
| 76 | .nr_parts = ARRAY_SIZE(dir_600_a1_partitions), |
| 77 | #endif |
| 78 | }; |
| 79 | |
| 80 | static struct gpio_led dir_600_a1_leds_gpio[] __initdata = { |
| 81 | { |
| 82 | .name = "dir-600-a1:green:power", |
| 83 | .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN, |
| 84 | }, { |
| 85 | .name = "dir-600-a1:amber:power", |
| 86 | .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER, |
| 87 | }, { |
| 88 | .name = "dir-600-a1:blue:wps", |
| 89 | .gpio = DIR_600_A1_GPIO_LED_WPS, |
| 90 | .active_low = 1, |
| 91 | } |
| 92 | }; |
| 93 | |
| 94 | static struct gpio_button dir_600_a1_gpio_buttons[] __initdata = { |
| 95 | { |
| 96 | .desc = "reset", |
| 97 | .type = EV_KEY, |
| 98 | .code = BTN_0, |
| 99 | .threshold = 3, |
| 100 | .gpio = DIR_600_A1_GPIO_BTN_RESET, |
| 101 | .active_low = 1, |
| 102 | }, { |
| 103 | .desc = "wps", |
| 104 | .type = EV_KEY, |
| 105 | .code = BTN_1, |
| 106 | .threshold = 3, |
| 107 | .gpio = DIR_600_A1_GPIO_BTN_WPS, |
| 108 | .active_low = 1, |
| 109 | } |
| 110 | }; |
| 111 | |
| 112 | static void __init dir_600_a1_setup(void) |
| 113 | { |
| 114 | const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR); |
| 115 | u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); |
| 116 | u8 mac_buff[6]; |
| 117 | u8 *mac = NULL; |
| 118 | |
| 119 | if (nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE, |
| 120 | "lan_mac=", mac_buff) == 0) |
| 121 | mac = mac_buff; |
| 122 | |
| 123 | ar71xx_add_device_m25p80(&dir_600_a1_flash_data); |
| 124 | |
| 125 | ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio), |
| 126 | dir_600_a1_leds_gpio); |
| 127 | |
| 128 | ar71xx_add_device_gpio_buttons(-1, DIR_600_A1_BUTTONS_POLL_INTERVAL, |
| 129 | ARRAY_SIZE(dir_600_a1_gpio_buttons), |
| 130 | dir_600_a1_gpio_buttons); |
| 131 | |
| 132 | ar71xx_eth1_data.has_ar7240_switch = 1; |
| 133 | ar71xx_set_mac_base(mac); |
| 134 | |
| 135 | /* WAN port */ |
| 136 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
| 137 | ar71xx_eth0_data.speed = SPEED_100; |
| 138 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
| 139 | |
| 140 | /* LAN ports */ |
| 141 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
| 142 | ar71xx_eth1_data.speed = SPEED_1000; |
| 143 | ar71xx_eth1_data.duplex = DUPLEX_FULL; |
| 144 | |
| 145 | ar71xx_add_device_mdio(0x0); |
| 146 | ar71xx_add_device_eth(1); |
| 147 | ar71xx_add_device_eth(0); |
| 148 | |
| 149 | ap91_pci_init(ee, mac); |
| 150 | } |
| 151 | |
| 152 | MIPS_MACHINE(AR71XX_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1", |
| 153 | dir_600_a1_setup); |
| 154 | |
