Root/target/linux/brcm47xx/patches-2.6.32/920-cache-wround.patch

1--- a/arch/mips/include/asm/r4kcache.h
2+++ b/arch/mips/include/asm/r4kcache.h
3@@ -20,10 +20,25 @@
4 #ifdef CONFIG_BCM47XX
5 #include <asm/paccess.h>
6 #include <linux/ssb/ssb.h>
7-#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE)))
8+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
9+
10+static inline unsigned long bcm4710_dummy_rreg(void) {
11+ return (*(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE)));
12+}
13+
14+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void*)(addr))
15+
16+static inline unsigned long bcm4710_fill_tlb(void *addr) {
17+ return (*(unsigned long *)addr);
18+}
19+
20+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void*)(addr))
21+
22+static inline void bcm4710_protected_fill_tlb(void *addr) {
23+ unsigned long x;
24+ get_dbe(x, (unsigned long *)addr);;
25+}
26 
27-#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
28-#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
29 #else
30 #define BCM4710_DUMMY_RREG()
31 
32--- a/arch/mips/mm/tlbex.c
33+++ b/arch/mips/mm/tlbex.c
34@@ -595,6 +595,9 @@ build_get_pgde32(u32 **p, unsigned int t
35 #endif
36     uasm_i_addu(p, ptr, tmp, ptr);
37 #else
38+#ifdef CONFIG_BCM47XX
39+ uasm_i_nop(p);
40+#endif
41     UASM_i_LA_mostly(p, ptr, pgdc);
42 #endif
43     uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
44@@ -738,12 +741,12 @@ static void __cpuinit build_r4000_tlb_re
45         /* No need for uasm_i_nop */
46     }
47 
48-#ifdef CONFIG_BCM47XX
49- uasm_i_nop(&p);
50-#endif
51 #ifdef CONFIG_64BIT
52     build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
53 #else
54+# ifdef CONFIG_BCM47XX
55+ uasm_i_nop(&p);
56+# endif
57     build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
58 #endif
59 
60@@ -755,6 +758,9 @@ static void __cpuinit build_r4000_tlb_re
61     build_update_entries(&p, K0, K1);
62     build_tlb_write_entry(&p, &l, &r, tlb_random);
63     uasm_l_leave(&l, p);
64+#ifdef CONFIG_BCM47XX
65+ uasm_i_nop(&p);
66+#endif
67     uasm_i_eret(&p); /* return from trap */
68 
69 #ifdef CONFIG_HUGETLB_PAGE
70@@ -1193,12 +1199,12 @@ build_r4000_tlbchange_handler_head(u32 *
71                    struct uasm_reloc **r, unsigned int pte,
72                    unsigned int ptr)
73 {
74-#ifdef CONFIG_BCM47XX
75- uasm_i_nop(p);
76-#endif
77 #ifdef CONFIG_64BIT
78     build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */
79 #else
80+# ifdef CONFIG_BCM47XX
81+ uasm_i_nop(p);
82+# endif
83     build_get_pgde32(p, pte, ptr); /* get pgd in ptr */
84 #endif
85 
86@@ -1235,6 +1241,9 @@ build_r4000_tlbchange_handler_tail(u32 *
87     build_update_entries(p, tmp, ptr);
88     build_tlb_write_entry(p, l, r, tlb_indexed);
89     uasm_l_leave(l, *p);
90+#ifdef CONFIG_BCM47XX
91+ uasm_i_nop(p);
92+#endif
93     uasm_i_eret(p); /* return from trap */
94 
95 #ifdef CONFIG_64BIT
96--- a/arch/mips/kernel/genex.S
97+++ b/arch/mips/kernel/genex.S
98@@ -22,6 +22,19 @@
99 #include <asm/page.h>
100 #include <asm/thread_info.h>
101 
102+#ifdef CONFIG_BCM47XX
103+# ifdef eret
104+# undef eret
105+# endif
106+# define eret \
107+ .set push; \
108+ .set noreorder; \
109+ nop; \
110+ nop; \
111+ eret; \
112+ .set pop;
113+#endif
114+
115 #define PANIC_PIC(msg) \
116         .set push; \
117         .set reorder; \
118@@ -54,7 +67,6 @@ NESTED(except_vec3_generic, 0, sp)
119     .set noat
120 #ifdef CONFIG_BCM47XX
121     nop
122- nop
123 #endif
124 #if R5432_CP0_INTERRUPT_WAR
125     mfc0 k0, CP0_INDEX
126@@ -79,6 +91,9 @@ NESTED(except_vec3_r4000, 0, sp)
127     .set push
128     .set mips3
129     .set noat
130+#ifdef CONFIG_BCM47XX
131+ nop
132+#endif
133     mfc0 k1, CP0_CAUSE
134     li k0, 31<<2
135     andi k1, k1, 0x7c
136

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