Root/package/ar7-atm/patches-D7.04.03.00/160-module-params.patch

1--- a/tn7atm.c
2+++ b/tn7atm.c
3@@ -87,6 +87,146 @@
4 MODULE_LICENSE("GPL");
5 MODULE_DESCRIPTION ("Tnetd73xx ATM Device Driver");
6 MODULE_AUTHOR ("Zhicheng Tang");
7+
8+int mp_sar_ipacemax = -1;
9+module_param_named(ipacemax, mp_sar_ipacemax, int, 0);
10+MODULE_PARM_DESC(ipacemax, "Interrupt pacing");
11+
12+char *mp_macc = NULL;
13+module_param_named(macc, mp_macc, charp, 0);
14+MODULE_PARM_DESC(macc, "MAC address");
15+
16+int mp_dsp_noboost = -1;
17+module_param_named(dsp_noboost, mp_dsp_noboost, int, 0);
18+MODULE_PARM_DESC(dsp_noboost, "Suppress DSP frequency boost");
19+
20+int mp_dsp_freq = -1;
21+module_param_named(dsp_freq, mp_dsp_freq, int, 0);
22+MODULE_PARM_DESC(dsp_freq, "Frequency to boost the DSP to");
23+
24+char *mp_featctl0 = NULL;
25+module_param_named(featctl0, mp_featctl0, charp, 0);
26+MODULE_PARM_DESC(featctl0, "DSL feature control 0");
27+
28+char *mp_featctl1 = NULL;
29+module_param_named(featctl1, mp_featctl1, charp, 0);
30+MODULE_PARM_DESC(featctl1, "DSL feature control 1");
31+
32+char *mp_phyctl0 = NULL;
33+module_param_named(phyctl0, mp_phyctl0, charp, 0);
34+MODULE_PARM_DESC(phyctl0, "DSL PHY control 0");
35+
36+char *mp_phyctl1 = NULL;
37+module_param_named(phyctl1, mp_phyctl1, charp, 0);
38+MODULE_PARM_DESC(phyctl1, "DSL PHY control 1");
39+
40+int mp_turbodsl = -1;
41+module_param_named(turbodsl, mp_turbodsl, int, 0);
42+MODULE_PARM_DESC(turbodsl, "Enable TurboDSL");
43+
44+int mp_sar_rxbuf = -1;
45+module_param_named(sar_rxbuf, mp_sar_rxbuf, int, 0);
46+MODULE_PARM_DESC(sar_rxbuf, "SAR RxBuf size");
47+
48+int mp_sar_rxmax = -1;
49+module_param_named(sar_rxmax, mp_sar_rxmax, int, 0);
50+MODULE_PARM_DESC(sar_rxmax, "SAR RxMax size");
51+
52+int mp_sar_txbuf = -1;
53+module_param_named(sar_txbuf, mp_sar_txbuf, int, 0);
54+MODULE_PARM_DESC(sar_txbuf, "SAR TxBuf size");
55+
56+int mp_sar_txmax = -1;
57+module_param_named(sar_txmax, mp_sar_txmax, int, 0);
58+MODULE_PARM_DESC(sar_txmax, "SAR TxMax size");
59+
60+char *mp_modulation = NULL;
61+module_param_named(modulation, mp_modulation, charp, 0);
62+MODULE_PARM_DESC(modulation, "Modulation");
63+
64+int mp_fine_gain_control = -1;
65+module_param_named(fine_gain_control, mp_fine_gain_control, int, 0);
66+MODULE_PARM_DESC(fine_gain_control, "Fine gain control");
67+
68+int mp_fine_gain_value = -1;
69+module_param_named(fine_gain_value, mp_fine_gain_value, int, 0);
70+MODULE_PARM_DESC(fine_gain_value, "Fine gain value");
71+
72+int mp_enable_margin_retrain = -1;
73+module_param_named(enable_margin_retrain, mp_enable_margin_retrain, int, 0);
74+MODULE_PARM_DESC(enable_margin_retrain, "Enable margin retrain");
75+
76+int mp_margin_threshold = -1;
77+module_param_named(margin_threshold, mp_margin_threshold, int, 0);
78+MODULE_PARM_DESC(margin_threshold, "Margin retrain treshold");
79+
80+int mp_enable_rate_adapt = -1;
81+module_param_named(enable_rate_adapt, mp_enable_rate_adapt, int, 0);
82+MODULE_PARM_DESC(enable_rate_adapt, "Enable rate adaption");
83+
84+int mp_powercutback = -1;
85+module_param_named(powercutback, mp_powercutback, int, 0);
86+MODULE_PARM_DESC(powercutback, "Enable / disable powercutback");
87+
88+int mp_trellis = -1;
89+module_param_named(trellis, mp_trellis, int, 0);
90+MODULE_PARM_DESC(trellis, "Enable / disable trellis coding");
91+
92+int mp_bitswap = -1;
93+module_param_named(bitswap, mp_bitswap, int, 0);
94+MODULE_PARM_DESC(bitswap, "Enable / disable bitswap");
95+
96+int mp_maximum_bits_per_carrier = -1;
97+module_param_named(maximum_bits_per_carrier, mp_maximum_bits_per_carrier, int, 0);
98+MODULE_PARM_DESC(maximum_bits_per_carrier, "Maximum bits per carrier");
99+
100+int mp_maximum_interleave_depth = -1;
101+module_param_named(maximum_interleave_depth, mp_maximum_interleave_depth, int, 0);
102+MODULE_PARM_DESC(maximum_interleave_depth, "Maximum interleave depth");
103+
104+int mp_pair_selection = -1;
105+module_param_named(pair_selection, mp_pair_selection, int, 0);
106+MODULE_PARM_DESC(pair_selection, "Pair selection");
107+
108+int mp_dgas_polarity = -1;
109+module_param_named(dgas_polarity, mp_dgas_polarity, int, 0);
110+MODULE_PARM_DESC(dgas_polarity, "DGAS polarity");
111+
112+int mp_los_alarm = -1;
113+module_param_named(los_alarm, mp_los_alarm, int, 0);
114+MODULE_PARM_DESC(los_alarm, "LOS alarm");
115+
116+char *mp_eoc_vendor_id = NULL;
117+module_param_named(eoc_vendor_id, mp_eoc_vendor_id, charp, 0);
118+MODULE_PARM_DESC(eoc_vendor_id, "EOC vendor id");
119+
120+int mp_eoc_vendor_revision = -1;
121+module_param_named(eoc_vendor_revision, mp_eoc_vendor_revision, int, 0);
122+MODULE_PARM_DESC(eoc_vendor_revision, "EOC vendor revision");
123+
124+char *mp_eoc_vendor_serialnum = NULL;
125+module_param_named(eoc_vendor_serialnum, mp_eoc_vendor_serialnum, charp, 0);
126+MODULE_PARM_DESC(eoc_vendor_serialnum, "EOC vendor serial number");
127+
128+char *mp_invntry_vernum = NULL;
129+module_param_named(invntry_vernum, mp_invntry_vernum, charp, 0);
130+MODULE_PARM_DESC(invntry_vernum, "Inventory revision number");
131+
132+int mp_dsl_bit_tmode = -1;
133+module_param_named(dsl_bit_tmode, mp_dsl_bit_tmode, int, 0);
134+MODULE_PARM_DESC(dsl_bit_tmode, "DSL bit training mode");
135+
136+int mp_high_precision = -1;
137+module_param_named(high_precision, mp_high_precision, int, 0);
138+MODULE_PARM_DESC(high_precision, "High precision");
139+
140+int mp_autopvc_enable = -1;
141+module_param_named(autopvc_enable, mp_autopvc_enable, int, 0);
142+MODULE_PARM_DESC(autopvc_enable, "Enable / disable automatic PVC");
143+
144+int mp_oam_lb_timeout = -1;
145+module_param_named(oam_lb_timeout, mp_oam_lb_timeout, int, 0);
146+MODULE_PARM_DESC(oam_lb_timeout, "OAM LB timeout");
147 #endif
148 
149 #ifndef TRUE
150@@ -655,9 +795,9 @@ static int __init tn7atm_irq_request (st
151    * interrupt pacing
152    */
153   ptr = prom_getenv ("sar_ipacemax");
154- if (ptr)
155+ if (ptr || mp_sar_ipacemax != -1)
156   {
157- def_sar_inter_pace = os_atoi (ptr);
158+ def_sar_inter_pace = mp_sar_ipacemax == -1 ? os_atoi (ptr) : mp_sar_ipacemax;
159   }
160 /* avalanche_request_pacing (priv->sar_irq, ATM_SAR_INT_PACING_BLOCK_NUM,
161                             def_sar_inter_pace);*/
162@@ -797,7 +937,7 @@ static int __init tn7atm_get_ESI (struct
163   char esi_addr[ESI_LEN] = { 0x00, 0x00, 0x11, 0x22, 0x33, 0x44 };
164   char *esiaddr_str = NULL;
165 
166- esiaddr_str = prom_getenv ("maca");
167+ esiaddr_str = mp_macc ? mp_macc : prom_getenv ("maca");
168 
169   if (!esiaddr_str)
170   {
171@@ -1930,15 +2070,15 @@ static int tn7atm_autoDetectDspBoost (vo
172 //UR8_MERGE_END CQ10450*
173 
174   cp = prom_getenv ("dsp_noboost");
175- if (cp)
176+ if (cp || mp_dsp_noboost != -1)
177   {
178- dsp_noboost = os_atoi (cp);
179+ dsp_noboost = mp_dsp_noboost == -1 ? os_atoi (cp) : mp_dsp_noboost;
180   }
181 
182   cp = (char *) prom_getenv ("dsp_freq");
183- if (cp)
184+ if (cp || mp_dsp_freq != -1)
185   {
186- dspfreq = os_atoi (cp);
187+ dspfreq = mp_dsp_freq == -1 ? os_atoi (cp) : mp_dsp_freq;
188     if (dspfreq == 250)
189     {
190       boostDsp = 1;
191@@ -2187,8 +2327,9 @@ static int __init tn7atm_init (struct at
192   // Inter-Op DSL phy Control
193   // Note the setting of _dsl_Feature_0 and _dsl_Feature_1 must before
194   // dslhal_api_dslStartup (in tn7dsl_init()).
195- if ((ptr = prom_getenv ("DSL_FEATURE_CNTL_0")) != NULL)
196+ if ((ptr = prom_getenv ("DSL_FEATURE_CNTL_0")) != NULL || mp_featctl0 != NULL)
197   {
198+ if (mp_featctl0 != NULL) ptr = mp_featctl0;
199     if ((ptr[0] == '0') && (ptr[1] == 'x')) // skip 0x before pass to
200       // os_atoh
201       ptr += 2;
202@@ -2196,8 +2337,9 @@ static int __init tn7atm_init (struct at
203     _dsl_Feature_0_defined = 1;
204   }
205 
206- if ((ptr = prom_getenv ("DSL_FEATURE_CNTL_1")) != NULL)
207+ if ((ptr = prom_getenv ("DSL_FEATURE_CNTL_1")) != NULL || mp_featctl1 != NULL)
208   {
209+ if (mp_featctl1 != NULL) ptr = mp_featctl1;
210     if ((ptr[0] == '0') && (ptr[1] == 'x')) // skip 0x before pass to
211       // os_atoh
212       ptr += 2;
213@@ -2209,8 +2351,9 @@ static int __init tn7atm_init (struct at
214   // DSL phy Feature Control
215   // Note the setting of _dsl_PhyControl_0 and _dsl_PhyControl_1 must before
216   // dslhal_api_dslStartup (in tn7dsl_init()).
217- if ((ptr = prom_getenv ("DSL_PHY_CNTL_0")) != NULL)
218+ if ((ptr = prom_getenv ("DSL_PHY_CNTL_0")) != NULL || mp_phyctl0 != NULL)
219   {
220+ if (mp_phyctl0 != NULL) ptr = mp_phyctl0;
221     if ((ptr[0] == '0') && (ptr[1] == 'x')) // skip 0x before pass to
222       // os_atoh
223       ptr += 2;
224@@ -2218,8 +2361,9 @@ static int __init tn7atm_init (struct at
225     _dsl_PhyControl_0_defined = 1;
226   }
227 
228- if ((ptr = prom_getenv ("DSL_PHY_CNTL_1")) != NULL)
229+ if ((ptr = prom_getenv ("DSL_PHY_CNTL_1")) != NULL || mp_phyctl1 != NULL)
230   {
231+ if (mp_phyctl1 != NULL) ptr = mp_phyctl1;
232     if ((ptr[0] == '0') && (ptr[1] == 'x')) // skip 0x before pass to
233       // os_atoh
234       ptr += 2;
235@@ -2247,9 +2391,9 @@ static int __init tn7atm_init (struct at
236   priv->bTurboDsl = 1;
237   // read config for turbo dsl
238   ptr = prom_getenv ("TurboDSL");
239- if (ptr)
240+ if (ptr || mp_turbodsl != -1)
241   {
242- priv->bTurboDsl = os_atoi (ptr);
243+ priv->bTurboDsl = mp_turbodsl == -1 ? os_atoi (ptr) : mp_turbodsl;
244   }
245 
246   // @Added to make Rx buffer number & Service max configurable through
247@@ -2257,30 +2401,30 @@ static int __init tn7atm_init (struct at
248   priv->sarRxBuf = RX_BUFFER_NUM;
249   ptr = NULL;
250   ptr = prom_getenv ("SarRxBuf");
251- if (ptr)
252+ if (ptr || mp_sar_rxbuf != -1)
253   {
254- priv->sarRxBuf = os_atoi (ptr);
255+ priv->sarRxBuf = mp_sar_rxbuf == -1 ? os_atoi (ptr) : mp_sar_rxbuf;
256   }
257   priv->sarRxMax = RX_SERVICE_MAX;
258   ptr = NULL;
259   ptr = prom_getenv ("SarRxMax");
260- if (ptr)
261+ if (ptr || mp_sar_rxmax != -1)
262   {
263- priv->sarRxMax = os_atoi (ptr);
264+ priv->sarRxMax = mp_sar_rxmax == -1 ? os_atoi (ptr) : mp_sar_rxmax;
265   }
266   priv->sarTxBuf = TX_BUFFER_NUM;
267   ptr = NULL;
268   ptr = prom_getenv ("SarTxBuf");
269- if (ptr)
270+ if (ptr || mp_sar_txbuf != -1)
271   {
272- priv->sarTxBuf = os_atoi (ptr);
273+ priv->sarTxBuf = mp_sar_txbuf == -1 ? os_atoi (ptr) : mp_sar_txbuf;
274   }
275   priv->sarTxMax = TX_SERVICE_MAX;
276   ptr = NULL;
277   ptr = prom_getenv ("SarTxMax");
278- if (ptr)
279+ if (ptr || mp_sar_txmax != -1)
280   {
281- priv->sarTxMax = os_atoi (ptr);
282+ priv->sarTxMax = mp_sar_txmax == -1 ? os_atoi (ptr) : mp_sar_txmax;
283   }
284 
285   return 0;
286--- a/tn7dsl.c
287+++ b/tn7dsl.c
288@@ -136,6 +136,27 @@
289 #define NEW_TRAINING_VAL_T1413 128
290 #define NEW_TRAINING_VAL_MMODE 255
291 
292+extern char *mp_modulation;
293+extern int mp_fine_gain_control;
294+extern int mp_fine_gain_value;
295+extern int mp_enable_margin_retrain;
296+extern int mp_margin_threshold;
297+extern int mp_enable_rate_adapt;
298+extern int mp_powercutback;
299+extern int mp_trellis;
300+extern int mp_bitswap;
301+extern int mp_maximum_bits_per_carrier;
302+extern int mp_maximum_interleave_depth;
303+extern int mp_pair_selection;
304+extern int mp_dgas_polarity;
305+extern int mp_los_alarm;
306+extern char *mp_eoc_vendor_id;
307+extern int mp_eoc_vendor_revision;
308+extern char *mp_eoc_vendor_serialnum;
309+extern char *mp_invntry_vernum;
310+extern int mp_dsl_bit_tmode;
311+extern int mp_high_precision;
312+
313 int testflag1 = 0;
314 extern int __guDbgLevel;
315 extern sar_stat_t sarStat;
316@@ -2818,84 +2839,80 @@ static int tn7dsl_set_dsl(void)
317 
318   // modulation
319   ptr = prom_getenv("modulation");
320- if (ptr)
321+ if (ptr || mp_modulation != NULL)
322   {
323- tn7dsl_set_modulation(ptr, FALSE);
324+ tn7dsl_set_modulation(mp_modulation == NULL ? ptr : mp_modulation, FALSE);
325   }
326 
327   // Fine Gains
328   ptr = prom_getenv("fine_gain_control");
329- if (ptr)
330+ if (ptr || mp_fine_gain_control != -1)
331   {
332- value = os_atoi(ptr);
333+ value = mp_fine_gain_control == -1 ? os_atoi(ptr) : mp_fine_gain_control;
334     tn7dsl_ctrl_fineGain(value);
335   }
336   ptr = NULL;
337   ptr = prom_getenv("fine_gain_value");
338- if(ptr)
339- tn7dsl_set_fineGainValue(os_atoh(ptr));
340+ if(ptr || mp_fine_gain_value != -1)
341+ tn7dsl_set_fineGainValue(mp_fine_gain_value == -1 ? os_atoh(ptr) : mp_fine_gain_value);
342 
343   // margin retrain
344   ptr = NULL;
345   ptr = prom_getenv("enable_margin_retrain");
346- if(ptr)
347+ value = mp_enable_margin_retrain == -1 ? (ptr ? os_atoi(ptr) : 0) : mp_enable_margin_retrain;
348+
349+ if (value == 1)
350   {
351- value = os_atoi(ptr);
352- if(value == 1)
353+ dslhal_api_setMarginMonitorFlags(pIhw, 0, 1);
354+ bMarginRetrainEnable = 1;
355+ //printk("enable showtime margin monitor.\n");
356+
357+ ptr = NULL;
358+ ptr = prom_getenv("margin_threshold");
359+ value = mp_margin_threshold == -1 ? (ptr ? os_atoi(ptr) : 0) : mp_margin_threshold;
360+
361+ if(value >= 0)
362     {
363- dslhal_api_setMarginMonitorFlags(pIhw, 0, 1);
364- bMarginRetrainEnable = 1;
365- //printk("enable showtime margin monitor.\n");
366- ptr = NULL;
367- ptr = prom_getenv("margin_threshold");
368- if(ptr)
369- {
370- value = os_atoi(ptr);
371- //printk("Set margin threshold to %d x 0.5 db\n",value);
372- if(value >= 0)
373- {
374- dslhal_api_setMarginThreshold(pIhw, value);
375- bMarginThConfig=1;
376- }
377- }
378+ dslhal_api_setMarginThreshold(pIhw, value);
379+ bMarginThConfig=1;
380     }
381   }
382 
383   // rate adapt
384   ptr = NULL;
385   ptr = prom_getenv("enable_rate_adapt");
386- if(ptr)
387+ if(ptr || mp_enable_rate_adapt != -1)
388   {
389- dslhal_api_setRateAdaptFlag(pIhw, os_atoi(ptr));
390+ dslhal_api_setRateAdaptFlag(pIhw, mp_enable_rate_adapt == -1 ? os_atoi(ptr) : mp_enable_rate_adapt);
391   }
392 
393   // set powercutback
394   ptr = NULL;
395   ptr = prom_getenv("powercutback");
396- if(ptr)
397+ if(ptr || mp_powercutback != -1)
398   {
399- dslhal_advcfg_onOffPcb(pIhw, os_atoi(ptr));
400+ dslhal_advcfg_onOffPcb(pIhw, mp_powercutback == -1 ? os_atoi(ptr) : mp_powercutback);
401   }
402 
403   // trellis
404   ptr = NULL;
405   ptr = prom_getenv("trellis");
406- if(ptr)
407+ if(ptr || mp_trellis != -1)
408   {
409- dslhal_api_setTrellisFlag(pIhw, os_atoi(ptr));
410- trellis = os_atoi(ptr);
411+ trellis = mp_trellis == -1 ? os_atoi(ptr) : mp_trellis;
412+ dslhal_api_setTrellisFlag(pIhw, trellis);
413     //printk("trellis=%d\n");
414   }
415 
416   // bitswap
417   ptr = NULL;
418   ptr = prom_getenv("bitswap");
419- if(ptr)
420+ if(ptr || mp_bitswap != -1)
421   {
422     int offset[2] = {33, 0};
423     unsigned int bitswap;
424 
425- bitswap = os_atoi(ptr);
426+ bitswap = mp_bitswap == -1 ? os_atoi(ptr) : mp_bitswap;
427 
428     tn7dsl_generic_read(2, offset);
429     dslReg &= dslhal_support_byteSwap32(0xFFFFFF00);
430@@ -2913,46 +2930,47 @@ static int tn7dsl_set_dsl(void)
431   // maximum bits per carrier
432   ptr = NULL;
433   ptr = prom_getenv("maximum_bits_per_carrier");
434- if(ptr)
435+ if(ptr || mp_maximum_bits_per_carrier != -1)
436   {
437- dslhal_api_setMaxBitsPerCarrierUpstream(pIhw, os_atoi(ptr));
438+ dslhal_api_setMaxBitsPerCarrierUpstream(pIhw, mp_maximum_bits_per_carrier == -1 ? os_atoi(ptr) : mp_maximum_bits_per_carrier);
439   }
440 
441   // maximum interleave depth
442   ptr = NULL;
443   ptr = prom_getenv("maximum_interleave_depth");
444- if(ptr)
445+ if(ptr || mp_maximum_interleave_depth != -1)
446   {
447- dslhal_api_setMaxInterleaverDepth(pIhw, os_atoi(ptr));
448+ dslhal_api_setMaxInterleaverDepth(pIhw, mp_maximum_interleave_depth == -1 ? os_atoi(ptr) : mp_maximum_interleave_depth);
449   }
450 
451   // inner and outer pairs
452   ptr = NULL;
453   ptr = prom_getenv("pair_selection");
454- if(ptr)
455+ if(ptr || mp_pair_selection != -1)
456   {
457- dslhal_api_selectInnerOuterPair(pIhw, os_atoi(ptr));
458+ dslhal_api_selectInnerOuterPair(pIhw, mp_pair_selection == -1 ? os_atoi(ptr) : mp_pair_selection);
459   }
460 
461   ptr = NULL;
462   ptr = prom_getenv("dgas_polarity");
463- if(ptr)
464+ if(ptr || mp_dgas_polarity != -1)
465   {
466     dslhal_api_configureDgaspLpr(pIhw, 1, 1);
467- dslhal_api_configureDgaspLpr(pIhw, 0, os_atoi(ptr));
468+ dslhal_api_configureDgaspLpr(pIhw, 0, mp_dgas_polarity == -1 ? os_atoi(ptr) : mp_dgas_polarity);
469   }
470 
471   ptr = NULL;
472   ptr = prom_getenv("los_alarm");
473- if(ptr)
474+ if(ptr || mp_los_alarm != -1)
475   {
476- dslhal_api_disableLosAlarm(pIhw, os_atoi(ptr));
477+ dslhal_api_disableLosAlarm(pIhw, mp_los_alarm == -1 ? os_atoi(ptr) : mp_los_alarm);
478   }
479 
480   ptr = NULL;
481   ptr = prom_getenv("eoc_vendor_id");
482- if(ptr)
483+ if(ptr || mp_eoc_vendor_id != NULL)
484   {
485+ ptr = mp_eoc_vendor_id == NULL ? ptr : mp_eoc_vendor_id;
486     for(i=0;i<8;i++)
487     {
488       tmp[0]=ptr[i*2];
489@@ -2977,26 +2995,26 @@ static int tn7dsl_set_dsl(void)
490   }
491   ptr = NULL;
492   ptr = prom_getenv("eoc_vendor_revision");
493- if(ptr)
494+ if(ptr || mp_eoc_vendor_revision != -1)
495   {
496- value = os_atoi(ptr);
497+ value = mp_eoc_vendor_revision == -1 ? os_atoi(ptr) : mp_eoc_vendor_revision;
498     //printk("eoc rev=%d\n", os_atoi(ptr));
499     dslhal_api_setEocRevisionNumber(pIhw, (char *)&value);
500 
501   }
502   ptr = NULL;
503   ptr = prom_getenv("eoc_vendor_serialnum");
504- if(ptr)
505+ if(ptr || mp_eoc_vendor_serialnum != NULL)
506   {
507- dslhal_api_setEocSerialNumber(pIhw, ptr);
508+ dslhal_api_setEocSerialNumber(pIhw, mp_eoc_vendor_serialnum == NULL ? ptr : mp_eoc_vendor_serialnum);
509   }
510   
511   // CQ10037 Added invntry_vernum environment variable to be able to set version number in ADSL2, ADSL2+ modes.
512   ptr = NULL;
513   ptr = prom_getenv("invntry_vernum");
514- if(ptr)
515+ if(ptr || mp_invntry_vernum != NULL)
516   {
517- dslhal_api_setEocRevisionNumber(pIhw, ptr);
518+ dslhal_api_setEocRevisionNumber(pIhw, mp_invntry_vernum == NULL ? ptr : mp_invntry_vernum);
519   }
520 
521   return 0;
522@@ -3041,7 +3059,7 @@ int tn7dsl_init(void *priv)
523    * backward compatibility.
524    */
525   cp = prom_getenv("DSL_BIT_TMODE");
526- if (cp)
527+ if (cp || mp_dsl_bit_tmode != -1)
528   {
529     printk("%s : env var DSL_BIT_TMODE is set\n", __FUNCTION__);
530     /*
531@@ -3070,9 +3088,9 @@ int tn7dsl_init(void *priv)
532 
533 // UR8_MERGE_START CQ11054 Jack Zhang
534   cp = prom_getenv("high_precision");
535- if (cp)
536+ if (cp || mp_high_precision != -1)
537   {
538- high_precision_selected = os_atoi(cp);
539+ high_precision_selected = mp_high_precision == -1 ? os_atoi(cp) : mp_high_precision;
540   }
541   if ( high_precision_selected)
542   {
543--- a/tn7sar.c
544+++ b/tn7sar.c
545@@ -74,6 +74,8 @@ typedef void OS_SETUP;
546 /* PDSP Firmware files */
547 #include "tnetd7300_sar_firm.h"
548 
549+extern int mp_oam_lb_timeout;
550+extern int mp_autopvc_enable;
551 
552 enum
553 {
554@@ -817,9 +819,9 @@ int tn7sar_setup_oam_channel(Tn7AtmPriva
555   pHalDev = (HAL_DEVICE *)priv->pSarHalDev;
556 
557   pauto_pvc = prom_getenv("autopvc_enable");
558- if(pauto_pvc) //CQ10273
559+ if(pauto_pvc || mp_autopvc_enable != -1) //CQ10273
560   {
561- auto_pvc =tn7sar_strtoul(pauto_pvc, NULL, 10);
562+ auto_pvc = mp_autopvc_enable == -1 ? tn7sar_strtoul(pauto_pvc, NULL, 10) : mp_autopvc_enable;
563   }
564 
565   memset(&chInfo, 0xff, sizeof(chInfo));
566@@ -985,9 +987,9 @@ int tn7sar_init(struct atm_dev *dev, Tn7
567 
568   /* read in oam lb timeout value */
569   pLbTimeout = prom_getenv("oam_lb_timeout");
570- if(pLbTimeout)
571+ if(pLbTimeout || mp_oam_lb_timeout != -1)
572   {
573- lbTimeout =tn7sar_strtoul(pLbTimeout, NULL, 10);
574+ lbTimeout = mp_oam_lb_timeout == -1 ? tn7sar_strtoul(pLbTimeout, NULL, 10) : mp_oam_lb_timeout;
575     oamLbTimeout = lbTimeout;
576     pHalFunc->Control(pHalDev,"OamLbTimeout", "Set", &lbTimeout);
577   }
578

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