| 1 | /******************************************************************************/ |
| 2 | /* */ |
| 3 | /* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
| 4 | /* Corporation. */ |
| 5 | /* All rights reserved. */ |
| 6 | /* */ |
| 7 | /* This program is free software; you can redistribute it and/or modify */ |
| 8 | /* it under the terms of the GNU General Public License as published by */ |
| 9 | /* the Free Software Foundation, located in the file LICENSE. */ |
| 10 | /* */ |
| 11 | /* History: */ |
| 12 | /******************************************************************************/ |
| 13 | |
| 14 | |
| 15 | #ifndef AUTONEG_H |
| 16 | #define AUTONEG_H |
| 17 | |
| 18 | |
| 19 | |
| 20 | /******************************************************************************/ |
| 21 | /* Constants. */ |
| 22 | /******************************************************************************/ |
| 23 | |
| 24 | #define AN_LINK_TIMER_INTERVAL_US 12000 /* 10ms */ |
| 25 | |
| 26 | /* TRUE, FALSE */ |
| 27 | #define AN_TRUE 1 |
| 28 | #define AN_FALSE 0 |
| 29 | |
| 30 | |
| 31 | |
| 32 | /******************************************************************************/ |
| 33 | /* Main data structure for keeping track of 802.3z auto-negotation state */ |
| 34 | /* variables as shown in Figure 37-6 of the IEEE 802.3z specification. */ |
| 35 | /******************************************************************************/ |
| 36 | |
| 37 | typedef struct |
| 38 | { |
| 39 | /* Pointer to the operating system specific data structure. */ |
| 40 | void *pContext; |
| 41 | |
| 42 | /* Current auto-negotiation state. */ |
| 43 | unsigned long State; |
| 44 | #define AN_STATE_UNKNOWN 0 |
| 45 | #define AN_STATE_AN_ENABLE 1 |
| 46 | #define AN_STATE_AN_RESTART_INIT 2 |
| 47 | #define AN_STATE_AN_RESTART 3 |
| 48 | #define AN_STATE_DISABLE_LINK_OK 4 |
| 49 | #define AN_STATE_ABILITY_DETECT_INIT 5 |
| 50 | #define AN_STATE_ABILITY_DETECT 6 |
| 51 | #define AN_STATE_ACK_DETECT_INIT 7 |
| 52 | #define AN_STATE_ACK_DETECT 8 |
| 53 | #define AN_STATE_COMPLETE_ACK_INIT 9 |
| 54 | #define AN_STATE_COMPLETE_ACK 10 |
| 55 | #define AN_STATE_IDLE_DETECT_INIT 11 |
| 56 | #define AN_STATE_IDLE_DETECT 12 |
| 57 | #define AN_STATE_LINK_OK 13 |
| 58 | #define AN_STATE_NEXT_PAGE_WAIT_INIT 14 |
| 59 | #define AN_STATE_NEXT_PAGE_WAIT 16 |
| 60 | |
| 61 | /* Link timer. */ |
| 62 | unsigned long LinkTime_us; |
| 63 | |
| 64 | /* Current time. */ |
| 65 | unsigned long CurrentTime_us; |
| 66 | |
| 67 | /* Ability, idle, and ack match functions. */ |
| 68 | unsigned long AbilityMatchCnt; |
| 69 | |
| 70 | /* Need these values for consistency check. */ |
| 71 | unsigned short AbilityMatchCfg; |
| 72 | |
| 73 | unsigned short reserved; |
| 74 | |
| 75 | char AbilityMatch; |
| 76 | char IdleMatch; |
| 77 | char AckMatch; |
| 78 | char reserved1; |
| 79 | |
| 80 | /* Tx config data */ |
| 81 | union |
| 82 | { |
| 83 | /* The TxConfig register is arranged as follows: */ |
| 84 | /* */ |
| 85 | /* MSB LSB */ |
| 86 | /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
| 87 | /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ |
| 88 | /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
| 89 | struct |
| 90 | { |
| 91 | #ifdef BIG_ENDIAN_HOST |
| 92 | unsigned short D7:1; /* PS1 */ |
| 93 | unsigned short D6:1; /* HD */ |
| 94 | unsigned short D5:1; /* FD */ |
| 95 | unsigned short D4:1; |
| 96 | unsigned short D3:1; |
| 97 | unsigned short D2:1; |
| 98 | unsigned short D1:1; |
| 99 | unsigned short D0:1; |
| 100 | unsigned short D15:1; /* NP */ |
| 101 | unsigned short D14:1; /* ACK */ |
| 102 | unsigned short D13:1; /* RF2 */ |
| 103 | unsigned short D12:1; /* RF1 */ |
| 104 | unsigned short D11:1; |
| 105 | unsigned short D10:1; |
| 106 | unsigned short D9:1; |
| 107 | unsigned short D8:1; /* PS2 */ |
| 108 | #else /* BIG_ENDIAN_HOST */ |
| 109 | unsigned int D8:1; /* PS2 */ |
| 110 | unsigned int D9:1; |
| 111 | unsigned int D10:1; |
| 112 | unsigned int D11:1; |
| 113 | unsigned int D12:1; /* RF1 */ |
| 114 | unsigned int D13:1; /* RF2 */ |
| 115 | unsigned int D14:1; /* ACK */ |
| 116 | unsigned int D15:1; /* NP */ |
| 117 | unsigned int D0:1; |
| 118 | unsigned int D1:1; |
| 119 | unsigned int D2:1; |
| 120 | unsigned int D3:1; |
| 121 | unsigned int D4:1; |
| 122 | unsigned int D5:1; /* FD */ |
| 123 | unsigned int D6:1; /* HD */ |
| 124 | unsigned int D7:1; /* PS1 */ |
| 125 | #endif |
| 126 | } bits; |
| 127 | |
| 128 | unsigned short AsUSHORT; |
| 129 | |
| 130 | #define D8_PS2 bits.D8 |
| 131 | #define D12_RF1 bits.D12 |
| 132 | #define D13_RF2 bits.D13 |
| 133 | #define D14_ACK bits.D14 |
| 134 | #define D15_NP bits.D15 |
| 135 | #define D5_FD bits.D5 |
| 136 | #define D6_HD bits.D6 |
| 137 | #define D7_PS1 bits.D7 |
| 138 | } TxConfig; |
| 139 | |
| 140 | /* Rx config data */ |
| 141 | union |
| 142 | { |
| 143 | /* The RxConfig register is arranged as follows: */ |
| 144 | /* */ |
| 145 | /* MSB LSB */ |
| 146 | /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
| 147 | /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ |
| 148 | /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
| 149 | struct |
| 150 | { |
| 151 | #ifdef BIG_ENDIAN_HOST |
| 152 | unsigned short D7:1; /* PS1 */ |
| 153 | unsigned short D6:1; /* HD */ |
| 154 | unsigned short D5:1; /* FD */ |
| 155 | unsigned short D4:1; |
| 156 | unsigned short D3:1; |
| 157 | unsigned short D2:1; |
| 158 | unsigned short D1:1; |
| 159 | unsigned short D0:1; |
| 160 | unsigned short D15:1; /* NP */ |
| 161 | unsigned short D14:1; /* ACK */ |
| 162 | unsigned short D13:1; /* RF2 */ |
| 163 | unsigned short D12:1; /* RF1 */ |
| 164 | unsigned short D11:1; |
| 165 | unsigned short D10:1; |
| 166 | unsigned short D9:1; |
| 167 | unsigned short D8:1; /* PS2 */ |
| 168 | #else /* BIG_ENDIAN_HOST */ |
| 169 | unsigned int D8:1; /* PS2 */ |
| 170 | unsigned int D9:1; |
| 171 | unsigned int D10:1; |
| 172 | unsigned int D11:1; |
| 173 | unsigned int D12:1; /* RF1 */ |
| 174 | unsigned int D13:1; /* RF2 */ |
| 175 | unsigned int D14:1; /* ACK */ |
| 176 | unsigned int D15:1; /* NP */ |
| 177 | unsigned int D0:1; |
| 178 | unsigned int D1:1; |
| 179 | unsigned int D2:1; |
| 180 | unsigned int D3:1; |
| 181 | unsigned int D4:1; |
| 182 | unsigned int D5:1; /* FD */ |
| 183 | unsigned int D6:1; /* HD */ |
| 184 | unsigned int D7:1; /* PS1 */ |
| 185 | #endif |
| 186 | } bits; |
| 187 | |
| 188 | unsigned short AsUSHORT; |
| 189 | } RxConfig; |
| 190 | |
| 191 | #define AN_CONFIG_NP 0x0080 |
| 192 | #define AN_CONFIG_ACK 0x0040 |
| 193 | #define AN_CONFIG_RF2 0x0020 |
| 194 | #define AN_CONFIG_RF1 0x0010 |
| 195 | #define AN_CONFIG_PS2 0x0001 |
| 196 | #define AN_CONFIG_PS1 0x8000 |
| 197 | #define AN_CONFIG_HD 0x4000 |
| 198 | #define AN_CONFIG_FD 0x2000 |
| 199 | |
| 200 | |
| 201 | /* Management registers. */ |
| 202 | |
| 203 | /* Control register. */ |
| 204 | union |
| 205 | { |
| 206 | struct |
| 207 | { |
| 208 | unsigned int an_enable:1; |
| 209 | unsigned int loopback:1; |
| 210 | unsigned int reset:1; |
| 211 | unsigned int restart_an:1; |
| 212 | } bits; |
| 213 | |
| 214 | unsigned short AsUSHORT; |
| 215 | |
| 216 | #define mr_an_enable Mr0.bits.an_enable |
| 217 | #define mr_loopback Mr0.bits.loopback |
| 218 | #define mr_main_reset Mr0.bits.reset |
| 219 | #define mr_restart_an Mr0.bits.restart_an |
| 220 | } Mr0; |
| 221 | |
| 222 | /* Status register. */ |
| 223 | union |
| 224 | { |
| 225 | struct |
| 226 | { |
| 227 | unsigned int an_complete:1; |
| 228 | unsigned int link_ok:1; |
| 229 | } bits; |
| 230 | |
| 231 | unsigned short AsUSHORT; |
| 232 | |
| 233 | #define mr_an_complete Mr1.bits.an_complete |
| 234 | #define mr_link_ok Mr1.bits.link_ok |
| 235 | } Mr1; |
| 236 | |
| 237 | /* Advertisement register. */ |
| 238 | union |
| 239 | { |
| 240 | struct |
| 241 | { |
| 242 | unsigned int reserved_4:5; |
| 243 | unsigned int full_duplex:1; |
| 244 | unsigned int half_duplex:1; |
| 245 | unsigned int sym_pause:1; |
| 246 | unsigned int asym_pause:1; |
| 247 | unsigned int reserved_11:3; |
| 248 | unsigned int remote_fault1:1; |
| 249 | unsigned int remote_fault2:1; |
| 250 | unsigned int reserved_14:1; |
| 251 | unsigned int next_page:1; |
| 252 | } bits; |
| 253 | |
| 254 | unsigned short AsUSHORT; |
| 255 | |
| 256 | #define mr_adv_full_duplex Mr4.bits.full_duplex |
| 257 | #define mr_adv_half_duplex Mr4.bits.half_duplex |
| 258 | #define mr_adv_sym_pause Mr4.bits.sym_pause |
| 259 | #define mr_adv_asym_pause Mr4.bits.asym_pause |
| 260 | #define mr_adv_remote_fault1 Mr4.bits.remote_fault1 |
| 261 | #define mr_adv_remote_fault2 Mr4.bits.remote_fault2 |
| 262 | #define mr_adv_next_page Mr4.bits.next_page |
| 263 | } Mr4; |
| 264 | |
| 265 | /* Link partner advertisement register. */ |
| 266 | union |
| 267 | { |
| 268 | struct |
| 269 | { |
| 270 | unsigned int reserved_4:5; |
| 271 | unsigned int lp_full_duplex:1; |
| 272 | unsigned int lp_half_duplex:1; |
| 273 | unsigned int lp_sym_pause:1; |
| 274 | unsigned int lp_asym_pause:1; |
| 275 | unsigned int reserved_11:3; |
| 276 | unsigned int lp_remote_fault1:1; |
| 277 | unsigned int lp_remote_fault2:1; |
| 278 | unsigned int lp_ack:1; |
| 279 | unsigned int lp_next_page:1; |
| 280 | } bits; |
| 281 | |
| 282 | unsigned short AsUSHORT; |
| 283 | |
| 284 | #define mr_lp_adv_full_duplex Mr5.bits.lp_full_duplex |
| 285 | #define mr_lp_adv_half_duplex Mr5.bits.lp_half_duplex |
| 286 | #define mr_lp_adv_sym_pause Mr5.bits.lp_sym_pause |
| 287 | #define mr_lp_adv_asym_pause Mr5.bits.lp_asym_pause |
| 288 | #define mr_lp_adv_remote_fault1 Mr5.bits.lp_remote_fault1 |
| 289 | #define mr_lp_adv_remote_fault2 Mr5.bits.lp_remote_fault2 |
| 290 | #define mr_lp_adv_next_page Mr5.bits.lp_next_page |
| 291 | } Mr5; |
| 292 | |
| 293 | /* Auto-negotiation expansion register. */ |
| 294 | union |
| 295 | { |
| 296 | struct |
| 297 | { |
| 298 | unsigned int reserved_0:1; |
| 299 | unsigned int page_received:1; |
| 300 | unsigned int next_pageable:1; |
| 301 | unsigned int reserved_15:13; |
| 302 | } bits; |
| 303 | |
| 304 | unsigned short AsUSHORT; |
| 305 | } Mr6; |
| 306 | |
| 307 | /* Auto-negotiation next page transmit register. */ |
| 308 | union |
| 309 | { |
| 310 | struct |
| 311 | { |
| 312 | unsigned int code_field:11; |
| 313 | unsigned int toggle:1; |
| 314 | unsigned int ack2:1; |
| 315 | unsigned int message_page:1; |
| 316 | unsigned int reserved_14:1; |
| 317 | unsigned int next_page:1; |
| 318 | } bits; |
| 319 | |
| 320 | unsigned short AsUSHORT; |
| 321 | |
| 322 | #define mr_np_tx Mr7.AsUSHORT |
| 323 | } Mr7; |
| 324 | |
| 325 | /* Auto-negotiation link partner ability register. */ |
| 326 | union |
| 327 | { |
| 328 | struct |
| 329 | { |
| 330 | unsigned int code_field:11; |
| 331 | unsigned int toggle:1; |
| 332 | unsigned int ack2:1; |
| 333 | unsigned int message_page:1; |
| 334 | unsigned int ack:1; |
| 335 | unsigned int next_page:1; |
| 336 | } bits; |
| 337 | |
| 338 | unsigned short AsUSHORT; |
| 339 | |
| 340 | #define mr_lp_np_rx Mr8.AsUSHORT |
| 341 | } Mr8; |
| 342 | |
| 343 | /* Extended status register. */ |
| 344 | union |
| 345 | { |
| 346 | struct |
| 347 | { |
| 348 | unsigned int reserved_11:12; |
| 349 | unsigned int base1000_t_hd:1; |
| 350 | unsigned int base1000_t_fd:1; |
| 351 | unsigned int base1000_x_hd:1; |
| 352 | unsigned int base1000_x_fd:1; |
| 353 | } bits; |
| 354 | |
| 355 | unsigned short AsUSHORT; |
| 356 | } Mr15; |
| 357 | |
| 358 | /* Miscellaneous state variables. */ |
| 359 | union |
| 360 | { |
| 361 | struct |
| 362 | { |
| 363 | unsigned int toggle_tx:1; |
| 364 | unsigned int toggle_rx:1; |
| 365 | unsigned int np_rx:1; |
| 366 | unsigned int page_rx:1; |
| 367 | unsigned int np_loaded:1; |
| 368 | } bits; |
| 369 | |
| 370 | unsigned short AsUSHORT; |
| 371 | |
| 372 | #define mr_toggle_tx MrMisc.bits.toggle_tx |
| 373 | #define mr_toggle_rx MrMisc.bits.toggle_rx |
| 374 | #define mr_np_rx MrMisc.bits.np_rx |
| 375 | #define mr_page_rx MrMisc.bits.page_rx |
| 376 | #define mr_np_loaded MrMisc.bits.np_loaded |
| 377 | } MrMisc; |
| 378 | |
| 379 | } AN_STATE_INFO, *PAN_STATE_INFO; |
| 380 | |
| 381 | |
| 382 | |
| 383 | /******************************************************************************/ |
| 384 | /* Return code of Autoneg8023z. */ |
| 385 | /******************************************************************************/ |
| 386 | |
| 387 | typedef enum |
| 388 | { |
| 389 | AUTONEG_STATUS_OK = 0, |
| 390 | AUTONEG_STATUS_DONE = 1, |
| 391 | AUTONEG_STATUS_TIMER_ENABLED = 2, |
| 392 | // AUTONEG_STATUS_FAILED = 0xffffffff, |
| 393 | AUTONEG_STATUS_FAILED = 0xfffffff |
| 394 | } AUTONEG_STATUS, *PAUTONEG_STATUS; |
| 395 | |
| 396 | |
| 397 | |
| 398 | /******************************************************************************/ |
| 399 | /* Function prototypes. */ |
| 400 | /******************************************************************************/ |
| 401 | |
| 402 | AUTONEG_STATUS Autoneg8023z(PAN_STATE_INFO pAnInfo); |
| 403 | void AutonegInit(PAN_STATE_INFO pAnInfo); |
| 404 | |
| 405 | |
| 406 | |
| 407 | /******************************************************************************/ |
| 408 | /* The following functions are defined in the os-dependent module. */ |
| 409 | /******************************************************************************/ |
| 410 | |
| 411 | void MM_AnTxConfig(PAN_STATE_INFO pAnInfo); |
| 412 | void MM_AnTxIdle(PAN_STATE_INFO pAnInfo); |
| 413 | char MM_AnRxConfig(PAN_STATE_INFO pAnInfo, unsigned short *pRxConfig); |
| 414 | |
| 415 | |
| 416 | |
| 417 | #endif /* AUTONEG_H */ |
| 418 | |
| 419 | |
