| 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <asm/danube.h> |
| 26 | |
| 27 | ulong ifx_get_ddr_hz(void) |
| 28 | { |
| 29 | static const ulong ddr_freq[] = {166666667,133333333,111111111,83333333}; |
| 30 | return ddr_freq[((*DANUBE_CGU_SYS) & 0x3)]; |
| 31 | } |
| 32 | |
| 33 | ulong ifx_get_cpuclk(void) |
| 34 | { |
| 35 | #ifdef CONFIG_USE_EMULATOR |
| 36 | return EMULATOR_CPU_SPEED; |
| 37 | #else //NOT CONFIG_USE_EMULATOR |
| 38 | unsigned int ddr_clock=ifx_get_ddr_hz(); |
| 39 | switch((*DANUBE_CGU_SYS) & 0xc){ |
| 40 | case 0: |
| 41 | default: |
| 42 | return 323333333; |
| 43 | case 4: |
| 44 | return ddr_clock; |
| 45 | case 8: |
| 46 | return ddr_clock << 1; |
| 47 | } |
| 48 | #endif |
| 49 | } |
| 50 | |
| 51 | ulong get_bus_freq(ulong dummy) |
| 52 | { |
| 53 | #ifdef CONFIG_USE_EMULATOR |
| 54 | unsigned int clkCPU; |
| 55 | clkCPU = ifx_get_cpuclk(); |
| 56 | return clkCPU >> 2; |
| 57 | #else //NOT CONFIG_USE_EMULATOR |
| 58 | unsigned int ddr_clock=ifx_get_ddr_hz(); |
| 59 | if ((*DANUBE_CGU_SYS) & 0x40){ |
| 60 | return ddr_clock >> 1; |
| 61 | } |
| 62 | return ddr_clock; |
| 63 | #endif |
| 64 | } |
| 65 | |
| 66 | |
