| 1 | /* |
| 2 | * Startup Code for MIPS32 XBURST CPU-core |
| 3 | * |
| 4 | * Copyright (c) 2010 Xiangfu Liu <xiangfu@sharism.cc> |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #include <config.h> |
| 26 | #include <version.h> |
| 27 | #include <asm/regdef.h> |
| 28 | #include <asm/mipsregs.h> |
| 29 | #include <asm/addrspace.h> |
| 30 | #include <asm/cacheops.h> |
| 31 | |
| 32 | #include <asm/jz4740.h> |
| 33 | |
| 34 | .set noreorder |
| 35 | |
| 36 | .globl _start |
| 37 | .text |
| 38 | _start: |
| 39 | /* Initialize GOT pointer. |
| 40 | */ |
| 41 | bal 1f |
| 42 | nop |
| 43 | .word _GLOBAL_OFFSET_TABLE_ |
| 44 | 1: |
| 45 | move gp, ra |
| 46 | lw t1, 0(ra) |
| 47 | move gp, t1 |
| 48 | |
| 49 | li t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET |
| 50 | la sp, 0(t0) |
| 51 | |
| 52 | la t9, board_init_f |
| 53 | j t9 |
| 54 | nop |
| 55 | |
| 56 | /* |
| 57 | * void relocate_code (addr_sp, gd, addr_moni) |
| 58 | * |
| 59 | * This "function" does not return, instead it continues in RAM |
| 60 | * after relocating the monitor code. |
| 61 | * |
| 62 | * a0 = addr_sp |
| 63 | * a1 = gd |
| 64 | * a2 = destination address |
| 65 | */ |
| 66 | .globl relocate_code |
| 67 | .ent relocate_code |
| 68 | relocate_code: |
| 69 | move sp, a0 /* Set new stack pointer */ |
| 70 | |
| 71 | li t0, TEXT_BASE |
| 72 | la t3, in_ram |
| 73 | lw t2, -12(t3) /* t2 <-- uboot_end_data */ |
| 74 | move t1, a2 |
| 75 | |
| 76 | /* |
| 77 | * Fix GOT pointer: |
| 78 | * |
| 79 | * New GOT-PTR = (old GOT-PTR - TEXT_BASE) + Destination Address |
| 80 | */ |
| 81 | move t6, gp |
| 82 | sub gp, TEXT_BASE |
| 83 | add gp, a2 /* gp now adjusted */ |
| 84 | sub t6, gp, t6 /* t6 <-- relocation offset*/ |
| 85 | |
| 86 | /* |
| 87 | * t0 = source address |
| 88 | * t1 = target address |
| 89 | * t2 = source end address |
| 90 | */ |
| 91 | 1: |
| 92 | lw t3, 0(t0) |
| 93 | sw t3, 0(t1) |
| 94 | addu t0, 4 |
| 95 | ble t0, t2, 1b |
| 96 | addu t1, 4 /* delay slot */ |
| 97 | |
| 98 | /* If caches were enabled, we would have to flush them here. |
| 99 | * flush d-cache */ |
| 100 | .set mips32 |
| 101 | li t0, KSEG0 |
| 102 | addi t1, t0, CONFIG_SYS_DCACHE_SIZE |
| 103 | 2: |
| 104 | cache Index_Writeback_Inv_D, 0(t0) |
| 105 | bne t0, t1, 2b |
| 106 | addi t0, CONFIG_SYS_CACHELINE_SIZE |
| 107 | |
| 108 | sync |
| 109 | |
| 110 | /* flush i-cache */ |
| 111 | li t0, KSEG0 |
| 112 | addi t1, t0, CONFIG_SYS_ICACHE_SIZE |
| 113 | 3: |
| 114 | cache Index_Invalidate_I, 0(t0) |
| 115 | bne t0, t1, 3b |
| 116 | addi t0, CONFIG_SYS_CACHELINE_SIZE |
| 117 | |
| 118 | /* Invalidate BTB */ |
| 119 | mfc0 t0, CP0_CONFIG, 7 |
| 120 | nop |
| 121 | ori t0, 2 |
| 122 | mtc0 t0, CP0_CONFIG, 7 |
| 123 | nop |
| 124 | |
| 125 | .set mips0 |
| 126 | |
| 127 | /* Jump to where we've relocated ourselves. |
| 128 | */ |
| 129 | addi t0, a2, in_ram - _start |
| 130 | j t0 |
| 131 | nop |
| 132 | |
| 133 | .word uboot_end_data |
| 134 | .word uboot_end |
| 135 | .word num_got_entries |
| 136 | |
| 137 | in_ram: |
| 138 | /* Now we want to update GOT */ |
| 139 | lw t3, -4(t0) /* t3 <-- num_got_entries */ |
| 140 | addi t4, gp, 8 /* Skipping first two entries. */ |
| 141 | li t2, 2 |
| 142 | 1: |
| 143 | lw t1, 0(t4) |
| 144 | beqz t1, 2f |
| 145 | add t1, t6 |
| 146 | sw t1, 0(t4) |
| 147 | 2: |
| 148 | addi t2, 1 |
| 149 | blt t2, t3, 1b |
| 150 | addi t4, 4 /* delay slot */ |
| 151 | |
| 152 | /* Clear BSS */ |
| 153 | lw t1, -12(t0) /* t1 <-- uboot_end_data */ |
| 154 | lw t2, -8(t0) /* t2 <-- uboot_end */ |
| 155 | add t1, t6 /* adjust pointers */ |
| 156 | add t2, t6 |
| 157 | |
| 158 | sub t1, 4 |
| 159 | 1: addi t1, 4 |
| 160 | bltl t1, t2, 1b |
| 161 | sw zero, 0(t1) /* delay slot */ |
| 162 | |
| 163 | move a0, a1 |
| 164 | la t9, board_init_r |
| 165 | j t9 |
| 166 | move a1, a2 /* delay slot */ |
| 167 | |
| 168 | .end relocate_code |
| 169 | |
