| 1 | /* |
| 2 | * JzRISC lcd controller |
| 3 | * |
| 4 | * Xiangfu Liu <xiangfu@sharism.cc> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; either version 2 of |
| 9 | * the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 19 | * MA 02111-1307 USA |
| 20 | */ |
| 21 | |
| 22 | #ifndef __QI_LB60_GPM940B0_H__ |
| 23 | #define __QI_LB60_GPM940B0_H__ |
| 24 | |
| 25 | struct lcd_desc{ |
| 26 | unsigned int next_desc; /* LCDDAx */ |
| 27 | unsigned int databuf; /* LCDSAx */ |
| 28 | unsigned int frame_id; /* LCDFIDx */ |
| 29 | unsigned int cmd; /* LCDCMDx */ |
| 30 | }; |
| 31 | |
| 32 | #define MODE_MASK 0x0f |
| 33 | #define MODE_TFT_GEN 0x00 |
| 34 | #define MODE_TFT_SHARP 0x01 |
| 35 | #define MODE_TFT_CASIO 0x02 |
| 36 | #define MODE_TFT_SAMSUNG 0x03 |
| 37 | #define MODE_CCIR656_NONINT 0x04 |
| 38 | #define MODE_CCIR656_INT 0x05 |
| 39 | #define MODE_STN_COLOR_SINGLE 0x08 |
| 40 | #define MODE_STN_MONO_SINGLE 0x09 |
| 41 | #define MODE_STN_COLOR_DUAL 0x0a |
| 42 | #define MODE_STN_MONO_DUAL 0x0b |
| 43 | #define MODE_8BIT_SERIAL_TFT 0x0c |
| 44 | |
| 45 | #define MODE_TFT_18BIT (1<<7) |
| 46 | |
| 47 | #define STN_DAT_PIN1 (0x00 << 4) |
| 48 | #define STN_DAT_PIN2 (0x01 << 4) |
| 49 | #define STN_DAT_PIN4 (0x02 << 4) |
| 50 | #define STN_DAT_PIN8 (0x03 << 4) |
| 51 | #define STN_DAT_PINMASK STN_DAT_PIN8 |
| 52 | |
| 53 | #define STFT_PSHI (1 << 15) |
| 54 | #define STFT_CLSHI (1 << 14) |
| 55 | #define STFT_SPLHI (1 << 13) |
| 56 | #define STFT_REVHI (1 << 12) |
| 57 | |
| 58 | #define SYNC_MASTER (0 << 16) |
| 59 | #define SYNC_SLAVE (1 << 16) |
| 60 | |
| 61 | #define DE_P (0 << 9) |
| 62 | #define DE_N (1 << 9) |
| 63 | |
| 64 | #define PCLK_P (0 << 10) |
| 65 | #define PCLK_N (1 << 10) |
| 66 | |
| 67 | #define HSYNC_P (0 << 11) |
| 68 | #define HSYNC_N (1 << 11) |
| 69 | |
| 70 | #define VSYNC_P (0 << 8) |
| 71 | #define VSYNC_N (1 << 8) |
| 72 | |
| 73 | #define DATA_NORMAL (0 << 17) |
| 74 | #define DATA_INVERSE (1 << 17) |
| 75 | |
| 76 | |
| 77 | /* Jz LCDFB supported I/O controls. */ |
| 78 | #define FBIOSETBACKLIGHT 0x4688 |
| 79 | #define FBIODISPON 0x4689 |
| 80 | #define FBIODISPOFF 0x468a |
| 81 | #define FBIORESET 0x468b |
| 82 | #define FBIOPRINT_REG 0x468c |
| 83 | |
| 84 | /* |
| 85 | * LCD panel specific definition |
| 86 | */ |
| 87 | #define MODE (0xc9) /* 8bit serial RGB */ |
| 88 | |
| 89 | #define __spi_write_reg1(reg, val) \ |
| 90 | do { \ |
| 91 | unsigned char no; \ |
| 92 | unsigned short value; \ |
| 93 | unsigned char a=reg; \ |
| 94 | unsigned char b=val; \ |
| 95 | __gpio_set_pin(SPEN); \ |
| 96 | __gpio_set_pin(SPCK); \ |
| 97 | __gpio_clear_pin(SPDA); \ |
| 98 | __gpio_clear_pin(SPEN); \ |
| 99 | value=((a<<8)|(b&0xFF)); \ |
| 100 | for(no=0;no<16;no++) \ |
| 101 | { \ |
| 102 | __gpio_clear_pin(SPCK); \ |
| 103 | if((value&0x8000)==0x8000) \ |
| 104 | __gpio_set_pin(SPDA); \ |
| 105 | else \ |
| 106 | __gpio_clear_pin(SPDA); \ |
| 107 | __gpio_set_pin(SPCK); \ |
| 108 | value=(value<<1); \ |
| 109 | } \ |
| 110 | __gpio_set_pin(SPEN); \ |
| 111 | } while (0) |
| 112 | |
| 113 | #define __lcd_display_pin_init() \ |
| 114 | do { \ |
| 115 | __cpm_start_tcu(); \ |
| 116 | __gpio_as_output(SPEN); /* use SPDA */ \ |
| 117 | __gpio_as_output(SPCK); /* use SPCK */ \ |
| 118 | __gpio_as_output(SPDA); /* use SPDA */ \ |
| 119 | } while (0) |
| 120 | |
| 121 | #define __lcd_display_on() \ |
| 122 | do { \ |
| 123 | __spi_write_reg1(0x05, 0x1e); \ |
| 124 | __spi_write_reg1(0x05, 0x5e); \ |
| 125 | __spi_write_reg1(0x07, 0x8d); \ |
| 126 | __spi_write_reg1(0x13, 0x01); \ |
| 127 | __spi_write_reg1(0x05, 0x5f); \ |
| 128 | } while (0) |
| 129 | |
| 130 | #define __lcd_display_off() \ |
| 131 | do { \ |
| 132 | __spi_write_reg1(0x05, 0x5e); \ |
| 133 | } while (0) |
| 134 | |
| 135 | #endif /* __QI_LB60_GPM940B0_H__ */ |
| 136 | |
