Root/target/linux/adm5120/files/arch/mips/adm5120/common/gpio.c

1/*
2 * ADM5120 generic GPIO API support via GPIOLIB
3 *
4 * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 */
11
12#include <linux/autoconf.h>
13#include <linux/init.h>
14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/irq.h>
17#include <linux/delay.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20#include <linux/gpio.h>
21
22#include <asm/addrspace.h>
23
24#include <asm/mach-adm5120/adm5120_defs.h>
25#include <asm/mach-adm5120/adm5120_info.h>
26#include <asm/mach-adm5120/adm5120_switch.h>
27
28#define GPIO_REG(r) (void __iomem *)(KSEG1ADDR(ADM5120_SWITCH_BASE) + r)
29
30struct gpio1_desc {
31    void __iomem *reg; /* register address */
32    u8 iv_shift; /* shift amount for input bit */
33    u8 mode_shift; /* shift amount for mode bits */
34};
35
36#define GPIO1_DESC(p, l) { \
37        .reg = GPIO_REG(SWITCH_REG_PORT0_LED + ((p) * 4)), \
38        .iv_shift = LED0_IV_SHIFT + (l), \
39        .mode_shift = (l) * 4 \
40    }
41
42static struct gpio1_desc gpio1_table[15] = {
43    GPIO1_DESC(0, 0), GPIO1_DESC(0, 1), GPIO1_DESC(0, 2),
44    GPIO1_DESC(1, 0), GPIO1_DESC(1, 1), GPIO1_DESC(1, 2),
45    GPIO1_DESC(2, 0), GPIO1_DESC(2, 1), GPIO1_DESC(2, 2),
46    GPIO1_DESC(3, 0), GPIO1_DESC(3, 1), GPIO1_DESC(3, 2),
47    GPIO1_DESC(4, 0), GPIO1_DESC(4, 1), GPIO1_DESC(4, 2)
48};
49
50static u32 gpio_conf2;
51
52int adm5120_gpio_to_irq(unsigned gpio)
53{
54    int ret;
55
56    switch (gpio) {
57    case ADM5120_GPIO_PIN2:
58        ret = ADM5120_IRQ_GPIO2;
59        break;
60    case ADM5120_GPIO_PIN4:
61        ret = ADM5120_IRQ_GPIO4;
62        break;
63    default:
64        ret = -EINVAL;
65        break;
66    }
67
68    return ret;
69}
70EXPORT_SYMBOL(adm5120_gpio_to_irq);
71
72int adm5120_irq_to_gpio(unsigned irq)
73{
74    int ret;
75
76    switch (irq) {
77    case ADM5120_IRQ_GPIO2:
78        ret = ADM5120_GPIO_PIN2;
79        break;
80    case ADM5120_IRQ_GPIO4:
81        ret = ADM5120_GPIO_PIN4;
82        break;
83    default:
84        ret = -EINVAL;
85        break;
86    }
87
88    return ret;
89}
90EXPORT_SYMBOL(adm5120_irq_to_gpio);
91
92/*
93 * Helpers for GPIO lines in GPIO_CONF0 register
94 */
95#define PIN_IM(p) ((1 << GPIO_CONF0_IM_SHIFT) << p)
96#define PIN_IV(p) ((1 << GPIO_CONF0_IV_SHIFT) << p)
97#define PIN_OE(p) ((1 << GPIO_CONF0_OE_SHIFT) << p)
98#define PIN_OV(p) ((1 << GPIO_CONF0_OV_SHIFT) << p)
99
100int __adm5120_gpio0_get_value(unsigned offset)
101{
102    void __iomem **reg;
103    u32 t;
104
105    reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
106
107    t = __raw_readl(reg);
108    if ((t & PIN_IM(offset)) != 0)
109        t &= PIN_IV(offset);
110    else
111        t &= PIN_OV(offset);
112
113    return (t) ? 1 : 0;
114}
115EXPORT_SYMBOL(__adm5120_gpio0_get_value);
116
117void __adm5120_gpio0_set_value(unsigned offset, int value)
118{
119    void __iomem **reg;
120    u32 t;
121
122    reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
123
124    t = __raw_readl(reg);
125    if (value == 0)
126        t &= ~(PIN_OV(offset));
127    else
128        t |= PIN_OV(offset);
129
130    __raw_writel(t, reg);
131}
132EXPORT_SYMBOL(__adm5120_gpio0_set_value);
133
134static int adm5120_gpio0_get_value(struct gpio_chip *chip, unsigned offset)
135{
136    return __adm5120_gpio0_get_value(offset);
137}
138
139static void adm5120_gpio0_set_value(struct gpio_chip *chip,
140                    unsigned offset, int value)
141{
142    __adm5120_gpio0_set_value(offset, value);
143}
144
145static int adm5120_gpio0_direction_input(struct gpio_chip *chip,
146                     unsigned offset)
147{
148    void __iomem **reg;
149    u32 t;
150
151    reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
152
153    t = __raw_readl(reg);
154    t &= ~(PIN_OE(offset));
155    t |= PIN_IM(offset);
156    __raw_writel(t, reg);
157
158    return 0;
159}
160
161static int adm5120_gpio0_direction_output(struct gpio_chip *chip,
162                      unsigned offset, int value)
163{
164    void __iomem **reg;
165    u32 t;
166
167    reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
168
169    t = __raw_readl(reg);
170    t &= ~(PIN_IM(offset) | PIN_OV(offset));
171    t |= PIN_OE(offset);
172
173    if (value)
174        t |= PIN_OV(offset);
175
176    __raw_writel(t, reg);
177
178    return 0;
179}
180
181static struct gpio_chip adm5120_gpio0_chip = {
182    .label = "adm5120 gpio0",
183    .get = adm5120_gpio0_get_value,
184    .set = adm5120_gpio0_set_value,
185    .direction_input = adm5120_gpio0_direction_input,
186    .direction_output = adm5120_gpio0_direction_output,
187    .base = ADM5120_GPIO_PIN0,
188    .ngpio = ADM5120_GPIO_PIN7 - ADM5120_GPIO_PIN0 + 1,
189};
190
191int __adm5120_gpio1_get_value(unsigned offset)
192{
193    void __iomem **reg;
194    u32 t, m;
195
196    reg = gpio1_table[offset].reg;
197
198    t = __raw_readl(reg);
199    m = (t >> gpio1_table[offset].mode_shift) & LED_MODE_MASK;
200    if (m == LED_MODE_INPUT)
201        return (t >> gpio1_table[offset].iv_shift) & 1;
202
203    if (m == LED_MODE_OUT_LOW)
204        return 0;
205
206    return 1;
207}
208EXPORT_SYMBOL(__adm5120_gpio1_get_value);
209
210void __adm5120_gpio1_set_value(unsigned offset, int value)
211{
212    void __iomem **reg;
213    u32 t, s;
214
215    reg = gpio1_table[offset].reg;
216    s = gpio1_table[offset].mode_shift;
217
218    t = __raw_readl(reg);
219    t &= ~(LED_MODE_MASK << s);
220
221    switch (value) {
222    case ADM5120_GPIO_LOW:
223        t |= (LED_MODE_OUT_LOW << s);
224        break;
225    case ADM5120_GPIO_FLASH:
226    case ADM5120_GPIO_LINK:
227    case ADM5120_GPIO_SPEED:
228    case ADM5120_GPIO_DUPLEX:
229    case ADM5120_GPIO_ACT:
230    case ADM5120_GPIO_COLL:
231    case ADM5120_GPIO_LINK_ACT:
232    case ADM5120_GPIO_DUPLEX_COLL:
233    case ADM5120_GPIO_10M_ACT:
234    case ADM5120_GPIO_100M_ACT:
235        t |= ((value & LED_MODE_MASK) << s);
236        break;
237    default:
238        t |= (LED_MODE_OUT_HIGH << s);
239        break;
240    }
241
242    __raw_writel(t, reg);
243}
244EXPORT_SYMBOL(__adm5120_gpio1_set_value);
245
246static int adm5120_gpio1_get_value(struct gpio_chip *chip, unsigned offset)
247{
248    return __adm5120_gpio1_get_value(offset);
249}
250
251static void adm5120_gpio1_set_value(struct gpio_chip *chip,
252                    unsigned offset, int value)
253{
254    __adm5120_gpio1_set_value(offset, value);
255}
256
257static int adm5120_gpio1_direction_input(struct gpio_chip *chip,
258                     unsigned offset)
259{
260    void __iomem **reg;
261    u32 t;
262
263    reg = gpio1_table[offset].reg;
264    t = __raw_readl(reg);
265    t &= ~(LED_MODE_MASK << gpio1_table[offset].mode_shift);
266    __raw_writel(t, reg);
267
268    return 0;
269}
270
271static int adm5120_gpio1_direction_output(struct gpio_chip *chip,
272                      unsigned offset, int value)
273{
274    __adm5120_gpio1_set_value(offset, value);
275    return 0;
276}
277
278static struct gpio_chip adm5120_gpio1_chip = {
279    .label = "adm5120 gpio1",
280    .get = adm5120_gpio1_get_value,
281    .set = adm5120_gpio1_set_value,
282    .direction_input = adm5120_gpio1_direction_input,
283    .direction_output = adm5120_gpio1_direction_output,
284    .base = ADM5120_GPIO_P0L0,
285    .ngpio = ADM5120_GPIO_P4L2 - ADM5120_GPIO_P0L0 + 1,
286};
287
288void __init adm5120_gpio_csx0_enable(void)
289{
290    gpio_conf2 |= GPIO_CONF2_CSX0;
291    SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
292
293    gpio_request(ADM5120_GPIO_PIN1, "CSX0");
294}
295
296void __init adm5120_gpio_csx1_enable(void)
297{
298    gpio_conf2 |= GPIO_CONF2_CSX1;
299    SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
300
301    gpio_request(ADM5120_GPIO_PIN3, "CSX1");
302}
303
304void __init adm5120_gpio_ew_enable(void)
305{
306    gpio_conf2 |= GPIO_CONF2_EW;
307    SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
308
309    gpio_request(ADM5120_GPIO_PIN0, "EW");
310}
311
312void __init adm5120_gpio_init(void)
313{
314    int err;
315
316    SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
317
318    if (adm5120_package_pqfp()) {
319        gpiochip_reserve(ADM5120_GPIO_PIN4, 4);
320        adm5120_gpio0_chip.ngpio = 4;
321    }
322
323    err = gpiochip_add(&adm5120_gpio0_chip);
324    if (err)
325        panic("cannot add ADM5120 GPIO0 chip, error=%d", err);
326
327    err = gpiochip_add(&adm5120_gpio1_chip);
328    if (err)
329        panic("cannot add ADM5120 GPIO1 chip, error=%d", err);
330
331}
332

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