| 1 | /* |
| 2 | * Atheros AP91 reference board PCI initialization |
| 3 | * |
| 4 | * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/pci.h> |
| 12 | #include <linux/ath9k_platform.h> |
| 13 | #include <linux/delay.h> |
| 14 | |
| 15 | #include <asm/mach-ar71xx/ar71xx.h> |
| 16 | #include <asm/mach-ar71xx/pci.h> |
| 17 | |
| 18 | #include "dev-ap91-pci.h" |
| 19 | |
| 20 | static struct ath9k_platform_data ap91_wmac_data = { |
| 21 | .led_pin = -1, |
| 22 | }; |
| 23 | static char ap91_wmac_mac[6]; |
| 24 | static int ap91_pci_fixup_enabled; |
| 25 | |
| 26 | static struct ar71xx_pci_irq ap91_pci_irqs[] __initdata = { |
| 27 | { |
| 28 | .slot = 0, |
| 29 | .pin = 1, |
| 30 | .irq = AR71XX_PCI_IRQ_DEV0, |
| 31 | } |
| 32 | }; |
| 33 | |
| 34 | static int ap91_pci_plat_dev_init(struct pci_dev *dev) |
| 35 | { |
| 36 | switch(PCI_SLOT(dev->devfn)) { |
| 37 | case 0: |
| 38 | dev->dev.platform_data = &ap91_wmac_data; |
| 39 | break; |
| 40 | } |
| 41 | |
| 42 | return 0; |
| 43 | } |
| 44 | |
| 45 | static void ap91_pci_fixup(struct pci_dev *dev) |
| 46 | { |
| 47 | void __iomem *mem; |
| 48 | u16 *cal_data; |
| 49 | u16 cmd; |
| 50 | u32 val; |
| 51 | |
| 52 | if (!ap91_pci_fixup_enabled) |
| 53 | return; |
| 54 | |
| 55 | printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev)); |
| 56 | |
| 57 | cal_data = ap91_wmac_data.eeprom_data; |
| 58 | if (*cal_data != 0xa55a) { |
| 59 | printk(KERN_ERR "PCI: no calibration data found for %s\n", |
| 60 | pci_name(dev)); |
| 61 | return; |
| 62 | } |
| 63 | |
| 64 | mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000); |
| 65 | if (!mem) { |
| 66 | printk(KERN_ERR "PCI: ioremap error for device %s\n", |
| 67 | pci_name(dev)); |
| 68 | return; |
| 69 | } |
| 70 | |
| 71 | /* Setup the PCI device to allow access to the internal registers */ |
| 72 | pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff); |
| 73 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
| 74 | cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; |
| 75 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
| 76 | |
| 77 | /* set pointer to first reg address */ |
| 78 | cal_data += 3; |
| 79 | while (*cal_data != 0xffff) { |
| 80 | u32 reg; |
| 81 | reg = *cal_data++; |
| 82 | val = *cal_data++; |
| 83 | val |= (*cal_data++) << 16; |
| 84 | |
| 85 | __raw_writel(val, mem + reg); |
| 86 | udelay(100); |
| 87 | } |
| 88 | |
| 89 | pci_read_config_dword(dev, PCI_VENDOR_ID, &val); |
| 90 | dev->vendor = val & 0xffff; |
| 91 | dev->device = (val >> 16) & 0xffff; |
| 92 | |
| 93 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); |
| 94 | dev->revision = val & 0xff; |
| 95 | dev->class = val >> 8; /* upper 3 bytes */ |
| 96 | |
| 97 | iounmap(mem); |
| 98 | } |
| 99 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap91_pci_fixup); |
| 100 | |
| 101 | __init void ap91_pci_setup_wmac_led_pin(int pin) |
| 102 | { |
| 103 | ap91_wmac_data.led_pin = pin; |
| 104 | } |
| 105 | |
| 106 | __init void ap91_pci_setup_wmac_gpio(u32 mask, u32 val) |
| 107 | { |
| 108 | ap91_wmac_data.gpio_mask = mask; |
| 109 | ap91_wmac_data.gpio_val = val; |
| 110 | } |
| 111 | |
| 112 | void __init ap91_pci_init(u8 *cal_data, u8 *mac_addr) |
| 113 | { |
| 114 | if (cal_data) |
| 115 | memcpy(ap91_wmac_data.eeprom_data, cal_data, |
| 116 | sizeof(ap91_wmac_data.eeprom_data)); |
| 117 | |
| 118 | if (mac_addr) { |
| 119 | memcpy(ap91_wmac_mac, mac_addr, sizeof(ap91_wmac_mac)); |
| 120 | ap91_wmac_data.macaddr = ap91_wmac_mac; |
| 121 | } |
| 122 | |
| 123 | ar71xx_pci_plat_dev_init = ap91_pci_plat_dev_init; |
| 124 | ar71xx_pci_init(ARRAY_SIZE(ap91_pci_irqs), ap91_pci_irqs); |
| 125 | |
| 126 | ap91_pci_fixup_enabled = 1; |
| 127 | } |
| 128 | |
