| 1 | /* |
| 2 | * Atheros AR71xx PCI setup code |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 6 | * |
| 7 | * Parts of this file are based on Atheros' 2.6.15 BSP |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License version 2 as published |
| 11 | * by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | |
| 16 | #include <asm/traps.h> |
| 17 | |
| 18 | #include <asm/mach-ar71xx/ar71xx.h> |
| 19 | #include <asm/mach-ar71xx/pci.h> |
| 20 | |
| 21 | unsigned ar71xx_pci_nr_irqs __initdata; |
| 22 | struct ar71xx_pci_irq *ar71xx_pci_irq_map __initdata; |
| 23 | |
| 24 | int (*ar71xx_pci_plat_dev_init)(struct pci_dev *dev); |
| 25 | |
| 26 | static int ar71xx_be_handler(struct pt_regs *regs, int is_fixup) |
| 27 | { |
| 28 | int err = 0; |
| 29 | |
| 30 | err = ar71xx_pci_be_handler(is_fixup); |
| 31 | |
| 32 | return (is_fixup && !err) ? MIPS_BE_FIXUP : MIPS_BE_FATAL; |
| 33 | } |
| 34 | |
| 35 | int pcibios_plat_dev_init(struct pci_dev *dev) |
| 36 | { |
| 37 | if (ar71xx_pci_plat_dev_init) |
| 38 | return ar71xx_pci_plat_dev_init(dev); |
| 39 | |
| 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) |
| 44 | { |
| 45 | int ret = 0; |
| 46 | |
| 47 | switch (ar71xx_soc) { |
| 48 | case AR71XX_SOC_AR7130: |
| 49 | case AR71XX_SOC_AR7141: |
| 50 | case AR71XX_SOC_AR7161: |
| 51 | ret = ar71xx_pcibios_map_irq(dev, slot, pin); |
| 52 | break; |
| 53 | |
| 54 | case AR71XX_SOC_AR7240: |
| 55 | case AR71XX_SOC_AR7241: |
| 56 | case AR71XX_SOC_AR7242: |
| 57 | ret = ar724x_pcibios_map_irq(dev, slot, pin); |
| 58 | break; |
| 59 | |
| 60 | default: |
| 61 | break; |
| 62 | } |
| 63 | |
| 64 | return ret; |
| 65 | } |
| 66 | |
| 67 | int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) |
| 68 | { |
| 69 | int ret = 0; |
| 70 | |
| 71 | switch (ar71xx_soc) { |
| 72 | case AR71XX_SOC_AR7130: |
| 73 | case AR71XX_SOC_AR7141: |
| 74 | case AR71XX_SOC_AR7161: |
| 75 | board_be_handler = ar71xx_be_handler; |
| 76 | ret = ar71xx_pcibios_init(); |
| 77 | break; |
| 78 | |
| 79 | case AR71XX_SOC_AR7240: |
| 80 | case AR71XX_SOC_AR7241: |
| 81 | case AR71XX_SOC_AR7242: |
| 82 | ret = ar724x_pcibios_init(); |
| 83 | break; |
| 84 | |
| 85 | default: |
| 86 | return 0; |
| 87 | } |
| 88 | |
| 89 | ar71xx_pci_nr_irqs = nr_irqs; |
| 90 | ar71xx_pci_irq_map = map; |
| 91 | |
| 92 | return ret; |
| 93 | } |
| 94 | |
