Root/target/linux/ar71xx/files/drivers/spi/pb44_spi.c

1/*
2 * Atheros PB44 board SPI controller driver
3 *
4 * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/spinlock.h>
16#include <linux/workqueue.h>
17#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <linux/spi/spi.h>
20#include <linux/spi/spi_bitbang.h>
21#include <linux/bitops.h>
22#include <linux/gpio.h>
23
24#include <asm/mach-ar71xx/ar71xx.h>
25#include <asm/mach-ar71xx/platform.h>
26
27#define DRV_DESC "Atheros PB44 SPI Controller driver"
28#define DRV_VERSION "0.1.0"
29#define DRV_NAME "pb44-spi"
30
31#undef PER_BIT_READ
32
33struct ar71xx_spi {
34    struct spi_bitbang bitbang;
35    u32 ioc_base;
36    u32 reg_ctrl;
37
38    void __iomem *base;
39
40    struct platform_device *pdev;
41};
42
43static inline u32 pb44_spi_rr(struct ar71xx_spi *sp, unsigned reg)
44{
45    return __raw_readl(sp->base + reg);
46}
47
48static inline void pb44_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
49{
50    __raw_writel(val, sp->base + reg);
51}
52
53static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
54{
55    return spi_master_get_devdata(spi->master);
56}
57
58static void pb44_spi_chipselect(struct spi_device *spi, int is_active)
59{
60    struct ar71xx_spi *sp = spidev_to_sp(spi);
61    int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
62
63    if (is_active) {
64        /* set initial clock polarity */
65        if (spi->mode & SPI_CPOL)
66            sp->ioc_base |= SPI_IOC_CLK;
67        else
68            sp->ioc_base &= ~SPI_IOC_CLK;
69
70        pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
71    }
72
73    if (spi->chip_select) {
74        unsigned long gpio = (unsigned long) spi->controller_data;
75
76        /* SPI is normally active-low */
77        gpio_set_value(gpio, cs_high);
78    } else {
79        if (cs_high)
80            sp->ioc_base |= SPI_IOC_CS0;
81        else
82            sp->ioc_base &= ~SPI_IOC_CS0;
83
84        pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
85    }
86
87}
88
89static int pb44_spi_setup_cs(struct spi_device *spi)
90{
91    struct ar71xx_spi *sp = spidev_to_sp(spi);
92
93    /* enable GPIO mode */
94    pb44_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO);
95
96    /* save CTRL register */
97    sp->reg_ctrl = pb44_spi_rr(sp, SPI_REG_CTRL);
98    sp->ioc_base = pb44_spi_rr(sp, SPI_REG_IOC);
99
100    /* TODO: setup speed? */
101    pb44_spi_wr(sp, SPI_REG_CTRL, 0x43);
102
103    if (spi->chip_select) {
104        unsigned long gpio = (unsigned long) spi->controller_data;
105        int status = 0;
106
107        status = gpio_request(gpio, dev_name(&spi->dev));
108        if (status)
109            return status;
110
111        status = gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH);
112        if (status) {
113            gpio_free(gpio);
114            return status;
115        }
116    } else {
117        if (spi->mode & SPI_CS_HIGH)
118            sp->ioc_base |= SPI_IOC_CS0;
119        else
120            sp->ioc_base &= ~SPI_IOC_CS0;
121        pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
122    }
123
124    return 0;
125}
126
127static void pb44_spi_cleanup_cs(struct spi_device *spi)
128{
129    struct ar71xx_spi *sp = spidev_to_sp(spi);
130
131    if (spi->chip_select) {
132        unsigned long gpio = (unsigned long) spi->controller_data;
133        gpio_free(gpio);
134    }
135
136    /* restore CTRL register */
137    pb44_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
138    /* disable GPIO mode */
139    pb44_spi_wr(sp, SPI_REG_FS, 0);
140}
141
142static int pb44_spi_setup(struct spi_device *spi)
143{
144    int status = 0;
145
146    if (spi->bits_per_word > 32)
147        return -EINVAL;
148
149    if (!spi->controller_state) {
150        status = pb44_spi_setup_cs(spi);
151        if (status)
152            return status;
153    }
154
155    status = spi_bitbang_setup(spi);
156    if (status && !spi->controller_state)
157        pb44_spi_cleanup_cs(spi);
158
159    return status;
160}
161
162static void pb44_spi_cleanup(struct spi_device *spi)
163{
164    pb44_spi_cleanup_cs(spi);
165    spi_bitbang_cleanup(spi);
166}
167
168static u32 pb44_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
169                   u32 word, u8 bits)
170{
171    struct ar71xx_spi *sp = spidev_to_sp(spi);
172    u32 ioc = sp->ioc_base;
173    u32 ret;
174
175    /* clock starts at inactive polarity */
176    for (word <<= (32 - bits); likely(bits); bits--) {
177        u32 out;
178
179        if (word & (1 << 31))
180            out = ioc | SPI_IOC_DO;
181        else
182            out = ioc & ~SPI_IOC_DO;
183
184        /* setup MSB (to slave) on trailing edge */
185        pb44_spi_wr(sp, SPI_REG_IOC, out);
186        pb44_spi_wr(sp, SPI_REG_IOC, out | SPI_IOC_CLK);
187
188        word <<= 1;
189
190#ifdef PER_BIT_READ
191        /* sample MSB (from slave) on leading edge */
192        ret = pb44_spi_rr(sp, SPI_REG_RDS);
193        pb44_spi_wr(sp, SPI_REG_IOC, out);
194#endif
195    }
196
197#ifndef PER_BIT_READ
198    ret = pb44_spi_rr(sp, SPI_REG_RDS);
199#endif
200    return ret;
201}
202
203static int pb44_spi_probe(struct platform_device *pdev)
204{
205    struct spi_master *master;
206    struct ar71xx_spi *sp;
207    struct ar71xx_spi_platform_data *pdata;
208    struct resource *r;
209    int ret;
210
211    master = spi_alloc_master(&pdev->dev, sizeof(*sp));
212    if (master == NULL) {
213        dev_err(&pdev->dev, "failed to allocate spi master\n");
214        return -ENOMEM;
215    }
216
217    sp = spi_master_get_devdata(master);
218    platform_set_drvdata(pdev, sp);
219
220    pdata = pdev->dev.platform_data;
221
222    master->setup = pb44_spi_setup;
223    master->cleanup = pb44_spi_cleanup;
224    if (pdata) {
225        master->bus_num = pdata->bus_num;
226        master->num_chipselect = pdata->num_chipselect;
227    } else {
228        master->bus_num = 0;
229        master->num_chipselect = 1;
230    }
231
232    sp->bitbang.master = spi_master_get(master);
233    sp->bitbang.chipselect = pb44_spi_chipselect;
234    sp->bitbang.txrx_word[SPI_MODE_0] = pb44_spi_txrx_mode0;
235    sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
236    sp->bitbang.flags = SPI_CS_HIGH;
237
238    r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
239    if (r == NULL) {
240        ret = -ENOENT;
241        goto err1;
242    }
243
244    sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
245    if (!sp->base) {
246        ret = -ENXIO;
247        goto err1;
248    }
249
250    ret = spi_bitbang_start(&sp->bitbang);
251    if (!ret)
252        return 0;
253
254    iounmap(sp->base);
255 err1:
256    platform_set_drvdata(pdev, NULL);
257    spi_master_put(sp->bitbang.master);
258
259    return ret;
260}
261
262static int pb44_spi_remove(struct platform_device *pdev)
263{
264    struct ar71xx_spi *sp = platform_get_drvdata(pdev);
265
266    spi_bitbang_stop(&sp->bitbang);
267    iounmap(sp->base);
268    platform_set_drvdata(pdev, NULL);
269    spi_master_put(sp->bitbang.master);
270
271    return 0;
272}
273
274static struct platform_driver pb44_spi_drv = {
275    .probe = pb44_spi_probe,
276    .remove = pb44_spi_remove,
277    .driver = {
278        .name = DRV_NAME,
279        .owner = THIS_MODULE,
280    },
281};
282
283static int __init pb44_spi_init(void)
284{
285    return platform_driver_register(&pb44_spi_drv);
286}
287module_init(pb44_spi_init);
288
289static void __exit pb44_spi_exit(void)
290{
291    platform_driver_unregister(&pb44_spi_drv);
292}
293module_exit(pb44_spi_exit);
294
295MODULE_ALIAS("platform:" DRV_NAME);
296MODULE_DESCRIPTION(DRV_DESC);
297MODULE_VERSION(DRV_VERSION);
298MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
299MODULE_LICENSE("GPL v2");
300

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