| 1 | /* |
| 2 | * Generic interrupt control functions for Broadcom MIPS boards |
| 3 | * |
| 4 | * Copyright 2004, Broadcom Corporation |
| 5 | * All Rights Reserved. |
| 6 | * |
| 7 | * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
| 8 | * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
| 9 | * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
| 10 | * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/config.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/types.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/irq.h> |
| 20 | |
| 21 | #include <asm/irq.h> |
| 22 | #include <asm/mipsregs.h> |
| 23 | #include <asm/gdb-stub.h> |
| 24 | |
| 25 | #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5) |
| 26 | |
| 27 | extern asmlinkage void brcmIRQ(void); |
| 28 | extern asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs); |
| 29 | |
| 30 | void |
| 31 | brcm_irq_dispatch(struct pt_regs *regs) |
| 32 | { |
| 33 | u32 cause; |
| 34 | |
| 35 | cause = read_c0_cause() & |
| 36 | read_c0_status() & |
| 37 | CAUSEF_IP; |
| 38 | |
| 39 | #ifdef CONFIG_KERNPROF |
| 40 | change_c0_status(cause | 1, 1); |
| 41 | #else |
| 42 | clear_c0_status(cause); |
| 43 | #endif |
| 44 | |
| 45 | if (cause & CAUSEF_IP7) |
| 46 | do_IRQ(7, regs); |
| 47 | if (cause & CAUSEF_IP2) |
| 48 | do_IRQ(2, regs); |
| 49 | if (cause & CAUSEF_IP3) |
| 50 | do_IRQ(3, regs); |
| 51 | if (cause & CAUSEF_IP4) |
| 52 | do_IRQ(4, regs); |
| 53 | if (cause & CAUSEF_IP5) |
| 54 | do_IRQ(5, regs); |
| 55 | if (cause & CAUSEF_IP6) |
| 56 | do_IRQ(6, regs); |
| 57 | } |
| 58 | |
| 59 | static void |
| 60 | enable_brcm_irq(unsigned int irq) |
| 61 | { |
| 62 | if (irq < 8) |
| 63 | set_c0_status(1 << (irq + 8)); |
| 64 | else |
| 65 | set_c0_status(IE_IRQ0); |
| 66 | } |
| 67 | |
| 68 | static void |
| 69 | disable_brcm_irq(unsigned int irq) |
| 70 | { |
| 71 | if (irq < 8) |
| 72 | clear_c0_status(1 << (irq + 8)); |
| 73 | else |
| 74 | clear_c0_status(IE_IRQ0); |
| 75 | } |
| 76 | |
| 77 | static void |
| 78 | ack_brcm_irq(unsigned int irq) |
| 79 | { |
| 80 | /* Already done in brcm_irq_dispatch */ |
| 81 | } |
| 82 | |
| 83 | static unsigned int |
| 84 | startup_brcm_irq(unsigned int irq) |
| 85 | { |
| 86 | enable_brcm_irq(irq); |
| 87 | |
| 88 | return 0; /* never anything pending */ |
| 89 | } |
| 90 | |
| 91 | static void |
| 92 | end_brcm_irq(unsigned int irq) |
| 93 | { |
| 94 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
| 95 | enable_brcm_irq(irq); |
| 96 | } |
| 97 | |
| 98 | static struct hw_interrupt_type brcm_irq_type = { |
| 99 | typename: "MIPS", |
| 100 | startup: startup_brcm_irq, |
| 101 | shutdown: disable_brcm_irq, |
| 102 | enable: enable_brcm_irq, |
| 103 | disable: disable_brcm_irq, |
| 104 | ack: ack_brcm_irq, |
| 105 | end: end_brcm_irq, |
| 106 | NULL |
| 107 | }; |
| 108 | |
| 109 | void __init |
| 110 | init_IRQ(void) |
| 111 | { |
| 112 | int i; |
| 113 | |
| 114 | for (i = 0; i < NR_IRQS; i++) { |
| 115 | irq_desc[i].status = IRQ_DISABLED; |
| 116 | irq_desc[i].action = 0; |
| 117 | irq_desc[i].depth = 1; |
| 118 | irq_desc[i].handler = &brcm_irq_type; |
| 119 | } |
| 120 | |
| 121 | set_except_vector(0, brcmIRQ); |
| 122 | change_c0_status(ST0_IM, ALLINTS); |
| 123 | |
| 124 | #ifdef CONFIG_REMOTE_DEBUG |
| 125 | printk("Breaking into debugger...\n"); |
| 126 | set_debug_traps(); |
| 127 | breakpoint(); |
| 128 | #endif |
| 129 | } |
| 130 | |
