| 1 | /* |
| 2 | * Copyright 2006, Broadcom Corporation |
| 3 | * All Rights Reserved. |
| 4 | * |
| 5 | * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
| 6 | * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
| 7 | * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
| 8 | * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
| 9 | * |
| 10 | */ |
| 11 | #include <linux/config.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/sched.h> |
| 15 | #include <linux/serial_reg.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <asm/addrspace.h> |
| 18 | #include <asm/io.h> |
| 19 | #include <asm/time.h> |
| 20 | |
| 21 | #include <typedefs.h> |
| 22 | #include <osl.h> |
| 23 | #include <bcmnvram.h> |
| 24 | #include <sbconfig.h> |
| 25 | #include <sbutils.h> |
| 26 | #include <sbchipc.h> |
| 27 | #include <hndmips.h> |
| 28 | #include <mipsinc.h> |
| 29 | #include <hndcpu.h> |
| 30 | #include <bcmdevs.h> |
| 31 | |
| 32 | /* Global SB handle */ |
| 33 | extern void *bcm947xx_sbh; |
| 34 | extern spinlock_t bcm947xx_sbh_lock; |
| 35 | |
| 36 | /* Convenience */ |
| 37 | #define sbh bcm947xx_sbh |
| 38 | #define sbh_lock bcm947xx_sbh_lock |
| 39 | |
| 40 | extern int panic_timeout; |
| 41 | static int watchdog = 0; |
| 42 | |
| 43 | void __init |
| 44 | bcm947xx_time_init(void) |
| 45 | { |
| 46 | unsigned int hz; |
| 47 | |
| 48 | /* |
| 49 | * Use deterministic values for initial counter interrupt |
| 50 | * so that calibrate delay avoids encountering a counter wrap. |
| 51 | */ |
| 52 | write_c0_count(0); |
| 53 | write_c0_compare(0xffff); |
| 54 | |
| 55 | if (!(hz = sb_cpu_clock(sbh))) |
| 56 | hz = 100000000; |
| 57 | |
| 58 | printk("CPU: BCM%04x rev %d at %d MHz\n", sb_chip(sbh), sb_chiprev(sbh), |
| 59 | (hz + 500000) / 1000000); |
| 60 | |
| 61 | /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */ |
| 62 | mips_hpt_frequency = hz / 2; |
| 63 | |
| 64 | /* Set watchdog interval in ms */ |
| 65 | watchdog = simple_strtoul(nvram_safe_get("watchdog"), NULL, 0); |
| 66 | |
| 67 | /* Please set the watchdog to 3 sec if it is less than 3 but not equal to 0 */ |
| 68 | if (watchdog > 0) { |
| 69 | if (watchdog < 3000) |
| 70 | watchdog = 3000; |
| 71 | } |
| 72 | |
| 73 | /* Set panic timeout in seconds */ |
| 74 | panic_timeout = watchdog / 1000; |
| 75 | } |
| 76 | |
| 77 | static void |
| 78 | bcm947xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 79 | { |
| 80 | /* Generic MIPS timer code */ |
| 81 | timer_interrupt(irq, dev_id, regs); |
| 82 | |
| 83 | /* Set the watchdog timer to reset after the specified number of ms */ |
| 84 | if (watchdog > 0) { |
| 85 | if (sb_chip(sbh) == BCM5354_CHIP_ID) |
| 86 | sb_watchdog(sbh, WATCHDOG_CLOCK_5354 / 1000 * watchdog); |
| 87 | else |
| 88 | sb_watchdog(sbh, WATCHDOG_CLOCK / 1000 * watchdog); |
| 89 | } |
| 90 | |
| 91 | } |
| 92 | |
| 93 | static struct irqaction bcm947xx_timer_irqaction = { |
| 94 | bcm947xx_timer_interrupt, |
| 95 | SA_INTERRUPT, |
| 96 | 0, |
| 97 | "timer", |
| 98 | NULL, |
| 99 | NULL |
| 100 | }; |
| 101 | |
| 102 | void __init |
| 103 | bcm947xx_timer_setup(struct irqaction *irq) |
| 104 | { |
| 105 | int x; |
| 106 | |
| 107 | /* Enable the timer interrupt */ |
| 108 | setup_irq(7, &bcm947xx_timer_irqaction); |
| 109 | |
| 110 | sti(); |
| 111 | |
| 112 | for (x=0; x<5; x++) { |
| 113 | unsigned long ticks; |
| 114 | ticks = jiffies; |
| 115 | while (ticks == jiffies) |
| 116 | /* do nothing */; |
| 117 | } |
| 118 | } |
| 119 | |
