| 1 | /* |
| 2 | * linux/arch/mips/boot/compressed/head.S |
| 3 | * |
| 4 | * Copyright (C) 2005-2008 Ingenic Semiconductor Inc. |
| 5 | */ |
| 6 | |
| 7 | #include <asm/asm.h> |
| 8 | #include <asm/cacheops.h> |
| 9 | #include <asm/cachectl.h> |
| 10 | #include <asm/regdef.h> |
| 11 | |
| 12 | #define IndexInvalidate_I 0x00 |
| 13 | #define IndexWriteBack_D 0x01 |
| 14 | |
| 15 | .set noreorder |
| 16 | LEAF(startup) |
| 17 | startup: |
| 18 | move s0, a0 /* Save the boot loader transfered args */ |
| 19 | move s1, a1 |
| 20 | move s2, a2 |
| 21 | move s3, a3 |
| 22 | |
| 23 | la a0, _edata |
| 24 | la a1, _end |
| 25 | 1: sw zero, 0(a0) /* Clear BSS section */ |
| 26 | bne a1, a0, 1b |
| 27 | addu a0, 4 |
| 28 | |
| 29 | la sp, (.stack + 8192) |
| 30 | |
| 31 | la a0, __image_begin |
| 32 | la a1, IMAGESIZE |
| 33 | la a2, LOADADDR |
| 34 | la ra, 1f |
| 35 | la k0, decompress_kernel |
| 36 | jr k0 |
| 37 | nop |
| 38 | 1: |
| 39 | |
| 40 | move a0, s0 |
| 41 | move a1, s1 |
| 42 | move a2, s2 |
| 43 | move a3, s3 |
| 44 | li k0, KERNEL_ENTRY |
| 45 | jr k0 |
| 46 | nop |
| 47 | 2: |
| 48 | b 32 |
| 49 | END(startup) |
| 50 | |
| 51 | |
| 52 | LEAF(flushcaches) |
| 53 | la t0, 1f |
| 54 | la t1, 0xa0000000 |
| 55 | or t0, t0, t1 |
| 56 | jr t0 |
| 57 | nop |
| 58 | 1: |
| 59 | li k0, 0x80000000 # start address |
| 60 | li k1, 0x80004000 # end address (16KB I-Cache) |
| 61 | subu k1, 128 |
| 62 | |
| 63 | 2: |
| 64 | .set mips3 |
| 65 | cache IndexWriteBack_D, 0(k0) |
| 66 | cache IndexWriteBack_D, 32(k0) |
| 67 | cache IndexWriteBack_D, 64(k0) |
| 68 | cache IndexWriteBack_D, 96(k0) |
| 69 | cache IndexInvalidate_I, 0(k0) |
| 70 | cache IndexInvalidate_I, 32(k0) |
| 71 | cache IndexInvalidate_I, 64(k0) |
| 72 | cache IndexInvalidate_I, 96(k0) |
| 73 | .set mips0 |
| 74 | |
| 75 | bne k0, k1, 2b |
| 76 | addu k0, k0, 128 |
| 77 | la t0, 3f |
| 78 | jr t0 |
| 79 | nop |
| 80 | 3: |
| 81 | jr ra |
| 82 | nop |
| 83 | END(flushcaches) |
| 84 | |
| 85 | .comm .stack,4096*2,4 |
| 86 | |
