| 1 | /* |
| 2 | * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> |
| 3 | * JZ4740 platform devices |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License as published by the |
| 7 | * Free Software Foundation; either version 2 of the License, or (at your |
| 8 | * option) any later version. |
| 9 | * |
| 10 | * You should have received a copy of the GNU General Public License along |
| 11 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 12 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/device.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/resource.h> |
| 21 | |
| 22 | #include <asm/mach-jz4740/platform.h> |
| 23 | #include <asm/mach-jz4740/regs.h> |
| 24 | #include <asm/mach-jz4740/irq.h> |
| 25 | |
| 26 | /* OHCI (USB full speed host controller) */ |
| 27 | static struct resource jz4740_usb_ohci_resources[] = { |
| 28 | [0] = { |
| 29 | .start = CPHYSADDR(UHC_BASE), |
| 30 | .end = CPHYSADDR(UHC_BASE) + 0x10000 - 1, |
| 31 | .flags = IORESOURCE_MEM, |
| 32 | }, |
| 33 | [1] = { |
| 34 | .start = JZ_IRQ_UHC, |
| 35 | .end = JZ_IRQ_UHC, |
| 36 | .flags = IORESOURCE_IRQ, |
| 37 | }, |
| 38 | }; |
| 39 | |
| 40 | /* The dmamask must be set for OHCI to work */ |
| 41 | static u64 ohci_dmamask = ~(u32)0; |
| 42 | |
| 43 | struct platform_device jz4740_usb_ohci_device = { |
| 44 | .name = "jz-ohci", |
| 45 | .id = 0, |
| 46 | .dev = { |
| 47 | .dma_mask = &ohci_dmamask, |
| 48 | .coherent_dma_mask = 0xffffffff, |
| 49 | }, |
| 50 | .num_resources = ARRAY_SIZE(jz4740_usb_ohci_resources), |
| 51 | .resource = jz4740_usb_ohci_resources, |
| 52 | }; |
| 53 | |
| 54 | /* UDC (USB gadget controller) */ |
| 55 | static struct resource jz4740_usb_gdt_resources[] = { |
| 56 | [0] = { |
| 57 | .start = CPHYSADDR(UDC_BASE), |
| 58 | .end = CPHYSADDR(UDC_BASE) + 0x10000 - 1, |
| 59 | .flags = IORESOURCE_MEM, |
| 60 | }, |
| 61 | [1] = { |
| 62 | .start = JZ_IRQ_UDC, |
| 63 | .end = JZ_IRQ_UDC, |
| 64 | .flags = IORESOURCE_IRQ, |
| 65 | }, |
| 66 | }; |
| 67 | |
| 68 | static u64 jz4740_udc_dmamask = ~(u32)0; |
| 69 | |
| 70 | struct platform_device jz4740_usb_gdt_device = { |
| 71 | .name = "jz-udc", |
| 72 | .id = -1, |
| 73 | .dev = { |
| 74 | .dma_mask = &jz4740_udc_dmamask, |
| 75 | .coherent_dma_mask = 0xffffffff, |
| 76 | }, |
| 77 | .num_resources = ARRAY_SIZE(jz4740_usb_gdt_resources), |
| 78 | .resource = jz4740_usb_gdt_resources, |
| 79 | }; |
| 80 | |
| 81 | /** MMC/SD controller **/ |
| 82 | static struct resource jz4740_mmc_resources[] = { |
| 83 | [0] = { |
| 84 | .start = CPHYSADDR(MSC_BASE), |
| 85 | .end = CPHYSADDR(MSC_BASE) + 0x10000 - 1, |
| 86 | .flags = IORESOURCE_MEM, |
| 87 | }, |
| 88 | [1] = { |
| 89 | .start = JZ_IRQ_MSC, |
| 90 | .end = JZ_IRQ_MSC, |
| 91 | .flags = IORESOURCE_IRQ, |
| 92 | } |
| 93 | }; |
| 94 | |
| 95 | static u64 jz4740_mmc_dmamask = ~(u32)0; |
| 96 | |
| 97 | struct platform_device jz4740_mmc_device = { |
| 98 | .name = "jz4740-mmc", |
| 99 | .id = 0, |
| 100 | .dev = { |
| 101 | .dma_mask = &jz4740_mmc_dmamask, |
| 102 | .coherent_dma_mask = 0xffffffff, |
| 103 | }, |
| 104 | .num_resources = ARRAY_SIZE(jz4740_mmc_resources), |
| 105 | .resource = jz4740_mmc_resources, |
| 106 | }; |
| 107 | |
| 108 | static struct resource jz4740_rtc_resources[] = { |
| 109 | [0] = { |
| 110 | .start = CPHYSADDR(RTC_BASE), |
| 111 | .end = CPHYSADDR(RTC_BASE) + 0x38 - 1, |
| 112 | .flags = IORESOURCE_MEM, |
| 113 | }, |
| 114 | [1] = { |
| 115 | .start = JZ_IRQ_RTC, |
| 116 | .end = JZ_IRQ_RTC, |
| 117 | .flags = IORESOURCE_IRQ, |
| 118 | }, |
| 119 | }; |
| 120 | |
| 121 | struct platform_device jz4740_rtc_device = { |
| 122 | .name = "jz4740-rtc", |
| 123 | .id = -1, |
| 124 | .num_resources = ARRAY_SIZE(jz4740_rtc_resources), |
| 125 | .resource = jz4740_rtc_resources, |
| 126 | }; |
| 127 | |
| 128 | /** I2C controller **/ |
| 129 | static struct resource jz4740_i2c_resources[] = { |
| 130 | [0] = { |
| 131 | .start = CPHYSADDR(I2C_BASE), |
| 132 | .end = CPHYSADDR(I2C_BASE) + 0x10000 - 1, |
| 133 | .flags = IORESOURCE_MEM, |
| 134 | }, |
| 135 | [1] = { |
| 136 | .start = JZ_IRQ_I2C, |
| 137 | .end = JZ_IRQ_I2C, |
| 138 | .flags = IORESOURCE_IRQ, |
| 139 | } |
| 140 | }; |
| 141 | |
| 142 | static u64 jz4740_i2c_dmamask = ~(u32)0; |
| 143 | |
| 144 | struct platform_device jz4740_i2c_device = { |
| 145 | .name = "jz_i2c", |
| 146 | .id = 0, |
| 147 | .dev = { |
| 148 | .dma_mask = &jz4740_i2c_dmamask, |
| 149 | .coherent_dma_mask = 0xffffffff, |
| 150 | }, |
| 151 | .num_resources = ARRAY_SIZE(jz4740_i2c_resources), |
| 152 | .resource = jz4740_i2c_resources, |
| 153 | }; |
| 154 | |
| 155 | static struct resource jz4740_nand_resources[] = { |
| 156 | [0] = { |
| 157 | .start = CPHYSADDR(EMC_BASE), |
| 158 | .end = CPHYSADDR(EMC_BASE) + 0x10000 - 1, |
| 159 | .flags = IORESOURCE_MEM, |
| 160 | }, |
| 161 | }; |
| 162 | |
| 163 | struct platform_device jz4740_nand_device = { |
| 164 | .name = "jz4740-nand", |
| 165 | .num_resources = ARRAY_SIZE(jz4740_nand_resources), |
| 166 | .resource = jz4740_nand_resources, |
| 167 | }; |
| 168 | |
| 169 | static struct resource jz4740_framebuffer_resources[] = { |
| 170 | [0] = { |
| 171 | .start = CPHYSADDR(LCD_BASE), |
| 172 | .end = CPHYSADDR(LCD_BASE) + 0x10000 - 1, |
| 173 | .flags = IORESOURCE_MEM, |
| 174 | }, |
| 175 | }; |
| 176 | |
| 177 | static u64 jz4740_fb_dmamask = ~(u32)0; |
| 178 | |
| 179 | struct platform_device jz4740_framebuffer_device = { |
| 180 | .name = "jz4740-fb", |
| 181 | .id = -1, |
| 182 | .num_resources = ARRAY_SIZE(jz4740_framebuffer_resources), |
| 183 | .resource = jz4740_framebuffer_resources, |
| 184 | .dev = { |
| 185 | .dma_mask = &jz4740_fb_dmamask, |
| 186 | .coherent_dma_mask = 0xffffffff, |
| 187 | }, |
| 188 | }; |
| 189 | |
| 190 | static struct resource jz4740_i2s_resources[] = { |
| 191 | [0] = { |
| 192 | .start = CPHYSADDR(AIC_BASE), |
| 193 | .end = CPHYSADDR(AIC_BASE) + 0x38 - 1, |
| 194 | .flags = IORESOURCE_MEM, |
| 195 | }, |
| 196 | }; |
| 197 | |
| 198 | struct platform_device jz4740_i2s_device = { |
| 199 | .name = "jz4740-i2s", |
| 200 | .id = -1, |
| 201 | .num_resources = ARRAY_SIZE(jz4740_i2s_resources), |
| 202 | .resource = jz4740_i2s_resources, |
| 203 | }; |
| 204 | |
| 205 | static struct resource jz4740_codec_resources[] = { |
| 206 | [0] = { |
| 207 | .start = CPHYSADDR(AIC_BASE) + 0x80, |
| 208 | .end = CPHYSADDR(AIC_BASE) + 0x88 - 1, |
| 209 | .flags = IORESOURCE_MEM, |
| 210 | }, |
| 211 | }; |
| 212 | |
| 213 | struct platform_device jz4740_codec_device = { |
| 214 | .name = "jz4740-codec", |
| 215 | .id = -1, |
| 216 | .num_resources = ARRAY_SIZE(jz4740_codec_resources), |
| 217 | .resource = jz4740_codec_resources, |
| 218 | }; |
| 219 | |
| 220 | static struct resource jz4740_adc_resources[] = { |
| 221 | [0] = { |
| 222 | .start = CPHYSADDR(SADC_BASE), |
| 223 | .end = CPHYSADDR(SADC_BASE) + 0x30, |
| 224 | .flags = IORESOURCE_MEM, |
| 225 | }, |
| 226 | [1] = { |
| 227 | .start = JZ_IRQ_SADC, |
| 228 | .end = JZ_IRQ_SADC, |
| 229 | .flags = IORESOURCE_IRQ, |
| 230 | }, |
| 231 | }; |
| 232 | |
| 233 | struct platform_device jz4740_adc_device = { |
| 234 | .name = "jz4740-adc", |
| 235 | .id = -1, |
| 236 | .num_resources = ARRAY_SIZE(jz4740_adc_resources), |
| 237 | .resource = jz4740_adc_resources, |
| 238 | }; |
| 239 | |
| 240 | struct platform_device jz4740_battery_device = { |
| 241 | .name = "jz4740-battery", |
| 242 | .id = -1, |
| 243 | .dev = { |
| 244 | .parent = &jz4740_adc_device.dev |
| 245 | }, |
| 246 | }; |
| 247 | |