Root/target/linux/xburst/patches-2.6.32/903-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch

1From 117f87de607a65e8e1cd155acd12a7cd201de7d0 Mon Sep 17 00:00:00 2001
2From: Lars-Peter Clausen <lars@metafoo.de>
3Date: Sat, 26 Feb 2011 15:26:55 +0100
4Subject: [PATCH 3/4] NAND: Add support for subpage reads for NAND_ECC_HW_OOB_FIRST
5
6---
7 drivers/mtd/nand/nand_base.c | 84 ++++++++++++++++++++++++++++++++++++++++--
8 include/linux/mtd/nand.h | 8 ++--
9 2 files changed, 84 insertions(+), 8 deletions(-)
10
11--- a/drivers/mtd/nand/nand_base.c
12+++ b/drivers/mtd/nand/nand_base.c
13@@ -864,7 +864,8 @@ static int nand_read_page_swecc(struct m
14  * @readlen: data length
15  * @bufpoi: buffer to store read data
16  */
17-static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
18+static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
19+ uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
20 {
21     int start_step, end_step, num_steps;
22     uint32_t *eccpos = chip->ecc.layout->eccpos;
23@@ -1039,6 +1040,76 @@ static int nand_read_page_hwecc_oob_firs
24 }
25 
26 /**
27+ * nand_read_subpage_hwecc_oob_first - [REPLACABLE] hw ecc based sub-page read function
28+ * @mtd: mtd info structure
29+ * @chip: nand chip info structure
30+ * @data_offs: offset of requested data within the page
31+ * @readlen: data length
32+ * @bufpoi: buffer to store read data
33+ * @page: page number to read
34+ *
35+ * Hardware ECC for large page chips, require OOB to be read first.
36+ * For this ECC mode, the write_page method is re-used from ECC_HW.
37+ * These methods read/write ECC from the OOB area, unlike the
38+ * ECC_HW_SYNDROME support with multiple ECC steps, follows the
39+ * "infix ECC" scheme and reads/writes ECC from the data area, by
40+ * overwriting the NAND manufacturer bad block markings.
41+ */
42+static int nand_read_subpage_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip,
43+ uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
44+{
45+ int start_step, end_step, num_steps;
46+ uint32_t *eccpos = chip->ecc.layout->eccpos;
47+ uint8_t *p;
48+ int data_col_addr;
49+ int eccsize = chip->ecc.size;
50+ int eccbytes = chip->ecc.bytes;
51+ uint8_t *ecc_code = chip->buffers->ecccode;
52+ uint8_t *ecc_calc = chip->buffers->ecccalc;
53+ int i;
54+
55+ /* Column address wihin the page aligned to ECC size */
56+ start_step = data_offs / chip->ecc.size;
57+ end_step = (data_offs + readlen - 1) / chip->ecc.size;
58+ num_steps = end_step - start_step + 1;
59+
60+ data_col_addr = start_step * chip->ecc.size;
61+
62+ /* Read the OOB area first */
63+ if (mtd->writesize > 512) {
64+ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
65+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
66+ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
67+ } else {
68+ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
69+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
70+ chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page);
71+ }
72+
73+ for (i = 0; i < chip->ecc.total; i++)
74+ ecc_code[i] = chip->oob_poi[eccpos[i]];
75+
76+ p = bufpoi + data_col_addr;
77+
78+ for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) {
79+ int stat;
80+
81+ chip->ecc.hwctl(mtd, NAND_ECC_READ);
82+ chip->read_buf(mtd, p, eccsize);
83+ chip->ecc.calculate(mtd, p, &ecc_calc[i]);
84+
85+ stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
86+ if (stat < 0)
87+ mtd->ecc_stats.failed++;
88+ else
89+ mtd->ecc_stats.corrected += stat;
90+ }
91+
92+ return 0;
93+}
94+
95+
96+/**
97  * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
98  * @mtd: mtd info structure
99  * @chip: nand chip info structure
100@@ -1194,7 +1265,7 @@ static int nand_do_read_ops(struct mtd_i
101                 ret = chip->ecc.read_page_raw(mtd, chip,
102                                   bufpoi, page);
103             else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
104- ret = chip->ecc.read_subpage(mtd, chip, col, bytes, bufpoi);
105+ ret = chip->ecc.read_subpage(mtd, chip, col, bytes, bufpoi, page);
106             else
107                 ret = chip->ecc.read_page(mtd, chip, bufpoi,
108                               page);
109@@ -2742,8 +2813,11 @@ int nand_scan_tail(struct mtd_info *mtd)
110                    "Hardware ECC not possible\n");
111             BUG();
112         }
113- if (!chip->ecc.read_page)
114+ if (!chip->ecc.read_page) {
115             chip->ecc.read_page = nand_read_page_hwecc_oob_first;
116+ if (!chip->ecc.read_subpage)
117+ chip->ecc.read_subpage = nand_read_subpage_hwecc_oob_first;
118+ }
119 
120     case NAND_ECC_HW:
121         /* Use standard hwecc read page function ? */
122--- a/include/linux/mtd/nand.h
123+++ b/include/linux/mtd/nand.h
124@@ -178,9 +178,9 @@ typedef enum {
125 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
126 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
127 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
128-/* Large page NAND with SOFT_ECC should support subpage reads */
129-#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \
130- && (chip->page_shift > 9))
131+/* Large page NAND with read_subpage set should support subpage reads */
132+#define NAND_SUBPAGE_READ(chip) (((chip)->ecc.read_subpage) \
133+ && ((chip)->page_shift > 9))
134 
135 /* Mask to zero out the chip options, which come from the id table */
136 #define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
137@@ -282,7 +282,7 @@ struct nand_ecc_ctrl {
138     int (*read_subpage)(struct mtd_info *mtd,
139                          struct nand_chip *chip,
140                          uint32_t offs, uint32_t len,
141- uint8_t *buf);
142+ uint8_t *buf, int page);
143     void (*write_page)(struct mtd_info *mtd,
144                           struct nand_chip *chip,
145                           const uint8_t *buf);
146

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