| 1 | #ifndef __DIAG_GPIO_H |
| 2 | #define __DIAG_GPIO_H |
| 3 | #include <linux/interrupt.h> |
| 4 | #include <linux/gpio.h> |
| 5 | #include <asm/mach-bcm47xx/bcm47xx.h> |
| 6 | |
| 7 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) |
| 8 | #define ssb_bcm47xx bcm47xx_bus.ssb |
| 9 | #endif |
| 10 | |
| 11 | static inline u32 __ssb_write32_masked(struct ssb_device *dev, u16 offset, |
| 12 | u32 mask, u32 value) |
| 13 | { |
| 14 | value &= mask; |
| 15 | value |= ssb_read32(dev, offset) & ~mask; |
| 16 | ssb_write32(dev, offset, value); |
| 17 | return value; |
| 18 | } |
| 19 | |
| 20 | static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *)) |
| 21 | { |
| 22 | int irq; |
| 23 | |
| 24 | irq = gpio_to_irq(0); |
| 25 | if (irq == -EINVAL) return; |
| 26 | |
| 27 | if (enabled) { |
| 28 | if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler)) |
| 29 | return; |
| 30 | } else { |
| 31 | free_irq(irq, handler); |
| 32 | } |
| 33 | |
| 34 | if (ssb_bcm47xx.chipco.dev) |
| 35 | __ssb_write32_masked(ssb_bcm47xx.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0)); |
| 36 | } |
| 37 | |
| 38 | #define EXTIF_ADDR 0x1f000000 |
| 39 | #define EXTIF_UART (EXTIF_ADDR + 0x00800000) |
| 40 | |
| 41 | #define GPIO_TYPE_NORMAL (0x0 << 24) |
| 42 | #define GPIO_TYPE_EXTIF (0x1 << 24) |
| 43 | #define GPIO_TYPE_MASK (0xf << 24) |
| 44 | |
| 45 | static inline void gpio_set_extif(int gpio, int value) |
| 46 | { |
| 47 | volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK); |
| 48 | if (value) |
| 49 | *addr = 0xFF; |
| 50 | else |
| 51 | *addr; |
| 52 | } |
| 53 | |
| 54 | #endif /* __DIAG_GPIO_H */ |
| 55 | |
