| 1 | #ifndef IFXMIPS_ATM_FW_REGS_DANUBE_H |
| 2 | #define IFXMIPS_ATM_FW_REGS_DANUBE_H |
| 3 | |
| 4 | |
| 5 | |
| 6 | /* |
| 7 | * Host-PPE Communication Data Address Mapping |
| 8 | */ |
| 9 | #define FW_VER_ID SB_BUFFER(0x2001) |
| 10 | #define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ |
| 11 | #define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ |
| 12 | #define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ |
| 13 | #define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ |
| 14 | #define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ |
| 15 | #define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ |
| 16 | #define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ |
| 17 | #define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */ |
| 18 | #define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20)) |
| 19 | #define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7)) |
| 20 | #define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i))) |
| 21 | #define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2710 + (i) * 27)) |
| 22 | #define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2711 + (i) * 27)) |
| 23 | #define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410)) |
| 24 | #define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2000 + (i))) |
| 25 | #define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2020 + (i))) |
| 26 | #define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2040 + (i))) |
| 27 | |
| 28 | |
| 29 | |
| 30 | #endif // IFXMIPS_ATM_FW_REGS_DANUBE_H |
| 31 | |
