| 1 | --- a/ath_hal/ah_os.c |
| 2 | +++ b/ath_hal/ah_os.c |
| 3 | @@ -343,6 +343,45 @@ |
| 4 | * NB: see the comments in ah_osdep.h about byte-swapping register |
| 5 | * reads and writes to understand what's going on below. |
| 6 | */ |
| 7 | + |
| 8 | +#ifdef CONFIG_LANTIQ |
| 9 | +extern int lantiq_emulate_madwifi_eep; |
| 10 | +#define EEPROM_EMULATION 1 |
| 11 | +#endif |
| 12 | + |
| 13 | +#ifdef EEPROM_EMULATION |
| 14 | +static int ath_hal_eeprom(struct ath_hal *ah, unsigned long addr, int val, int write) |
| 15 | +{ |
| 16 | + static int addrsel = 0; |
| 17 | + static int rc = 0; |
| 18 | + |
| 19 | + if (write) { |
| 20 | + if(addr == 0x6000) { |
| 21 | + addrsel = val * 2; |
| 22 | + rc = 0; |
| 23 | + } |
| 24 | + } else { |
| 25 | + switch(addr) |
| 26 | + { |
| 27 | + case 0x600c: |
| 28 | + if(rc++ < 2) |
| 29 | + val = 0x00000000; |
| 30 | + else |
| 31 | + val = 0x00000002; |
| 32 | + break; |
| 33 | + case 0x6004: |
| 34 | + val = cpu_to_le16(__raw_readw((u16 *) KSEG1ADDR(0xb07f0400 + addrsel))); |
| 35 | + /* this forces the regdomain to 0x00 (worldwide), as the original setting |
| 36 | + * causes issues with the HAL */ |
| 37 | + if (addrsel == 0x17e) |
| 38 | + val = 0; |
| 39 | + break; |
| 40 | + } |
| 41 | + } |
| 42 | + return val; |
| 43 | +} |
| 44 | +#endif |
| 45 | + |
| 46 | void __ahdecl |
| 47 | ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val) |
| 48 | { |
| 49 | @@ -351,20 +390,33 @@ |
| 50 | ath_hal_printf(ah, "%s: WRITE 0x%x <= 0x%x\n", |
| 51 | (ath_hal_func ?: "unknown"), reg, val); |
| 52 | #endif |
| 53 | - _OS_REG_WRITE(ah, reg, val); |
| 54 | +#ifdef EEPROM_EMULATION |
| 55 | + if((reg >= 0x6000) && (reg <= 0x6010) && lantiq_emulate_madwifi_eep) |
| 56 | + { |
| 57 | + val = ath_hal_eeprom(ah, reg, val, 1); |
| 58 | + } else |
| 59 | +#endif |
| 60 | + _OS_REG_WRITE(ah, reg, val); |
| 61 | } |
| 62 | EXPORT_SYMBOL(ath_hal_reg_write); |
| 63 | |
| 64 | + |
| 65 | /* This should only be called while holding the lock, sc->sc_hal_lock. */ |
| 66 | u_int32_t __ahdecl |
| 67 | ath_hal_reg_read(struct ath_hal *ah, u_int reg) |
| 68 | { |
| 69 | - u_int32_t val; |
| 70 | + u_int32_t val; |
| 71 | +#ifdef EEPROM_EMULATION |
| 72 | + if((reg >= 0x6000) && (reg <= 0x6010) && lantiq_emulate_madwifi_eep) |
| 73 | + { |
| 74 | + val = ath_hal_eeprom(ah, reg, 0, 0); |
| 75 | + } else |
| 76 | +#endif |
| 77 | + val = _OS_REG_READ(ah, reg); |
| 78 | |
| 79 | - val = _OS_REG_READ(ah, reg); |
| 80 | #ifdef AH_DEBUG |
| 81 | if (ath_hal_debug > 1) |
| 82 | - ath_hal_printf(ah, "%s: READ 0x%x => 0x%x\n", |
| 83 | + ath_hal_printf(ah, "%s: READ 0x%x => 0x%x\n", |
| 84 | (ath_hal_func ?: "unknown"), reg, val); |
| 85 | #endif |
| 86 | return val; |
| 87 | @@ -581,7 +633,6 @@ |
| 88 | { |
| 89 | const char *sep; |
| 90 | int i; |
| 91 | - |
| 92 | printk(KERN_INFO "%s: %s (", dev_info, ath_hal_version); |
| 93 | sep = ""; |
| 94 | for (i = 0; ath_hal_buildopts[i] != NULL; i++) { |
| 95 | |
